/* bfin.h -- Header file for ADI Blackfin opcode table
- Copyright 2005 Free Software Foundation, Inc.
+ Copyright (C) 2005-2018 Free Software Foundation, Inc.
-This file is part of GDB, GAS, and the GNU binutils.
+ This file is part of GDB, GAS, and the GNU binutils.
-GDB, GAS, and the GNU binutils are free software; you can redistribute
-them and/or modify them under the terms of the GNU General Public
-License as published by the Free Software Foundation; either version
-1, or (at your option) any later version.
+ GDB, GAS, and the GNU binutils are free software; you can redistribute
+ them and/or modify them under the terms of the GNU General Public
+ License as published by the Free Software Foundation; either version 3,
+ or (at your option) any later version.
-GDB, GAS, and the GNU binutils are distributed in the hope that they
-will be useful, but WITHOUT ANY WARRANTY; without even the implied
-warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
-the GNU General Public License for more details.
+ GDB, GAS, and the GNU binutils are distributed in the hope that they
+ will be useful, but WITHOUT ANY WARRANTY; without even the implied
+ warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
+ the GNU General Public License for more details.
-You should have received a copy of the GNU General Public License
-along with this file; see the file COPYING. If not, write to the Free
-Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
+ You should have received a copy of the GNU General Public License
+ along with this file; see the file COPYING3. If not, write to the Free
+ Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
+ MA 02110-1301, USA. */
+
+#ifndef OPCODE_BFIN_H
+#define OPCODE_BFIN_H
/* Common to all DSP32 instructions. */
#define BIT_MULTI_INS 0x0800
/* DSP instructions (32 bit) */
+/* mmod field. */
+#define M_S2RND 1
+#define M_T 2
+#define M_W32 3
+#define M_FU 4
+#define M_TFU 6
+#define M_IS 8
+#define M_ISS2 9
+#define M_IH 11
+#define M_IU 12
+
+static inline int is_macmod_pmove (int x)
+{
+ return (x == 0) || (x == M_IS) || (x == M_FU) || (x == M_S2RND)
+ || (x == M_ISS2) || (x == M_IU);
+}
+
+static inline int is_macmod_hmove (int x)
+{
+ return (x == 0) || (x == M_IS) || (x == M_FU) || (x == M_IU) || (x == M_T)
+ || (x == M_TFU) || (x == M_S2RND) || (x == M_ISS2) || (x == M_IH);
+}
+
+static inline int is_macmod_signed (int x)
+{
+ return (x == 0) || (x == M_IS) || (x == M_T) || (x == M_S2RND)
+ || (x == M_ISS2) || (x == M_IH) || (x == M_W32);
+}
+
/* dsp32mac
+----+----+---+---|---+----+----+---|---+---+---+---|---+---+---+---+
| 1 | 1 | 0 | 0 |.M.| 0 | 0 |.mmod..........|.MM|.P.|.w1|.op1...|
unsigned long opcode;
int bits_src1;
int mask_src1;
- int bits_src0;
+ int bits_src0;
int mask_src0;
- int bits_dst;
+ int bits_dst;
int mask_dst;
- int bits_h10;
+ int bits_h10;
int mask_h10;
- int bits_h00;
+ int bits_h00;
int mask_h00;
- int bits_op0;
+ int bits_op0;
int mask_op0;
- int bits_w0;
+ int bits_w0;
int mask_w0;
- int bits_h11;
+ int bits_h11;
int mask_h11;
- int bits_h01;
+ int bits_h01;
int mask_h01;
- int bits_op1;
+ int bits_op1;
int mask_op1;
- int bits_w1;
+ int bits_w1;
int mask_w1;
- int bits_P;
+ int bits_P;
int mask_P;
- int bits_MM;
+ int bits_MM;
int mask_MM;
- int bits_mmod;
+ int bits_mmod;
int mask_mmod;
- int bits_code2;
+ int bits_code2;
int mask_code2;
- int bits_M;
+ int bits_M;
int mask_M;
- int bits_code;
+ int bits_code;
int mask_code;
} DSP32Mac;
#define DSP32Mac_w1_mask 0x1
#define DSP32Mac_p_bits 19
#define DSP32Mac_p_mask 0x1
-#define DSP32Mac_MM_bits 20
+#define DSP32Mac_MM_bits 20
#define DSP32Mac_MM_mask 0x1
#define DSP32Mac_mmod_bits 21
#define DSP32Mac_mmod_mask 0xf
#define DSP32Alu_opcode 0xc4000000
#define DSP32Alu_src1_bits 0
#define DSP32Alu_src1_mask 0x7
-#define DSP32Alu_src0_bits 3
+#define DSP32Alu_src0_bits 3
#define DSP32Alu_src0_mask 0x7
#define DSP32Alu_dst1_bits 6
#define DSP32Alu_dst1_mask 0x7
-#define DSP32Alu_dst0_bits 9
+#define DSP32Alu_dst0_bits 9
#define DSP32Alu_dst0_mask 0x7
#define DSP32Alu_x_bits 12
#define DSP32Alu_x_mask 0x1
#define DSP32ShiftImm_code2_mask 0xf
#define DSP32ShiftImm_M_bits 27
#define DSP32ShiftImm_M_mask 0x1
-#define DSP32ShiftImm_code_bits 28
+#define DSP32ShiftImm_code_bits 28
#define DSP32ShiftImm_code_mask 0xf
#define init_DSP32ShiftImm \
/* PseudoDbg_assert
+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
-| 1 | 1 | 1 | 1 | 0 | - | - | - | - | - |.dbgop.....|.regtest...|
+| 1 | 1 | 1 | 1 | 0 | - | - | - | dbgop |.grp.......|.regtest...|
|.expected......................................................|
+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
*/
int mask_expected;
int bits_regtest;
int mask_regtest;
+ int bits_grp;
+ int mask_grp;
int bits_dbgop;
int mask_dbgop;
int bits_dontcare;
#define PseudoDbg_Assert_expected_mask 0xffff
#define PseudoDbg_Assert_regtest_bits 16
#define PseudoDbg_Assert_regtest_mask 0x7
-#define PseudoDbg_Assert_dbgop_bits 19
-#define PseudoDbg_Assert_dbgop_mask 0x7
-#define PseudoDbg_Assert_dontcare_bits 22
-#define PseudoDbg_Assert_dontcare_mask 0x1f
+#define PseudoDbg_Assert_grp_bits 19
+#define PseudoDbg_Assert_grp_mask 0x7
+#define PseudoDbg_Assert_dbgop_bits 22
+#define PseudoDbg_Assert_dbgop_mask 0x3
+#define PseudoDbg_Assert_dontcare_bits 24
+#define PseudoDbg_Assert_dontcare_mask 0x7
#define PseudoDbg_Assert_code_bits 27
#define PseudoDbg_Assert_code_mask 0x1f
PseudoDbg_Assert_opcode, \
PseudoDbg_Assert_expected_bits, PseudoDbg_Assert_expected_mask, \
PseudoDbg_Assert_regtest_bits, PseudoDbg_Assert_regtest_mask, \
+ PseudoDbg_Assert_grp_bits, PseudoDbg_Assert_grp_mask, \
PseudoDbg_Assert_dbgop_bits, PseudoDbg_Assert_dbgop_mask, \
PseudoDbg_Assert_dontcare_bits, PseudoDbg_Assert_dontcare_mask, \
PseudoDbg_Assert_code_bits, PseudoDbg_Assert_code_mask \
};
+/* pseudoChr
++---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
+| 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 |.ch............................|
++---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
+*/
+
+typedef struct
+{
+ unsigned short opcode;
+ int bits_ch;
+ int mask_ch;
+ int bits_code;
+ int mask_code;
+} PseudoChr;
+
+#define PseudoChr_opcode 0xf900
+#define PseudoChr_ch_bits 0
+#define PseudoChr_ch_mask 0xff
+#define PseudoChr_code_bits 8
+#define PseudoChr_code_mask 0xff
+
+#define init_PseudoChr \
+{ \
+ PseudoChr_opcode, \
+ PseudoChr_ch_bits, PseudoChr_ch_mask, \
+ PseudoChr_code_bits, PseudoChr_code_mask \
+};
+
/* CaCTRL
+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
| 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |.a.|.op....|.reg.......|
typedef struct
{
unsigned long opcode;
- int bits_framesize;
+ int bits_framesize;
int mask_framesize;
- int bits_R;
+ int bits_R;
int mask_R;
int bits_code;
int mask_code;
{
unsigned long opcode;
int bits_eoffset;
- int mask_eoffset;
- int bits_dontcare;
+ int mask_eoffset;
+ int bits_dontcare;
int mask_dontcare;
- int bits_reg;
+ int bits_reg;
int mask_reg;
- int bits_soffset;
+ int bits_soffset;
int mask_soffset;
- int bits_c;
+ int bits_c;
int mask_c;
- int bits_rop;
+ int bits_rop;
int mask_rop;
- int bits_code;
+ int bits_code;
int mask_code;
} LoopSetup;
unsigned long opcode;
int bits_hword;
int mask_hword;
- int bits_reg;
+ int bits_reg;
int mask_reg;
- int bits_grp;
+ int bits_grp;
int mask_grp;
- int bits_S;
+ int bits_S;
int mask_S;
- int bits_H;
+ int bits_H;
int mask_H;
- int bits_Z;
+ int bits_Z;
int mask_Z;
- int bits_code;
+ int bits_code;
int mask_code;
} LDIMMhalf;
unsigned short opcode;
int bits_reg;
int mask_reg;
- int bits_op;
+ int bits_op;
int mask_op;
- int bits_code;
+ int bits_code;
int mask_code;
} CC2dreg;
unsigned short opcode;
int bits_dst;
int mask_dst;
- int bits_src;
+ int bits_src;
int mask_src;
- int bits_opc;
+ int bits_opc;
int mask_opc;
- int bits_code;
+ int bits_code;
int mask_code;
} PTR2op;
#define PTR2op_src_mask 0x7
#define PTR2op_opc_bits 6
#define PTR2op_opc_mask 0x7
-#define PTR2op_code_bits 9
+#define PTR2op_code_bits 9
#define PTR2op_code_mask 0x7f
#define init_PTR2op \
unsigned short opcode;
int bits_src0;
int mask_src0;
- int bits_src1;
+ int bits_src1;
int mask_src1;
- int bits_dst;
+ int bits_dst;
int mask_dst;
- int bits_opc;
+ int bits_opc;
int mask_opc;
- int bits_code;
+ int bits_code;
int mask_code;
} COMP3op;
unsigned short opcode;
int bits_src;
int mask_src;
- int bits_dst;
+ int bits_dst;
int mask_dst;
- int bits_s;
+ int bits_s;
int mask_s;
- int bits_d;
+ int bits_d;
int mask_d;
- int bits_T;
+ int bits_T;
int mask_T;
- int bits_code;
+ int bits_code;
int mask_code;
} CCmv;
#define CCmv_dst_mask 0x7
#define CCmv_s_bits 6
#define CCmv_s_mask 0x1
-#define CCmv_d_bits 7
+#define CCmv_d_bits 7
#define CCmv_d_mask 0x1
#define CCmv_T_bits 8
#define CCmv_T_mask 0x1
unsigned short opcode;
int bits_x;
int mask_x;
- int bits_y;
+ int bits_y;
int mask_y;
- int bits_G;
+ int bits_G;
int mask_G;
- int bits_opc;
+ int bits_opc;
int mask_opc;
- int bits_I;
+ int bits_I;
int mask_I;
- int bits_code;
+ int bits_code;
int mask_code;
} CCflag;
unsigned short opcode;
int bits_cbit;
int mask_cbit;
- int bits_op;
+ int bits_op;
int mask_op;
- int bits_D;
+ int bits_D;
int mask_D;
- int bits_code;
+ int bits_code;
int mask_code;
} CC2stat;
unsigned short opcode;
int bits_src;
int mask_src;
- int bits_dst;
+ int bits_dst;
int mask_dst;
- int bits_gs;
+ int bits_gs;
int mask_gs;
- int bits_gd;
+ int bits_gd;
int mask_gd;
- int bits_code;
+ int bits_code;
int mask_code;
} RegMv;
unsigned short opcode;
int bits_dst;
int mask_dst;
- int bits_src;
+ int bits_src;
int mask_src;
- int bits_op;
+ int bits_op;
int mask_op;
- int bits_code;
+ int bits_code;
int mask_code;
} COMPI2opD;
unsigned short opcode;
int bits_i;
int mask_i;
- int bits_m;
+ int bits_m;
int mask_m;
- int bits_op;
+ int bits_op;
int mask_op;
- int bits_code2;
+ int bits_code2;
int mask_code2;
- int bits_br;
+ int bits_br;
int mask_br;
- int bits_code;
+ int bits_code;
int mask_code;
} DagMODim;
DagMODik_op_bits, DagMODik_op_mask, \
DagMODik_code_bits, DagMODik_code_mask \
};
+
+#endif
projects / deliverable / binutils-gdb.git / blobdiff