mips3264 support

[deliverable/binutils-gdb.git] / include / opcode / i386.h

diff --git a/include/opcode/i386.h b/include/opcode/i386.h
index f480dd4003efeeeb6ad9c70660102fb418800e79..38de44aca0a1b837064cc18eedde2f625c035d82 100644 (file)
--- a/include/opcode/i386.h
+++ b/include/opcode/i386.h
@@ -993,6 +993,8 @@ static const template i386_optab[] = {
 {"paddw",    2, 0x660ffd,X,CpuSSE2,FP|Modrm,           { RegXMM|LLongMem, RegXMM, 0 } },
 {"paddd",    2, 0x0ffe, X, CpuMMX, FP|Modrm,           { RegMMX|LongMem, RegMMX, 0 } },
 {"paddd",    2, 0x660ffe,X,CpuSSE2,FP|Modrm,           { RegXMM|LLongMem, RegXMM, 0 } },
+{"paddq",    2, 0x0fd4, X, CpuMMX, FP|Modrm,           { RegMMX|LLongMem, RegMMX, 0 } },
+{"paddq",    2, 0x660fd4,X,CpuSSE2,FP|Modrm,           { RegXMM|LLongMem, RegXMM, 0 } },
 {"paddsb",   2, 0x0fec, X, CpuMMX, FP|Modrm,           { RegMMX|LongMem, RegMMX, 0 } },
 {"paddsb",   2, 0x660fec,X,CpuSSE2,FP|Modrm,           { RegXMM|LLongMem, RegXMM, 0 } },
 {"paddsw",   2, 0x0fed, X, CpuMMX, FP|Modrm,           { RegMMX|LongMem, RegMMX, 0 } },
@@ -1063,6 +1065,8 @@ static const template i386_optab[] = {
 {"psubw",    2, 0x660ff9,X,CpuSSE2,FP|Modrm,           { RegXMM|LLongMem, RegXMM, 0 } },
 {"psubd",    2, 0x0ffa, X, CpuMMX, FP|Modrm,           { RegMMX|LongMem, RegMMX, 0 } },
 {"psubd",    2, 0x660ffa,X,CpuSSE2,FP|Modrm,           { RegXMM|LLongMem, RegXMM, 0 } },
+{"psubq",    2, 0x0ffb, X, CpuMMX, FP|Modrm,           { RegMMX|LLongMem, RegMMX, 0 } },
+{"psubq",    2, 0x660ffb,X,CpuSSE2,FP|Modrm,           { RegXMM|LLongMem, RegXMM, 0 } },
 {"psubsb",   2, 0x0fe8, X, CpuMMX, FP|Modrm,           { RegMMX|LongMem, RegMMX, 0 } },
 {"psubsb",   2, 0x660fe8,X,CpuSSE2,FP|Modrm,           { RegXMM|LLongMem, RegXMM, 0 } },
 {"psubsw",   2, 0x0fe9, X, CpuMMX, FP|Modrm,           { RegMMX|LongMem, RegMMX, 0 } },
@@ -1136,7 +1140,7 @@ static const template i386_optab[] = {
 {"movmskps",  2, 0x0f50,    X, CpuSSE, FP|Modrm,       { RegXMM|InvMem, Reg32, 0 } },
 {"movntps",   2, 0x0f2b,    X, CpuSSE, FP|Modrm,       { RegXMM, LLongMem, 0 } },
 {"movntq",    2, 0x0fe7,    X, CpuSSE, FP|Modrm,       { RegMMX, LLongMem, 0 } },
-{"movntq",    2, 0x660fe7,  X, CpuSSE2,FP|Modrm,       { RegXMM, LLongMem, 0 } },
+{"movntdq",   2, 0x660fe7,  X, CpuSSE2,FP|Modrm,       { RegXMM, LLongMem, 0 } },
 {"movss",     2, 0xf30f10,  X, CpuSSE, FP|Modrm,       { RegXMM|WordMem, RegXMM, 0 } },
 {"movss",     2, 0xf30f11,  X, CpuSSE, FP|Modrm,       { RegXMM, RegXMM|WordMem, 0 } },
 {"movups",    2, 0x0f10,    X, CpuSSE, FP|Modrm,       { RegXMM|LLongMem, RegXMM, 0 } },
@@ -1148,8 +1152,8 @@ static const template i386_optab[] = {
 {"pavgb",     2, 0x660fe0,  X, CpuSSE2,FP|Modrm,       { RegXMM|LLongMem, RegXMM, 0 } },
 {"pavgw",     2, 0x0fe3,    X, CpuSSE, FP|Modrm,       { RegMMX|LLongMem, RegMMX, 0 } },
 {"pavgw",     2, 0x660fe3,  X, CpuSSE2,FP|Modrm,       { RegXMM|LLongMem, RegXMM, 0 } },
-{"pextrw",    3, 0x0fc5,    X, CpuSSE, FP|Modrm,       { Imm8, RegMMX, Reg32|InvMem } },
-{"pextrw",    3, 0x660fc5,  X, CpuSSE2,FP|Modrm,       { Imm8, RegXMM, Reg32|InvMem } },
+{"pextrw",    3, 0x0fc5,    X, CpuSSE, FP|Modrm,       { Imm8, RegMMX|InvMem, Reg32 } },
+{"pextrw",    3, 0x660fc5,  X, CpuSSE2,FP|Modrm,       { Imm8, RegXMM|InvMem, Reg32 } },
 {"pinsrw",    3, 0x0fc4,    X, CpuSSE, FP|Modrm,       { Imm8, Reg32|ShortMem, RegMMX } },
 {"pinsrw",    3, 0x660fc4,  X, CpuSSE2, FP|Modrm,      { Imm8, Reg32|ShortMem, RegXMM } },
 {"pmaxsw",    2, 0x0fee,    X, CpuSSE, FP|Modrm,       { RegMMX|LLongMem, RegMMX, 0 } },
@@ -1160,8 +1164,8 @@ static const template i386_optab[] = {
 {"pminsw",    2, 0x660fea,  X, CpuSSE2,FP|Modrm,       { RegXMM|LLongMem, RegXMM, 0 } },
 {"pminub",    2, 0x0fda,    X, CpuSSE, FP|Modrm,       { RegMMX|LLongMem, RegMMX, 0 } },
 {"pminub",    2, 0x660fda,  X, CpuSSE2,FP|Modrm,       { RegXMM|LLongMem, RegXMM, 0 } },
-{"pmovmskb",  2, 0x0fd7,    X, CpuSSE, FP|Modrm,       { RegMMX, Reg32|InvMem, 0 } },
-{"pmovmskb",  2, 0x660fd7,  X, CpuSSE2,FP|Modrm,       { RegXMM, Reg32|InvMem, 0 } },
+{"pmovmskb",  2, 0x0fd7,    X, CpuSSE, FP|Modrm,       { RegMMX|InvMem, Reg32, 0 } },
+{"pmovmskb",  2, 0x660fd7,  X, CpuSSE2,FP|Modrm,       { RegXMM|InvMem, Reg32, 0 } },
 {"pmulhuw",   2, 0x0fe4,    X, CpuSSE, FP|Modrm,       { RegMMX|LLongMem, RegMMX, 0 } },
 {"pmulhuw",   2, 0x660fe4,  X, CpuSSE2,FP|Modrm,       { RegXMM|LLongMem, RegXMM, 0 } },
 {"prefetchnta", 1, 0x0f18,  0, CpuSSE, FP|Modrm,       { LLongMem, 0, 0 } },
@@ -1250,7 +1254,7 @@ static const template i386_optab[] = {
 {"cvtpd2pi",  2, 0x660f2d,  X, CpuSSE2, FP|Modrm,      { RegXMM|LLongMem, RegMMX, 0 } },
 {"cvtpd2ps",  2, 0x660f5a,  X, CpuSSE2, FP|Modrm,      { RegXMM|LLongMem, RegXMM, 0 } },
 {"cvtps2pd",  2, 0x0f5a,    X, CpuSSE2, FP|Modrm,      { RegXMM|LLongMem, RegXMM, 0 } },
-{"cvtps2dq",  2, 0x660f5b,  X, CpuSSE2, FP|Modrm,      { RegXMM|LLongMem, RegMMX, 0 } },
+{"cvtps2dq",  2, 0x660f5b,  X, CpuSSE2, FP|Modrm,      { RegXMM|LLongMem, RegXMM, 0 } },
 {"cvtsd2si",  2, 0xf20f2d,  X, CpuSSE2, lq_Suf|IgnoreSize|Modrm,{ RegXMM|LLongMem, Reg32|Reg64, 0 } },
 {"cvtsd2ss",  2, 0xf20f5a,  X, CpuSSE2, FP|Modrm,      { RegXMM|LLongMem, RegXMM, 0 } },
 {"cvtss2sd",  2, 0xf30f5a,  X, CpuSSE2, FP|Modrm,      { RegXMM|LLongMem, RegXMM, 0 } },
@@ -1258,13 +1262,13 @@ static const template i386_optab[] = {
 {"cvttsd2si", 2, 0xf20f2c,  X, CpuSSE2, lq_Suf|IgnoreSize|Modrm,{ RegXMM|WordMem, Reg32|Reg64, 0 } },
 {"cvttpd2dq", 2, 0x660fe6,  X, CpuSSE2, FP|Modrm,      { RegXMM|LLongMem, RegXMM, 0 } },
 {"cvttps2dq", 2, 0xf30f5b,  X, CpuSSE2, FP|Modrm,      { RegXMM|LLongMem, RegXMM, 0 } },
-{"maskmovdqu",2, 0x660ff7,  X, CpuSSE2, FP|Modrm,      { RegXMM, RegXMM, 0 } },
+{"maskmovdqu",2, 0x660ff7,  X, CpuSSE2, FP|Modrm,      { RegXMM|InvMem, RegXMM, 0 } },
 {"movdqa",    2, 0x660f6f,  X, CpuSSE2, FP|Modrm,      { RegXMM|LLongMem, RegXMM, 0 } },
 {"movdqa",    2, 0x660f7f,  X, CpuSSE2, FP|Modrm,      { RegXMM, RegXMM|LLongMem, 0 } },
 {"movdqu",    2, 0xf30f6f,  X, CpuSSE2, FP|Modrm,      { RegXMM|LLongMem, RegXMM, 0 } },
 {"movdqu",    2, 0xf30f7f,  X, CpuSSE2, FP|Modrm,      { RegXMM, RegXMM|LLongMem, 0 } },
-{"movdq2q",    2, 0xf20fd6,  X, CpuSSE2, FP|Modrm,     { RegMMX|LLongMem, RegXMM, 0 } },
-{"movq2dq",   2, 0xf30fd6,  X, CpuSSE2, FP|Modrm,      { RegXMM|LLongMem, RegMMX, 0 } },
+{"movdq2q",    2, 0xf20fd6,  X, CpuSSE2, FP|Modrm,     { RegXMM|InvMem, RegMMX, 0 } },
+{"movq2dq",   2, 0xf30fd6,  X, CpuSSE2, FP|Modrm,      { RegMMX|InvMem, RegXMM, 0 } },
 {"pmuludq",   2, 0x0ff4,    X, CpuSSE2, FP|Modrm,      { RegMMX|LongMem, RegMMX, 0 } },
 {"pmuludq",   2, 0x660ff4,  X, CpuSSE2, FP|Modrm,      { RegXMM|LongMem, RegXMM, 0 } },
 {"pshufd",    3, 0x660f70,  X, CpuSSE2, FP|Modrm,      { Imm8, RegXMM|LLongMem, RegXMM } },
@@ -1273,6 +1277,7 @@ static const template i386_optab[] = {
 {"pslldq",    2, 0x660f73,  7, CpuSSE2, FP|Modrm,      { Imm8, RegXMM, 0 } },
 {"psrldq",    2, 0x660f73,  3, CpuSSE2, FP|Modrm,      { Imm8, RegXMM, 0 } },
 {"punpckhqdq",2, 0x660f6d,  X, CpuSSE2, FP|Modrm,      { RegXMM|LLongMem, RegXMM, 0 } },
+{"punpcklqdq",2, 0x660f6c,  X, CpuSSE2, FP|Modrm,      { RegXMM|LLongMem, RegXMM, 0 } },
 
 /* AMD 3DNow! instructions.  */