/* Basic 80960 instruction formats.
- *
- * The 'COJ' instructions are actually COBR instructions with the 'b' in
- * the mnemonic replaced by a 'j'; they are ALWAYS "de-optimized" if necessary:
- * if the displacement will not fit in 13 bits, the assembler will replace them
- * with the corresponding compare and branch instructions.
- *
- * All of the 'MEMn' instructions are the same format; the 'n' in the name
- * indicates the default index scale factor (the size of the datum operated on).
- *
- * The FBRA formats are not actually an instruction format. They are the
- * "convenience directives" for branching on floating-point comparisons,
- * each of which generates 2 instructions (a 'bno' and one other branch).
- *
- * The CALLJ format is not actually an instruction format. It indicates that
- * the instruction generated (a CTRL-format 'call') should have its relocation
- * specially flagged for link-time replacement with a 'bal' or 'calls' if
- * appropriate.
- */
+
+ Copyright 2001 Free Software Foundation, Inc.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2, or (at your option)
+ any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 51 Franklin Street - Fifth Floor,
+ Boston, MA 02110-1301, USA.
+
+ The 'COJ' instructions are actually COBR instructions with the 'b' in
+ the mnemonic replaced by a 'j'; they are ALWAYS "de-optimized" if necessary:
+ if the displacement will not fit in 13 bits, the assembler will replace them
+ with the corresponding compare and branch instructions.
+
+ All of the 'MEMn' instructions are the same format; the 'n' in the name
+ indicates the default index scale factor (the size of the datum operated on).
+
+ The FBRA formats are not actually an instruction format. They are the
+ "convenience directives" for branching on floating-point comparisons,
+ each of which generates 2 instructions (a 'bno' and one other branch).
+
+ The CALLJ format is not actually an instruction format. It indicates that
+ the instruction generated (a CTRL-format 'call') should have its relocation
+ specially flagged for link-time replacement with a 'bal' or 'calls' if
+ appropriate. */
#define CTRL 0
#define COBR 1
#define I_KX 0x10 /* 80960Kx instruction */
#define I_MIL 0x20 /* Military instruction */
#define I_CASIM 0x40 /* CA simulator instruction */
-#define I_CX2 0x80 /* other Cx instructions */
- /* ... also found on HX */
- /* ... also found on XL */
-#define I_HX 0x100 /* HX instruction */
-#define I_HX2 0x200 /* other HX instructions */
- /* ... also found on XL */
+#define I_CX2 0x80 /* Cx/Jx/Hx instructions */
+#define I_JX 0x100 /* Jx/Hx instruction */
+#define I_HX 0x200 /* Hx instructions */
/******************************************************************************
*
{ R_3(0x659), "sysctl", I_CX2, REG, 3, { RSL,RSL,RL } },
- /* HX extensions. */
- { R_3(0x780), "addono", I_HX2, REG, 3, { RSL,RSL,RS } },
- { R_3(0x790), "addog", I_HX2, REG, 3, { RSL,RSL,RS } },
- { R_3(0x7a0), "addoe", I_HX2, REG, 3, { RSL,RSL,RS } },
- { R_3(0x7b0), "addoge", I_HX2, REG, 3, { RSL,RSL,RS } },
- { R_3(0x7c0), "addol", I_HX2, REG, 3, { RSL,RSL,RS } },
- { R_3(0x7d0), "addone", I_HX2, REG, 3, { RSL,RSL,RS } },
- { R_3(0x7e0), "addole", I_HX2, REG, 3, { RSL,RSL,RS } },
- { R_3(0x7f0), "addoo", I_HX2, REG, 3, { RSL,RSL,RS } },
- { R_3(0x781), "addino", I_HX2, REG, 3, { RSL,RSL,RS } },
- { R_3(0x791), "addig", I_HX2, REG, 3, { RSL,RSL,RS } },
- { R_3(0x7a1), "addie", I_HX2, REG, 3, { RSL,RSL,RS } },
- { R_3(0x7b1), "addige", I_HX2, REG, 3, { RSL,RSL,RS } },
- { R_3(0x7c1), "addil", I_HX2, REG, 3, { RSL,RSL,RS } },
- { R_3(0x7d1), "addine", I_HX2, REG, 3, { RSL,RSL,RS } },
- { R_3(0x7e1), "addile", I_HX2, REG, 3, { RSL,RSL,RS } },
- { R_3(0x7f1), "addio", I_HX2, REG, 3, { RSL,RSL,RS } },
-
- { R_2D(0x5ad), "bswap", I_HX2, REG, 2, { RSL, RS, 0 } },
-
- { R_2(0x594), "cmpob", I_HX2, REG, 2, { RSL,RSL, 0 } },
- { R_2(0x595), "cmpib", I_HX2, REG, 2, { RSL,RSL, 0 } },
- { R_2(0x596), "cmpos", I_HX2, REG, 2, { RSL,RSL, 0 } },
- { R_2(0x597), "cmpis", I_HX2, REG, 2, { RSL,RSL, 0 } },
-
- { R_3(0x784), "selno", I_HX2, REG, 3, { RSL,RSL,RS } },
- { R_3(0x794), "selg", I_HX2, REG, 3, { RSL,RSL,RS } },
- { R_3(0x7a4), "sele", I_HX2, REG, 3, { RSL,RSL,RS } },
- { R_3(0x7b4), "selge", I_HX2, REG, 3, { RSL,RSL,RS } },
- { R_3(0x7c4), "sell", I_HX2, REG, 3, { RSL,RSL,RS } },
- { R_3(0x7d4), "selne", I_HX2, REG, 3, { RSL,RSL,RS } },
- { R_3(0x7e4), "selle", I_HX2, REG, 3, { RSL,RSL,RS } },
- { R_3(0x7f4), "selo", I_HX2, REG, 3, { RSL,RSL,RS } },
-
- { R_3(0x782), "subono", I_HX2, REG, 3, { RSL,RSL,RS } },
- { R_3(0x792), "subog", I_HX2, REG, 3, { RSL,RSL,RS } },
- { R_3(0x7a2), "suboe", I_HX2, REG, 3, { RSL,RSL,RS } },
- { R_3(0x7b2), "suboge", I_HX2, REG, 3, { RSL,RSL,RS } },
- { R_3(0x7c2), "subol", I_HX2, REG, 3, { RSL,RSL,RS } },
- { R_3(0x7d2), "subone", I_HX2, REG, 3, { RSL,RSL,RS } },
- { R_3(0x7e2), "subole", I_HX2, REG, 3, { RSL,RSL,RS } },
- { R_3(0x7f2), "suboo", I_HX2, REG, 3, { RSL,RSL,RS } },
- { R_3(0x783), "subino", I_HX2, REG, 3, { RSL,RSL,RS } },
- { R_3(0x793), "subig", I_HX2, REG, 3, { RSL,RSL,RS } },
- { R_3(0x7a3), "subie", I_HX2, REG, 3, { RSL,RSL,RS } },
- { R_3(0x7b3), "subige", I_HX2, REG, 3, { RSL,RSL,RS } },
- { R_3(0x7c3), "subil", I_HX2, REG, 3, { RSL,RSL,RS } },
- { R_3(0x7d3), "subine", I_HX2, REG, 3, { RSL,RSL,RS } },
- { R_3(0x7e3), "subile", I_HX2, REG, 3, { RSL,RSL,RS } },
- { R_3(0x7f3), "subio", I_HX2, REG, 3, { RSL,RSL,RS } },
-
- { R_3(0x65c), "dcctl", I_HX2, REG, 3, { RSL,RSL,RL } },
- { R_3(0x65b), "icctl", I_HX2, REG, 3, { RSL,RSL,RS } },
- { R_2D(0x658), "intctl", I_HX2, REG, 2, { RSL, RS, 0 } },
- { R_0(0x5b4), "intdis", I_HX2, REG, 0, { 0, 0, 0 } },
- { R_0(0x5b5), "inten", I_HX2, REG, 0, { 0, 0, 0 } },
- { R_0(0x65d), "halt", I_HX2, REG, 0, { 0, 0, 0 } },
-
+ /* Jx extensions. */
+ { R_3(0x780), "addono", I_JX, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x790), "addog", I_JX, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x7a0), "addoe", I_JX, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x7b0), "addoge", I_JX, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x7c0), "addol", I_JX, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x7d0), "addone", I_JX, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x7e0), "addole", I_JX, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x7f0), "addoo", I_JX, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x781), "addino", I_JX, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x791), "addig", I_JX, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x7a1), "addie", I_JX, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x7b1), "addige", I_JX, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x7c1), "addil", I_JX, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x7d1), "addine", I_JX, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x7e1), "addile", I_JX, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x7f1), "addio", I_JX, REG, 3, { RSL,RSL,RS } },
+
+ { R_2D(0x5ad), "bswap", I_JX, REG, 2, { RSL, RS, 0 } },
+
+ { R_2(0x594), "cmpob", I_JX, REG, 2, { RSL,RSL, 0 } },
+ { R_2(0x595), "cmpib", I_JX, REG, 2, { RSL,RSL, 0 } },
+ { R_2(0x596), "cmpos", I_JX, REG, 2, { RSL,RSL, 0 } },
+ { R_2(0x597), "cmpis", I_JX, REG, 2, { RSL,RSL, 0 } },
+
+ { R_3(0x784), "selno", I_JX, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x794), "selg", I_JX, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x7a4), "sele", I_JX, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x7b4), "selge", I_JX, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x7c4), "sell", I_JX, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x7d4), "selne", I_JX, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x7e4), "selle", I_JX, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x7f4), "selo", I_JX, REG, 3, { RSL,RSL,RS } },
+
+ { R_3(0x782), "subono", I_JX, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x792), "subog", I_JX, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x7a2), "suboe", I_JX, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x7b2), "suboge", I_JX, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x7c2), "subol", I_JX, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x7d2), "subone", I_JX, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x7e2), "subole", I_JX, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x7f2), "suboo", I_JX, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x783), "subino", I_JX, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x793), "subig", I_JX, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x7a3), "subie", I_JX, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x7b3), "subige", I_JX, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x7c3), "subil", I_JX, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x7d3), "subine", I_JX, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x7e3), "subile", I_JX, REG, 3, { RSL,RSL,RS } },
+ { R_3(0x7f3), "subio", I_JX, REG, 3, { RSL,RSL,RS } },
+
+ { R_3(0x65c), "dcctl", I_JX, REG, 3, { RSL,RSL,RL } },
+ { R_3(0x65b), "icctl", I_JX, REG, 3, { RSL,RSL,RS } },
+ { R_2D(0x658), "intctl", I_JX, REG, 2, { RSL, RS, 0 } },
+ { R_0(0x5b4), "intdis", I_JX, REG, 0, { 0, 0, 0 } },
+ { R_0(0x5b5), "inten", I_JX, REG, 0, { 0, 0, 0 } },
+ { R_0(0x65d), "halt", I_JX, REG, 1, { RSL, 0, 0 } },
+
+ /* Hx extensions. */
{ 0xac000000, "dcinva", I_HX, MEM1, 1, { M, 0, 0 } },
/* END OF TABLE */
projects / deliverable / binutils-gdb.git / blobdiff