RISC-V: Add missing hint instructions from RV128I.

[deliverable/binutils-gdb.git] / include / opcode / rx.h

diff --git a/include/opcode/rx.h b/include/opcode/rx.h
index 41557b2f8c270f1117f2ec8d3962d7a9e29461df..54ff409df64555abf9dceba46f43e2bbc2c8bfb9 100644 (file)
--- a/include/opcode/rx.h
+++ b/include/opcode/rx.h
@@ -1,5 +1,5 @@
 /* Opcode decoder for the Renesas RX
-   Copyright (C) 2008-2015 Free Software Foundation, Inc.
+   Copyright (C) 2008-2018 Free Software Foundation, Inc.
    Written by DJ Delorie <dj@redhat.com>
 
    This file is part of GDB, the GNU Debugger and GAS, the GNU Assembler.
@@ -38,6 +38,8 @@ typedef enum
   RX_SWord,
   RX_3Byte,
   RX_Long,
+  RX_Bad_Size,
+  RX_MAX_SIZE
 } RX_Size;
 
 typedef enum
@@ -46,6 +48,7 @@ typedef enum
   RX_Operand_Immediate,        /* #addend */
   RX_Operand_Register, /* Rn */
   RX_Operand_Indirect, /* [Rn + addend] */
+  RX_Operand_Zero_Indirect,/* [Rn] */
   RX_Operand_Postinc,  /* [Rn+] */
   RX_Operand_Predec,   /* [-Rn] */
   RX_Operand_Condition,        /* eq, gtu, etc */
@@ -101,6 +104,10 @@ typedef enum
   RXO_nop,
   RXO_nop2,
   RXO_nop3,
+  RXO_nop4,
+  RXO_nop5,
+  RXO_nop6,
+  RXO_nop7,
 
   RXO_scmpu,
   RXO_smovu,
@@ -154,6 +161,25 @@ typedef enum
   RXO_wait,
 
   RXO_sccnd,   /* d = cond(s) ? 1 : 0 */
+
+  RXO_fsqrt,
+  RXO_ftou,
+  RXO_utof,
+  RXO_movco,
+  RXO_movli,
+  RXO_emaca,
+  RXO_emsba,
+  RXO_emula,
+  RXO_maclh,
+  RXO_msbhi,
+  RXO_msblh,
+  RXO_msblo,
+  RXO_mullh,
+  RXO_mvfacgu,
+  RXO_mvtacgu,
+  RXO_racl,
+  RXO_rdacl,
+  RXO_rdacw,
 } RX_Opcode_ID;
 
 /* Condition bitpatterns, as registers.  */