/* Opcode decoder for the Renesas RX
- Copyright 2008, 2009, 2010
- Free Software Foundation, Inc.
+ Copyright (C) 2008-2020 Free Software Foundation, Inc.
Written by DJ Delorie <dj@redhat.com>
This file is part of GDB, the GNU Debugger and GAS, the GNU Assembler.
analyzer, and the disassembler. Given an opcode data source,
it decodes the next opcode into the following structures. */
+#ifdef __cplusplus
+extern "C" {
+#endif
+
typedef enum
{
RX_AnySize = 0,
RX_SWord,
RX_3Byte,
RX_Long,
+ RX_Double,
+ RX_Bad_Size,
+ RX_MAX_SIZE
} RX_Size;
typedef enum
RX_Operand_Immediate, /* #addend */
RX_Operand_Register, /* Rn */
RX_Operand_Indirect, /* [Rn + addend] */
+ RX_Operand_Zero_Indirect,/* [Rn] */
RX_Operand_Postinc, /* [Rn+] */
RX_Operand_Predec, /* [-Rn] */
RX_Operand_Condition, /* eq, gtu, etc */
RX_Operand_Flag, /* [UIOSZC] */
+ RX_Operand_TwoReg, /* [Rn + scale*R2] */
+ RX_Operand_DoubleReg, /* DRn */
+ RX_Operand_DoubleRegH,/* DRHn */
+ RX_Operand_DoubleRegL,/* DRLn */
+ RX_Operand_DoubleCReg,/* DCRxx */
+ RX_Operand_DoubleCond,/* UN/EQ/LE/LT */
} RX_Operand_Type;
typedef enum
RXO_min, /* d = min(d,s) */
RXO_emul, /* d:64 = d:32 * s */
RXO_emulu, /* d:64 = d:32 * s (unsigned) */
- RXO_ediv, /* d:64 / s; d = quot, d+1 = rem */
- RXO_edivu, /* d:64 / s; d = quot, d+1 = rem */
RXO_rolc, /* d <<= 1 through carry */
RXO_rorc, /* d >>= 1 through carry*/
RXO_nop,
RXO_nop2,
RXO_nop3,
+ RXO_nop4,
+ RXO_nop5,
+ RXO_nop6,
+ RXO_nop7,
RXO_scmpu,
RXO_smovu,
RXO_wait,
RXO_sccnd, /* d = cond(s) ? 1 : 0 */
+
+ RXO_fsqrt,
+ RXO_ftou,
+ RXO_utof,
+ RXO_movco,
+ RXO_movli,
+ RXO_emaca,
+ RXO_emsba,
+ RXO_emula,
+ RXO_maclh,
+ RXO_msbhi,
+ RXO_msblh,
+ RXO_msblo,
+ RXO_mullh,
+ RXO_mvfacgu,
+ RXO_mvtacgu,
+ RXO_racl,
+ RXO_rdacl,
+ RXO_rdacw,
+
+ RXO_bfmov,
+ RXO_bfmovz,
+ RXO_rstr,
+ RXO_save,
+ RXO_dmov,
+ RXO_dpopm,
+ RXO_dpushm,
+ RXO_mvfdc,
+ RXO_mvfdr,
+ RXO_mvtdc,
+ RXO_dabs,
+ RXO_dadd,
+ RXO_dcmp,
+ RXO_ddiv,
+ RXO_dmul,
+ RXO_dneg,
+ RXO_dround,
+ RXO_dsqrt,
+ RXO_dsub,
+ RXO_dtoi,
+ RXO_dtof,
+ RXO_dtou,
+ RXO_ftod,
+ RXO_itod,
+ RXO_utod
} RX_Opcode_ID;
/* Condition bitpatterns, as registers. */
registers. 32..47 are condition codes. */
int rx_decode_opcode (unsigned long, RX_Opcode_Decoded *, int (*)(void *), void *);
+
+#ifdef __cplusplus
+}
+#endif