eelf32ppcvxworks.c \
eelf32ppcwindiss.c \
eelf32lriscv.c \
+ eelf32lriscv_ilp32f.c \
+ eelf32lriscv_ilp32.c \
eelf32rl78.c \
eelf32rx.c \
eelf32tilegx.c \
em68hc12elfb.c \
em68kelf.c \
em68kelfnbsd.c \
+ em9s12zelf.c \
emcorepe.c \
emn10200.c \
emn10300.c \
eelf64hppa.c \
eelf64lppc.c \
eelf64lriscv.c \
+ eelf64lriscv_lp64f.c \
+ eelf64lriscv_lp64.c \
eelf64ltsmip.c \
eelf64ltsmip_fbsd.c \
eelf64mmix.c \
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32lr5900.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32lr5900n32.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32lriscv.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32lriscv_ilp32.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32lriscv_ilp32f.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32lsmip.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32ltsmip.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32ltsmip_fbsd.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64hppa.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64lppc.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64lriscv.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64lriscv_lp64.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64lriscv_lp64f.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64ltsmip.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64ltsmip_fbsd.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64mmix.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/em68hc12elfb.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/em68kelf.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/em68kelfnbsd.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/em9s12zelf.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/emcorepe.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/emmo.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/emn10200.Po@am__quote@
$(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
earmelf_fbsd.c: $(srcdir)/emulparams/armelf_fbsd.sh \
- $(srcdir)/emulparams/armelf.sh \
+ $(srcdir)/emulparams/armelf.sh $(srcdir)/emulparams/elf_fbsd.sh \
$(ELF_DEPS) $(srcdir)/emultempl/armelf.em \
$(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
earmelfb_fbsd.c: $(srcdir)/emulparams/armelfb_fbsd.sh \
$(srcdir)/emulparams/armelf_fbsd.sh \
+ $(srcdir)/emulparams/armelf.sh $(srcdir)/emulparams/elf_fbsd.sh \
$(ELF_DEPS) $(srcdir)/emultempl/armelf.em \
$(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
earmelfb_fuchsia.c: $(srcdir)/emulparams/armelfb_fuchsia.sh \
+ $(srcdir)/emulparams/armelf_fuchsia.sh \
$(ELF_DEPS) $(srcdir)/emultempl/armelf.em \
$(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
$(srcdir)/emultempl/riscvelf.em $(srcdir)/scripttempl/elf.sc \
${GEN_DEPENDS}
+eelf32lriscv_ilp32f.c: $(srcdir)/emulparams/elf32lriscv_ilp32f.sh \
+ $(srcdir)/emulparams/elf32lriscv-defs.sh $(ELF_DEPS) \
+ $(srcdir)/emultempl/riscvelf.em $(srcdir)/scripttempl/elf.sc \
+ ${GEN_DEPENDS}
+
+eelf32lriscv_ilp32.c: $(srcdir)/emulparams/elf32lriscv_ilp32.sh \
+ $(srcdir)/emulparams/elf32lriscv-defs.sh $(ELF_DEPS) \
+ $(srcdir)/emultempl/riscvelf.em $(srcdir)/scripttempl/elf.sc \
+ ${GEN_DEPENDS}
+
eelf32lsmip.c: $(srcdir)/emulparams/elf32lsmip.sh \
$(srcdir)/emulparams/elf32lmip.sh $(srcdir)/emulparams/elf32bmip.sh \
$(ELF_DEPS) $(srcdir)/emultempl/mipself.em $(srcdir)/scripttempl/elf.sc \
$(ELF_DEPS) $(srcdir)/emultempl/m68kelf.em \
$(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
+em9s12zelf.c: $(srcdir)/emulparams/m9s12zelf.sh \
+ $(ELF_DEPS) $(srcdir)/emultempl/generic.em \
+ $(srcdir)/scripttempl/elfm9s12z.sc ${GEN_DEPENDS}
+
emcorepe.c: $(srcdir)/emulparams/mcorepe.sh \
$(srcdir)/emultempl/pe.em $(srcdir)/scripttempl/pe.sc ${GEN_DEPENDS}
$(srcdir)/emultempl/riscvelf.em $(srcdir)/scripttempl/elf.sc \
${GEN_DEPENDS}
+eelf64lriscv_lp64f.c: $(srcdir)/emulparams/elf64lriscv_lp64f.sh \
+ $(srcdir)/emulparams/elf64lriscv-defs.sh \
+ $(srcdir)/emulparams/elf32lriscv-defs.sh $(ELF_DEPS) \
+ $(srcdir)/emultempl/riscvelf.em $(srcdir)/scripttempl/elf.sc \
+ ${GEN_DEPENDS}
+
+eelf64lriscv_lp64.c: $(srcdir)/emulparams/elf64lriscv_lp64.sh \
+ $(srcdir)/emulparams/elf64lriscv-defs.sh \
+ $(srcdir)/emulparams/elf32lriscv-defs.sh $(ELF_DEPS) \
+ $(srcdir)/emultempl/riscvelf.em $(srcdir)/scripttempl/elf.sc \
+ ${GEN_DEPENDS}
+
eelf64ltsmip.c: $(srcdir)/emulparams/elf64ltsmip.sh \
$(srcdir)/emulparams/elf64btsmip.sh $(srcdir)/emulparams/elf64bmip-defs.sh \
$(srcdir)/emulparams/elf32bmipn32-defs.sh $(ELF_DEPS) \