tcl global directive outside proc body does nothing (ld)

[deliverable/binutils-gdb.git] / ld / testsuite / ld-mips-elf / mips-elf-flags.exp

diff --git a/ld/testsuite/ld-mips-elf/mips-elf-flags.exp b/ld/testsuite/ld-mips-elf/mips-elf-flags.exp
index dbe4132c56879461bfa8e5b90d7b3178adbf3ccf..5160d67d2437b35f67721182965b71aaf1937f13 100644 (file)
--- a/ld/testsuite/ld-mips-elf/mips-elf-flags.exp
+++ b/ld/testsuite/ld-mips-elf/mips-elf-flags.exp
@@ -1,4 +1,4 @@
-#   Copyright (C) 2003-2017 Free Software Foundation, Inc.
+#   Copyright (C) 2003-2020 Free Software Foundation, Inc.
 #
 # This file is part of the GNU Binutils.
 #
@@ -21,7 +21,6 @@ if {![istarget mips*-*-*] || ![is_elf_format]} {
     return
 }
 
-global ldemul
 if {[istarget mips*-*-irix6*]} {
     set ldemul "-melf32bsmip"
 } elseif {[istarget mips*el-*-linux*]} {
@@ -36,6 +35,32 @@ if {[istarget mips*-*-irix6*]} {
     set ldemul ""
 }
 
+# Check is ld supported 32bit emulations.
+proc check_ld_support_32bit { } {
+    global ld
+    global echo
+
+    set ld_output [remote_exec host $ld "-V"]
+    if [string match "*elf32*" $ld_output] then {
+       return 1
+    } else {
+       return 0
+    }
+}
+
+# Check args is 32bit abis.
+proc check_is_32bit_args {arg} {
+
+    if { [string match "*-32*" $arg]
+         || [string match "*-mabi=32*" $arg]
+         || [string match "*-mabi=o64*" $arg]
+         || [string match "*-mgp32*" $arg] } {
+       return 1
+    } else {
+       return 0
+    }
+}
+
 # Assemble jr.s using each of the argument lists in ARGLIST.  Return the
 # list of object files on success and an empty list on failure.
 proc assemble_for_flags {arglist} {
@@ -70,6 +95,13 @@ proc good_combination {arglist flags args} {
     set testname "MIPS compatible objects: $arglist"
     set objs [assemble_for_flags $arglist]
 
+    foreach argsl $arglist {
+        if { [check_is_32bit_args $argsl] && ![check_ld_support_32bit] } {
+           unsupported $testname
+           return 0
+       }
+    }
+
     if {$objs == ""} {
        unresolved $testname
     } elseif {![ld_link "$ld $ldemul" $finalobj "-r $objs"]} {
@@ -94,7 +126,12 @@ proc good_combination {arglist flags args} {
 
            foreach flag $flags {
                if {[lsearch -exact $gotflags $flag] < 0} {
-                   set failed 1
+                   # The mips*-*-irix* not use o32 flags.
+                   if {[istarget mips*-*-irix*] && $flag == "o32"} {
+                       set failed 0
+                   } else {
+                       set failed 1
+                   }
                }
            }
 
@@ -156,6 +193,13 @@ proc bad_combination {arglist message} {
     set testname "MIPS incompatible objects: $arglist"
     set objs [assemble_for_flags $arglist]
 
+    foreach argsl $arglist {
+        if { [check_is_32bit_args $argsl] && ![check_ld_support_32bit] } {
+           unsupported $testname
+           return 0
+       }
+    }
+
     if {$objs == ""} {
        unresolved $testname
     } elseif {[ld_link "$ld $ldemul" $finalobj "-r $objs"]
@@ -197,7 +241,18 @@ isa_conflict { "-march=sb1 -32"        "-mips64r2 -32" } sb1 isa64r2
 isa_conflict { "-march=vr4100 -32"     "-march=r10000 -32" } 4100 8000
 isa_conflict { "-march=r5900 -32"      "-march=vr4111 -32" } 5900 4111
 isa_conflict { "-march=loongson2e -32" "-march=loongson2f -32" } loongson_2e loongson_2f
-isa_conflict { "-march=loongson3a -32" "-march=loongson2f -32" } loongson_3a loongson_2f
+isa_conflict { "-march=gs464 -32" "-march=loongson2f -32" } gs464 loongson_2f
+
+isa_conflict { "-march=interaptiv-mr2 -32" \
+              "-march=r4010 -32" } interaptiv-mr2 4010
+isa_conflict { "-march=interaptiv-mr2 -mnan=2008 -mfp64 -32" \
+              "-mips32r6 -32" } interaptiv-mr2 isa32r6
+isa_conflict { "-march=interaptiv-mr2 -32" \
+              "-mips3 -32" } interaptiv-mr2 4000
+isa_conflict { "-march=interaptiv-mr2 -32" \
+              "-mips64r2 -32" } interaptiv-mr2 isa64r2
+isa_conflict { "-march=interaptiv-mr2 -32" \
+              "-march=octeon -32" } interaptiv-mr2 octeon
 
 regsize_conflict { "-mips4 -mgp64 -mabi=o64"         "-mips2 -32" }
 regsize_conflict { "-mips4 -mabi=o64"                "-mips4 -mabi=32" }
@@ -225,3 +280,47 @@ good_combination { "-march=sb1 -mgp32 -32"   "-march=4000 -mgp32 -32" } { sb1 o3
 good_combination { "-mips32 -mabi=32"        "-march=sb1 -mabi=32" } { sb1 o32 }
 good_combination { "-mips64r2 -mabi=32"      "-mips32 -mabi=32" } { mips64r2 o32 }
 good_combination { "-mips5 -mabi=o64"        "-mips64r2 -mabi=o64" } { mips64r2 o64 }
+
+good_combination { "-march=interaptiv-mr2 -32" "-mips1 -32" } \
+                { mips32r2 interaptiv-mr2 } \
+                MIPS32r3 "Imagination interAptiv MR2" \
+                { "DSP ASE" "Enhanced VA Scheme" "MT ASE" }
+good_combination { "-march=interaptiv-mr2 -32" "-mips32r2 -32" } \
+                { mips32r2 interaptiv-mr2 } \
+                MIPS32r3 "Imagination interAptiv MR2" \
+                { "DSP ASE" "Enhanced VA Scheme" "MT ASE" }
+good_combination { "-march=interaptiv-mr2 -32" "-march=interaptiv -32" } \
+                { mips32r2 interaptiv-mr2 } \
+                MIPS32r3 "Imagination interAptiv MR2" \
+                { "DSP ASE" "Enhanced VA Scheme" "MT ASE" }
+good_combination { "-march=interaptiv-mr2 -32" "-mips32r3 -32" } \
+                { mips32r2 interaptiv-mr2 } \
+                MIPS32r3 "Imagination interAptiv MR2" \
+                { "DSP ASE" "Enhanced VA Scheme" "MT ASE" }
+good_combination { "-march=interaptiv-mr2 -32" "-mips32r3 -mips16 -32" } \
+                { mips32r2 interaptiv-mr2 } \
+                MIPS32r3 "Imagination interAptiv MR2" \
+                { "DSP ASE" "Enhanced VA Scheme" "MT ASE" "MIPS16 ASE" }
+good_combination { "-march=interaptiv-mr2 -mips16 -32" "-mips32r3 -32" } \
+                { mips32r2 interaptiv-mr2 } \
+                MIPS32r3 "Imagination interAptiv MR2" \
+                { "DSP ASE" "Enhanced VA Scheme" "MT ASE" \
+                  "MIPS16 ASE" "MIPS16e2 ASE" }
+good_combination { "-march=interaptiv-mr2 -32" "-mips32r5 -32" } \
+                { mips32r2 interaptiv-mr2 } \
+                MIPS32r5 "Imagination interAptiv MR2" \
+                { "DSP ASE" "Enhanced VA Scheme" "MT ASE" }
+good_combination { "-march=interaptiv-mr2 -32" "-march=m5100 -32" } \
+                { mips32r2 interaptiv-mr2 } \
+                MIPS32r5 "Imagination interAptiv MR2" \
+                { "DSP ASE" "Enhanced VA Scheme" \
+                  "MCU (MicroController) ASE" "MT ASE" }
+
+good_combination { "-march=gs464 -32" "-march=gs464e -32" }    \
+                { gs464e o32 }                                 \
+                MIPS64r2 "None"                                \
+                { "Loongson MMI ASE" "Loongson CAM ASE" "Loongson EXT ASE" "Loongson EXT2 ASE" }
+good_combination { "-march=gs264e -32" "-march=gs464e -32" }   \
+                { gs264e o32 }                                 \
+                MIPS64r2 "None"                                \
+                { "Loongson MMI ASE" "Loongson CAM ASE" "Loongson EXT ASE" "Loongson EXT2 ASE" }