x86: Update GNU_PROPERTY_X86_XXX macros

[deliverable/binutils-gdb.git] / ld / testsuite / ld-mips-elf / mips-elf-flags.exp

diff --git a/ld/testsuite/ld-mips-elf/mips-elf-flags.exp b/ld/testsuite/ld-mips-elf/mips-elf-flags.exp
index dbe4132c56879461bfa8e5b90d7b3178adbf3ccf..654f8ae76c73a338172cd25e0b740cad25bbf92a 100644 (file)
--- a/ld/testsuite/ld-mips-elf/mips-elf-flags.exp
+++ b/ld/testsuite/ld-mips-elf/mips-elf-flags.exp
@@ -1,4 +1,4 @@
-#   Copyright (C) 2003-2017 Free Software Foundation, Inc.
+#   Copyright (C) 2003-2018 Free Software Foundation, Inc.
 #
 # This file is part of the GNU Binutils.
 #
@@ -199,6 +199,17 @@ isa_conflict { "-march=r5900 -32"      "-march=vr4111 -32" } 5900 4111
 isa_conflict { "-march=loongson2e -32" "-march=loongson2f -32" } loongson_2e loongson_2f
 isa_conflict { "-march=loongson3a -32" "-march=loongson2f -32" } loongson_3a loongson_2f
 
+isa_conflict { "-march=interaptiv-mr2 -32" \
+              "-march=r4010 -32" } interaptiv-mr2 4010
+isa_conflict { "-march=interaptiv-mr2 -mnan=2008 -mfp64 -32" \
+              "-mips32r6 -32" } interaptiv-mr2 isa32r6
+isa_conflict { "-march=interaptiv-mr2 -32" \
+              "-mips3 -32" } interaptiv-mr2 4000
+isa_conflict { "-march=interaptiv-mr2 -32" \
+              "-mips64r2 -32" } interaptiv-mr2 isa64r2
+isa_conflict { "-march=interaptiv-mr2 -32" \
+              "-march=octeon -32" } interaptiv-mr2 octeon
+
 regsize_conflict { "-mips4 -mgp64 -mabi=o64"         "-mips2 -32" }
 regsize_conflict { "-mips4 -mabi=o64"                "-mips4 -mabi=32" }
 regsize_conflict { "-mips4 -mabi=eabi -mgp32"        "-mips4 -mabi=eabi -mgp64" }
@@ -225,3 +236,37 @@ good_combination { "-march=sb1 -mgp32 -32"   "-march=4000 -mgp32 -32" } { sb1 o3
 good_combination { "-mips32 -mabi=32"        "-march=sb1 -mabi=32" } { sb1 o32 }
 good_combination { "-mips64r2 -mabi=32"      "-mips32 -mabi=32" } { mips64r2 o32 }
 good_combination { "-mips5 -mabi=o64"        "-mips64r2 -mabi=o64" } { mips64r2 o64 }
+
+good_combination { "-march=interaptiv-mr2 -32" "-mips1 -32" } \
+                { mips32r2 interaptiv-mr2 } \
+                MIPS32r3 "Imagination interAptiv MR2" \
+                { "DSP ASE" "Enhanced VA Scheme" "MT ASE" }
+good_combination { "-march=interaptiv-mr2 -32" "-mips32r2 -32" } \
+                { mips32r2 interaptiv-mr2 } \
+                MIPS32r3 "Imagination interAptiv MR2" \
+                { "DSP ASE" "Enhanced VA Scheme" "MT ASE" }
+good_combination { "-march=interaptiv-mr2 -32" "-march=interaptiv -32" } \
+                { mips32r2 interaptiv-mr2 } \
+                MIPS32r3 "Imagination interAptiv MR2" \
+                { "DSP ASE" "Enhanced VA Scheme" "MT ASE" }
+good_combination { "-march=interaptiv-mr2 -32" "-mips32r3 -32" } \
+                { mips32r2 interaptiv-mr2 } \
+                MIPS32r3 "Imagination interAptiv MR2" \
+                { "DSP ASE" "Enhanced VA Scheme" "MT ASE" }
+good_combination { "-march=interaptiv-mr2 -32" "-mips32r3 -mips16 -32" } \
+                { mips32r2 interaptiv-mr2 } \
+                MIPS32r3 "Imagination interAptiv MR2" \
+                { "DSP ASE" "Enhanced VA Scheme" "MT ASE" "MIPS16 ASE" }
+good_combination { "-march=interaptiv-mr2 -mips16 -32" "-mips32r3 -32" } \
+                { mips32r2 interaptiv-mr2 } \
+                MIPS32r3 "Imagination interAptiv MR2" \
+                { "DSP ASE" "Enhanced VA Scheme" "MT ASE" \
+                  "MIPS16 ASE" "MIPS16e2 ASE" }
+good_combination { "-march=interaptiv-mr2 -32" "-mips32r5 -32" } \
+                { mips32r2 interaptiv-mr2 } \
+                MIPS32r5 "Imagination interAptiv MR2" \
+                { "DSP ASE" "Enhanced VA Scheme" "MT ASE" }
+good_combination { "-march=interaptiv-mr2 -32" "-march=m5100 -32" } \
+                { mips32r2 interaptiv-mr2 } \
+                MIPS32r5 "Imagination interAptiv MR2" \
+                { "DSP ASE" "Enhanced VA Scheme" "MT ASE" }