+Tue Jan 27 21:52:59 1998 Jeffrey A Law (law@cygnus.com)
+
+ * mips-dis.c (_print_insn_mips): Set target_processor as appropriate.
+ Only recognize instructions for the current target_processor.
+
+start-sanitize-sky
+Tue Jan 27 14:11:04 1998 Doug Evans <devans@seba.cygnus.com>
+
+ * txvu-dis.c (*): Update to use new arguments in
+ parse/insert/extract/print fns.
+ * txvu-opc.c (*): Likewise.
+
+Mon Jan 26 16:25:51 1998 Doug Evans <devans@seba.cygnus.com>
+
+ * txvu-dis.c (print_insn): Extract/print fns take pointer to
+ insn now and not insn itself.
+ * txvu-opc.c: insert/extract/print fns take pointer to
+ insn now and not insn itself. Add initial dma,pke,gpuif support.
+ Parse fn no longer needs to set errmsg = NULL for success.
+ (lookup_keyword_{value,name}): New functions.
+ (scan_symbol): New function.
+ (issymchar,SKIP_BLANKS): New macros.
+
+Fri Jan 23 01:49:24 1998 Doug Evans <devans@seba.cygnus.com>
+
+ * txvu-opc.c (txvu_operands, UBC): Add extract entry.
+ (txvu_operands, UACCDEST): Not a fake operand.
+ (txvu_operands, UXYZ): Move parse entry to insert entry.
+ (txvu_operands, LVI01): Not a fake operand.
+ (txvu_upper_opcodes): Fix spelling of minii instruction.
+ (printf_vfreg): Print register number with "%02ld".
+ (print_bcftreg): Likewise.
+ (print_accdest): Pass `dest' to _print_dest.
+ (insert_xyz): Renamed from parse_xyz.
+ (parse_dest1,insert_luimm12up6): New functions.
+ (txvu_operands): New operands LUIMM12UP6, LDEST1.
+ (txvu_lower_opcodes): Clean up pass over table.
+ (parse_dotdest1): Fix dest calculation.
+ (_parse_sdest): Fix typo.
+
+end-sanitize-sky
+Thu Jan 22 16:20:17 1998 Fred Fish <fnf@cygnus.com>
+
+ * d10v-dis.c (PC_MASK): Correct value.
+ (print_operand): If there's a reloc, don't calculate the
+ address because they could be in different sections.
+
+start-sanitize-cygnus
+Thu Jan 22 16:10:32 1998 Doug Evans <devans@seba.cygnus.com>
+
+ * cgen.sh: Rewrite to be like simulator's version.
+ * Makefile.am (cgen): Update call to cgen.sh.
+ * Makefile.in: Regenerate
+
+end-sanitize-cygnus
+Fri Jan 16 15:29:11 1998 Jim Blandy <jimb@zwingli.cygnus.com>
+
+ * mips-opc.c (mips_builtin_opcodes): Move 4010's "addciu"
+ instruction after the 4650's "mul" instruction; nobody's using the
+ 4010 these days. If object files someday indicate which processor
+ variant they're intended for, we can do a better job at this.
+
+start-sanitize-r5900
+Tue Jan 13 09:21:56 1998 Jeffrey A Law (law@cygnus.com)
+
+ * mips-opc.c (c.lt.s): Add r5900 variant.
+ (c.le.s): Likewise.
+
+end-sanitize-r5900
+Mon Jan 12 14:43:54 1998 Doug Evans <devans@seba.cygnus.com>
+
+ * cgen-asm.c (build_asm_hash_table): Traverse compiled in table using
+ table provided entry size. Use CGEN_INSN_MNEMONIC.
+ (cgen_parse_keyword): Rewrite.
+ * cgen-dis.c (build_dis_hash_table): Traverse compiled in table using
+ table provided entry size. Use CGEN_INSN_MASK_BITSIZE.
+ * cgen-opc.c: Clean up pass over `struct foo' usage.
+ (cgen_keyword_lookup_value): Handle "" entry.
+ (cgen_keyword_add): Likewise.
+start-sanitize-cygnus
+ * Makefile.am: Add cgen support.
+ * Makefile.in: Regenerate.
+ * configure.in: Add cgen support.
+ * configure: Regenerate.
+ * aclocal.m4: Regenerate.
+ * cgen.sh, cgen-asm.in, cgen-dis.in: New files.
+end-sanitize-cygnus
+
+start-sanitize-sky
+Tue Jan 6 13:08:14 1998 Doug Evans <devans@seba.cygnus.com>
+
+ * txvu-dis.c (print_insn_txvu): Handle no separator between
+ upper and lower insn #ifndef VERTICAL_BAR_SEPARATOR.
+
+Mon Jan 5 13:41:07 1998 Doug Evans <devans@seba.cygnus.com>
+
+ * txvu-dis.c, txvu-opc.c: New files.
+ * configure.in: Compile them.
+ * configure: Regenerate.
+ * Makefile.am (ALL_MACHINES): Add txvu-{dis,opc}.lo.
+ (txvu-dis.lo,txvu-opc.lo): Add rules for.
+ * Makefile.in: Regenerate.
+
+Mon Dec 22 17:17:03 1997 Doug Evans <devans@canuck.cygnus.com>
+
+ * configure.in: Add txvu support.
+ * configure: Regenerate.
+ * disassemble.c: Add txvu support.
+
+end-sanitize-sky
+Mon Dec 22 12:37:06 1997 Ian Lance Taylor <ian@cygnus.com>
+
+ * mips-opc.c: Add FP_D to s.d instruction flags.
+
+Wed Dec 17 11:38:29 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
+
+ * m68k-opc.c (halt, pulse): Enable them on the 68060.
+
+start-sanitize-tic80
+Tue Dec 16 15:22:53 1997 Fred Fish <fnf@cygnus.com>
+
+ * tic80-opc.c (tic80_opcodes): Revert change that put the 32 bit
+ PC relative offset forms before the 15 bit forms. An assembler command
+ line option now chooses the default.
+
+end-sanitize-tic80
+start-sanitize-r5900
+Tue Dec 16 13:24:22 1997 Jeffrey A Law (law@cygnus.com)
+
+ * mips-opc.c: Add many missing r5900 instructions.
+
+end-sanitize-r5900
start-sanitize-r5900
Tue Dec 16 15:22:51 1997 Michael Meissner <meissner@cygnus.com>
* configure: Only build libopcodes shared if --enable-shared's value
was `yes', or was set to `*opcodes*'.
* aclocal.m4: Likewise.
+ * NOTE: this really needs to be fixed in libtool/libtool.m4, the
+ original source of this bit of code. It's not clear what the best fix
+ would be, though.
start-sanitize-r5900
Mon Dec 15 12:43:36 1997 Jeffrey A Law (law@cygnus.com)
Thu Oct 23 21:13:37 1997 Fred Fish <fnf@cygnus.com>
- * d10v-opc.c (d10v_opcodes): Correct entry for RTE.
+ * d10v-opc.c (d10v_opcodes): Correct entry for RTE.
Mon Dec 8 11:21:07 1997 Nick Clifton <nickc@cygnus.com>