-2007-05-03 H.J. Lu <hongjiu.lu@intel.com>
+2008-02-14 Nick Clifton <nickc@redhat.com>
- * i386-dis.c (CRC32_Fixup): Don't print suffix in Intel mode.
+ PR binutils/5524
+ * configure.in (SHARED_LIBADD): Select the correct host specific
+ file extension for shared libraries.
+ * configure: Regenerate.
- * i386-opc.c (i386_optab): Remove IgnoreSize and correct operand
- type for crc32.
+2008-02-13 Jan Beulich <jbeulich@novell.com>
-2007-05-01 H.J. Lu <hongjiu.lu@intel.com>
+ * i386-opc.h (RegFlat): New.
+ * i386-reg.tbl (flat): Add.
+ * i386-tbl.h: Re-generate.
- * i386-dis.c (CRC32_Fixup): Properly handle Intel mode and
- check data size prefix in 16bit mode.
+2008-02-13 Jan Beulich <jbeulich@novell.com>
- * i386-opc.c (i386_optab): Default crc32 to non-8bit and
- support Intel mode.
+ * i386-dis.c (a_mode): New.
+ (cond_jump_mode): Adjust.
+ (Ma): Change to a_mode.
+ (intel_operand_size): Handle a_mode.
+ * i386-opc.tbl: Allow Dword and Qword for bound.
+ * i386-tbl.h: Re-generate.
-2007-04-30 Mark Salter <msalter@redhat.com>
-
- * frv-desc.c: Regenerate.
- * frv-desc.h: Regenerate.
-
-2007-04-30 Alan Modra <amodra@bigpond.net.au>
+2008-02-13 Jan Beulich <jbeulich@novell.com>
- PR 4436
- * ppc-opc.c (powerpc_operands): Correct bitm for second entry of MBE.
+ * i386-gen.c (process_i386_registers): Process new fields.
+ * i386-opc.h (reg_entry): Shrink reg_flags and reg_num to
+ unsigned char. Add dw2_regnum and Dw2Inval.
+ * i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo
+ register names.
+ * i386-tbl.h: Re-generate.
-2007-04-27 H.J. Lu <hongjiu.lu@intel.com>
+2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
- * i386-dis.c (modrm): Put reg before rm.
+ * i386-gen.c (cpu_flag_init): Add CPU_XSAVE_FLAGS.
+ * i386-init.h: Updated.
-2007-04-26 H.J. Lu <hongjiu.lu@intel.com>
+2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
- PR binutils/4430
- * i386-dis.c (print_displacement): New.
- (OP_E): Call print_displacement instead of print_operand_value
- to output displacement when either base or index exist. Print
- the explicit zero displacement in 16bit mode.
+ * i386-gen.c (cpu_flags): Add CpuXsave.
-2007-04-26 H.J. Lu <hongjiu.lu@intel.com>
+ * i386-opc.h (CpuXsave): New.
+ (CpuLM): Updated.
+ (i386_cpu_flags): Add cpuxsave.
- PR binutils/4429
- * i386-dis.c (print_insn): Also swap the order of op_riprel
- when swapping op_index. Break when the RIP relative address
- is printed.
- (OP_E): Properly handle RIP relative addressing and print the
- explicit zero displacement for Intel mode.
+ * i386-dis.c (MOD_0FAE_REG_4): New.
+ (RM_0F01_REG_2): Likewise.
+ (MOD_0FAE_REG_5): Updated.
+ (RM_0F01_REG_3): Likewise.
+ (reg_table): Use MOD_0FAE_REG_4.
+ (mod_table): Use RM_0F01_REG_2. Add MOD_0FAE_REG_4. Updated
+ for xrstor.
+ (rm_table): Add RM_0F01_REG_2.
-2007-04-27 Alan Modra <amodra@bigpond.net.au>
+ * i386-opc.tbl: Add xsave, xrstor, xgetbv and xsetbv.
+ * i386-init.h: Regenerated.
+ * i386-tbl.h: Likewise.
- * Makefile.am: Run "make dep-am".
- * Makefile.in: Regenerate.
- * ns32k-dis.c: Include sysdep.h first.
+2008-02-11 Jan Beulich <jbeulich@novell.com>
-2007-04-24 Andreas Krebbel <krebbel1@de.ibm.com>
+ * i386-opc.tbl: Remove Disp32S from CpuNo64 opcodes. Remove
+ Disp16 from Cpu64 non-jump opcodes (including loop and j?cxz).
+ * i386-tbl.h: Re-generate.
- * opcodes/s390-opc.c (MASK_SSF_RRDRD): Fourth nybble belongs to the
- opcode.
- * opcodes/s390-opc.txt (pfpo, ectg, csst): Add new z9-ec instructions.
+2008-02-04 H.J. Lu <hongjiu.lu@intel.com>
-2007-04-24 Nick Clifton <nickc@redhat.com>
-
- * arm-dis.c (print_insn): Initialise type.
-
-2007-04-24 Alan Modra <amodra@bigpond.net.au>
+ PR 5715
+ * configure: Regenerated.
- * cgen-types.h: Include bfd_stdint.h, not stdint.h.
- * Makefile.am: Run "make dep-am".
- * Makefile.in: Regenerate.
+2008-02-04 Adam Nemet <anemet@caviumnetworks.com>
-2007-04-23 Nathan Sidwell <nathan@codesourcery.com>
+ * mips-dis.c: Update copyright.
+ (mips_arch_choices): Add Octeon.
+ * mips-opc.c: Update copyright.
+ (IOCT): New macro.
+ (mips_builtin_opcodes): Add Octeon instruction synciobdma.
- * m68k-opc.c: Mark mcfisa_c instructions.
+2008-01-29 Alan Modra <amodra@bigpond.net.au>
-2007-04-21 Richard Earnshaw <rearnsha@arm.com>
+ * ppc-opc.c: Support optional L form mtmsr.
- * arm-dis.c (arm_opcodes): Disassemble to unified syntax.
- (thumb_opcodes): Add missing white space in adr.
- (arm_decode_shift): New parameter, print_shift. Only decode the
- shift parameter if set. Adjust callers.
- (print_insn_arm): Support for operand type q with no shift decode.
+2008-01-24 H.J. Lu <hongjiu.lu@intel.com>
-2007-04-21 Alan Modra <amodra@bigpond.net.au>
+ * i386-dis.c (OP_E_extended): Handle r12 like rsp.
- * i386-opc.c (i386_float_regtab, i386_float_regtab_size): Delete.
- Move contents to..
- (i386_regtab): ..here.
- * i386-opc.h (i386_float_regtab, i386_float_regtab_size): Delete.
+2008-01-23 H.J. Lu <hongjiu.lu@intel.com>
- * ppc-opc.c (powerpc_operands): Delete duplicate entries.
- (BA_MASK, FXM_MASK, STRM_MASK, VA_MASK, VB_MASK, VC_MASK): Delete.
- (VD_MASK, WS_MASK, MTMSRD_L, XRT_L): Delete.
- (powerpc_opcodes): Replace uses of MTMSRD_L and XRT_L.
+ * i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS.
+ * i386-init.h: Regenerated.
-2007-04-20 Nathan Sidwell <nathan@codesourcery.com>
+2008-01-23 Tristan Gingold <gingold@adacore.com>
- * m68k-dis.c (print_insn_arg): Show c04 as rambar0 and c05 as
- rambar1.
+ * ia64-dis.c (print_insn_ia64): Display symbolic name of ar.fcr,
+ ar.eflag, ar.csd, ar.ssd, ar.cflg, ar.fsr, ar.fir and ar.fdr.
-2007-04-20 Alan Modra <amodra@bigpond.net.au>
+2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
- * ppc-dis.c (print_insn_powerpc): Adjust for struct powerpc_operand
- change.
- * ppc-opc.c (powerpc_operands): Replace bit count with bit mask
- in all entries. Add PPC_OPERAND_SIGNED to DE entry. Remove
- references to following deleted functions.
- (insert_bd, extract_bd, insert_dq, extract_dq): Delete.
- (insert_ds, extract_ds, insert_de, extract_de): Delete.
- (insert_des, extract_des, insert_li, extract_li): Delete.
- (insert_nb, insert_rsq, insert_rtq, insert_ev2, extract_ev2): Delete.
- (insert_ev4, extract_ev4, insert_ev8, extract_ev8): Delete.
- (num_powerpc_operands): New constant.
- (XSPRG_MASK): Remove entire SPRG field.
- (powerpc_opcodes <bcctre, bcctrel>): Use XLBB_MASK not XLYBB_MASK.
+ * i386-gen.c (cpu_flag_init): Remove CpuMMX2.
+ (cpu_flags): Likewise.
-2007-04-20 Alan Modra <amodra@bigpond.net.au>
+ * i386-opc.h (CpuMMX2): Removed.
+ (CpuSSE): Updated.
- * ppc-opc.c (DCM, DGM, TE, RMC, R, SP, S): Correct shift.
- (Z2_MASK): Define.
- (powerpc_opcodes): Use Z2_MASK in all insns taking RMC operand.
+ * i386-opc.tbl: Replace CpuMMX2 with CpuSSE|Cpu3dnowA.
+ * i386-init.h: Regenerated.
+ * i386-tbl.h: Likewise.
-2007-04-20 Richard Earnshaw <rearnsha@arm.com>
+2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
- * arm-dis.c (print_insn): Only look for a mapping symbol in the section
- being disassembled.
+ * i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and
+ CPU_SMX_FLAGS.
+ * i386-init.h: Regenerated.
-2007-04-19 Alan Modra <amodra@bigpond.net.au>
+2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
- * Makefile.am: Run "make dep-am".
- * Makefile.in: Regenerate.
- * po/POTFILES.in: Regenerate.
+ * i386-opc.tbl: Use Qword on movddup.
+ * i386-tbl.h: Regenerated.
-2007-04-19 Alan Modra <amodra@bigpond.net.au>
+2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
- * ppc-opc.c (powerpc_opcodes): Add cctpl, cctpm, cctph, db8cyc,
- db10cyc, db12cyc, db16cyc.
+ * i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax.
+ * i386-tbl.h: Regenerated.
-2007-04-19 Nathan Froyd <froydnj@codesourcery.com>
+2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
- * ppc-opc.c (powerpc_opcodes): Recognize three-operand tlbsxe.
+ * i386-dis.c (Mx): New.
+ (PREFIX_0FC3): Likewise.
+ (PREFIX_0FC7_REG_6): Updated.
+ (dis386_twobyte): Use PREFIX_0FC3.
+ (prefix_table): Add PREFIX_0FC3. Use Mq on movntq and movntsd.
+ Use Mx on movntps, movntpd, movntdq and movntdqa. Use Md on
+ movntss.
-2007-04-18 H.J. Lu <hongjiu.lu@intel.com>
+2008-01-14 H.J. Lu <hongjiu.lu@intel.com>
- * i386-dis.c (CRC32_Fixup): New.
- (PREGRP85, PREGRP86, PREGRP87, PREGRP88, PREGRP89, PREGRP90,
- PREGRP91): New.
- (threebyte_0x38_uses_DATA_prefix): Updated for SSE4.2.
- (threebyte_0x3a_uses_DATA_prefix): Likewise.
- (prefix_user_table): Add PREGRP85, PREGRP86, PREGRP87,
- PREGRP88, PREGRP89, PREGRP90 and PREGRP91.
- (three_byte_table): Likewise.
+ * i386-gen.c (opcode_modifiers): Add IntelSyntax.
+ (operand_types): Add Mem.
- * i386-opc.c (i386_optab): Add SSE4.2 opcodes.
+ * i386-opc.h (IntelSyntax): New.
+ * i386-opc.h (Mem): New.
+ (Byte): Updated.
+ (Opcode_Modifier_Max): Updated.
+ (i386_opcode_modifier): Add intelsyntax.
+ (i386_operand_type): Add mem.
- * i386-opc.h (CpuSSE4_2): New.
- (CpuSSE4): Likewise.
- (CpuUnknownFlags): Add CpuSSE4_2.
+ * i386-opc.tbl: Remove Reg16 from movnti. Add sizes to more
+ instructions.
-2007-04-18 H.J. Lu <hongjiu.lu@intel.com>
+ * i386-reg.tbl: Add size for accumulator.
- * i386-dis.c (XMM_Fixup): New.
- (Edqb): New.
- (Edqd): New.
- (XMM0): New.
- (dqb_mode): New.
- (dqd_mode): New.
- (PREGRP39 ... PREGRP85): New.
- (threebyte_0x38_uses_DATA_prefix): Updated for SSE4.
- (threebyte_0x3a_uses_DATA_prefix): Likewise.
- (prefix_user_table): Add PREGRP39 ... PREGRP85.
- (three_byte_table): Likewise.
- (putop): Handle 'K'.
- (intel_operand_size): Handle dqb_mode, dqd_mode):
- (OP_E): Likewise.
- (OP_G): Likewise.
+ * i386-init.h: Regenerated.
+ * i386-tbl.h: Likewise.
- * i386-opc.c (i386_optab): Add SSE4.1 opcodes.
+2008-01-13 H.J. Lu <hongjiu.lu@intel.com>
- * i386-opc.h (CpuSSE4_1): New.
- (CpuUnknownFlags): Add CpuSSE4_1.
- (regKludge): Update comment.
+ * i386-opc.h (Byte): Fix a typo.
-2007-04-18 Matthias Klose <doko@ubuntu.com>
+2008-01-12 H.J. Lu <hongjiu.lu@intel.com>
- * Makefile.am (libopcodes_la_LDFLAGS): Use bfd soversion.
- * Makefile.in: Regenerate.
+ PR gas/5534
+ * i386-gen.c (operand_type_init): Add Dword to
+ OPERAND_TYPE_ACC32. Add Qword to OPERAND_TYPE_ACC64.
+ (opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
+ Qword and Xmmword.
+ (operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
+ Xmmword, Unspecified and Anysize.
+ (set_bitfield): Make Mmword an alias of Qword. Make Oword
+ an alias of Xmmword.
-2007-04-14 Steve Ellcey <sje@cup.hp.com>
+ * i386-opc.h (CheckSize): Removed.
+ (Byte): Updated.
+ (Word): Likewise.
+ (Dword): Likewise.
+ (Qword): Likewise.
+ (Xmmword): Likewise.
+ (FWait): Updated.
+ (OTMax): Likewise.
+ (i386_opcode_modifier): Remove checksize, byte, word, dword,
+ qword and xmmword.
+ (Fword): New.
+ (TBYTE): Likewise.
+ (Unspecified): Likewise.
+ (Anysize): Likewise.
+ (i386_operand_type): Add byte, word, dword, fword, qword,
+ tbyte xmmword, unspecified and anysize.
- * Makefile.am: Add ACLOCAL_AMFLAGS.
- * Makefile.in: Regenerate.
+ * i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
+ Tbyte, Xmmword, Unspecified and Anysize.
-2007-04-13 H.J. Lu <hongjiu.lu@intel.com>
+ * i386-reg.tbl: Add size for accumulator.
- * i386-dis.c: Remove trailing white spaces.
- * i386-opc.c: Likewise.
- * i386-opc.h: Likewise.
+ * i386-init.h: Regenerated.
+ * i386-tbl.h: Likewise.
-2007-04-11 H.J. Lu <hongjiu.lu@intel.com>
+2008-01-10 H.J. Lu <hongjiu.lu@intel.com>
- PR binutils/4333
- * i386-dis.c (GRP1a): New.
- (GRP1b ... GRPPADLCK2): Update index.
- (dis386): Use GRP1a for entry 0x8f.
- (mod, rm, reg): Removed. Replaced by ...
- (modrm): This.
- (grps): Add GRP1a.
+ * i386-dis.c (REG_0F0E): Renamed to REG_0F0D.
+ (REG_0F18): Updated.
+ (reg_table): Updated.
+ (dis386_twobyte): Updated. Use "nopQ" on 0x19 to 0x1e.
+ (twobyte_has_modrm): Set 1 for 0x19 to 0x1e.
-2007-04-09 Kazu Hirata <kazu@codesourcery.com>
+2008-01-08 H.J. Lu <hongjiu.lu@intel.com>
- * m68k-dis.c (print_insn_m68k): Restore info->fprintf_func and
- info->print_address_func if longjmp is called.
+ * i386-gen.c (set_bitfield): Use fail () on error.
-2007-03-29 DJ Delorie <dj@redhat.com>
+2008-01-08 H.J. Lu <hongjiu.lu@intel.com>
- * m32c-desc.c: Regenerate.
- * m32c-dis.c: Regenerate.
- * m32c-opc.c: Regenerate.
+ * i386-gen.c (lineno): New.
+ (filename): Likewise.
+ (set_bitfield): Report filename and line numer on error.
+ (process_i386_opcodes): Set filename and update lineno.
+ (process_i386_registers): Likewise.
-2007-03-28 H.J. Lu <hongjiu.lu@intel.com>
+2008-01-05 H.J. Lu <hongjiu.lu@intel.com>
- * i386-opc.c (i386_optab): Change InvMem to RegMem for mov and
- movq. Remove InvMem from sldt, smsw and str.
+ * i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
+ ATTSyntax.
- * i386-opc.h (InvMem): Renamed to ...
- (RegMem): Update comments.
- (AnyMem): Remove InvMem.
+ * i386-opc.h (IntelMnemonic): Renamed to ..
+ (ATTSyntax): This
+ (Opcode_Modifier_Max): Updated.
+ (i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
+ and intelsyntax.
-2007-03-27 Paul Brook <paul@codesourcery.com>
+ * i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax
+ on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
+ * i386-tbl.h: Regenerated.
- * arm-dis.c (thumb_opcodes): Add entry for undefined insns (0xbe??).
+2008-01-04 H.J. Lu <hongjiu.lu@intel.com>
-2007-03-24 Paul Brook <paul@codesourcery.com>
-
- * arm-dis.c (coprocessor_opcodes): Remove superfluous 0x.
- (print_insn_coprocessor): Handle %<bitfield>x.
+ * i386-gen.c: Update copyright to 2008.
+ * i386-opc.h: Likewise.
+ * i386-opc.tbl: Likewise.
-2007-03-24 Paul Brook <paul@codesourcery.com>
- Mark Shinwell <shinwell@codesourcery.com>
+ * i386-init.h: Regenerated.
+ * i386-tbl.h: Likewise.
- * arm-dis.c (arm_opcodes): Print SRS base register.
+2008-01-04 H.J. Lu <hongjiu.lu@intel.com>
-2007-03-23 H.J. Lu <hongjiu.lu@intel.com>
+ * i386-opc.tbl: Add NoRex64 to extractps, movmskpd, movmskps,
+ pextrb, pextrw, pinsrb, pinsrw and pmovmskb.
+ * i386-tbl.h: Regenerated.
- * i386-dis.c (prefix_name): Replace rex64XYZ with rex.WRXB.
+2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
- * i386-opc.c (i386_optab): Add rex.wrxb.
+ * i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and
+ CpuSSE4_2_Or_ABM.
+ (cpu_flags): Likewise.
-2007-03-21 H.J. Lu <hongjiu.lu@intel.com>
+ * i386-opc.h (CpuSSE4_1_Or_5): Removed.
+ (CpuSSE4_2_Or_ABM): Likewise.
+ (CpuLM): Updated.
+ (i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm.
- * i386-dis.c (REX_MODE64): Remove definition.
- (REX_EXTX): Likewise.
- (REX_EXTY): Likewise.
- (REX_EXTZ): Likewise.
- (USED_REX): Use REX_OPCODE instead of 0x40.
- Replace REX_MODE64, REX_EXTX, REX_EXTY and REX_EXTZ with REX_W,
- REX_R, REX_X and REX_B respectively.
+ * i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and
+ Cpu686|CpuPadLock with CpuSSE4_1|CpuSSE5, CpuABM|CpuSSE4_2
+ and CpuPadLock, respectively.
+ * i386-init.h: Regenerated.
+ * i386-tbl.h: Likewise.
-2007-03-21 H.J. Lu <hongjiu.lu@intel.com>
+2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
- PR binutils/4218
- * i386-dis.c (PREGRP38): New.
- (dis386): Use PREGRP38 for 0x90.
- (prefix_user_table): Add PREGRP38.
- (print_insn): Set uses_REPZ_prefix to 1 for pause.
- (NOP_Fixup1): Properly handle REX bits.
- (NOP_Fixup2): Likewise.
+ * i386-gen.c (opcode_modifiers): Remove No_xSuf.
- * i386-opc.c (i386_optab): Allow %eax with xchg in 64bit.
- Allow register with nop.
+ * i386-opc.h (No_xSuf): Removed.
+ (CheckSize): Updated.
-2007-03-20 DJ Delorie <dj@redhat.com>
+ * i386-tbl.h: Regenerated.
- * m32c-asm.c: Regenerate.
- * m32c-desc.c: Regenerate.
- * m32c-desc.h: Regenerate.
- * m32c-dis.h: Regenerate.
- * m32c-ibld.c: Regenerate.
- * m32c-opc.c: Regenerate.
- * m32c-opc.h: Regenerate.
+2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
-2007-03-15 H.J. Lu <hongjiu.lu@intel.com>
+ * i386-gen.c (cpu_flag_init): Add CpuSSE4_2_Or_ABM to
+ CPU_AMDFAM10_FLAGS, CPU_SSE4_2_FLAGS, CpuABM and
+ CPU_SSE5_FLAGS.
+ (cpu_flags): Add CpuSSE4_2_Or_ABM.
- * i386-opc.c: Include "libiberty.h".
- (i386_regtab): Remove the last entry.
- (i386_regtab_size): New.
- (i386_float_regtab_size): Likewise.
+ * i386-opc.h (CpuSSE4_2_Or_ABM): New.
+ (CpuLM): Updated.
+ (i386_cpu_flags): Add cpusse4_2_or_abm.
- * i386-opc.h (i386_regtab_size): New.
- (i386_float_regtab_size): Likewise.
+ * i386-opc.tbl: Use CpuSSE4_2_Or_ABM instead of
+ CpuABM|CpuSSE4_2 on popcnt.
+ * i386-init.h: Regenerated.
+ * i386-tbl.h: Likewise.
-2007-03-15 H.J. Lu <hongjiu.lu@intel.com>
+2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
- * Makefile.am (CFILES): Add i386-opc.c.
- (ALL_MACHINES): Add i386-opc.lo.
- Run "make dep-am".
- * Makefile.in: Regenerated.
+ * i386-opc.h: Update comments.
- * configure.in: Add i386-opc.lo for bfd_i386_arch.
- * configure: Regenerated.
+2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
- * i386-dis.c: Include "opcode/i386.h".
- (MAXLEN): Renamed to MAX_MNEM_SIZE. Remove definition.
- (FWAIT_OPCODE): Remove definition.
- (UNIXWARE_COMPAT): Renamed to SYSV386_COMPAT. Remove definition.
- (MAX_OPERANDS): Remove definition.
-
- * i386-opc.c: New file.
+ * i386-gen.c (opcode_modifiers): Use Qword instead of QWord.
* i386-opc.h: Likewise.
+ * i386-opc.tbl: Likewise.
-2007-03-15 H.J. Lu <hongjiu.lu@intel.com>
-
- * Makefile.in: Regenerated.
-
-2007-03-09 H.J. Lu <hongjiu.lu@intel.com>
-
- * i386-dis.c (OP_Rd): Renamed to ...
- (OP_R): This.
- (Rd): Updated.
- (Rm): Likewise.
-
-2007-03-08 Alan Modra <amodra@bigpond.net.au>
-
- * fr30-asm.c: Regenerate.
- * frv-asm.c: Regenerate.
- * ip2k-asm.c: Regenerate.
- * iq2000-asm.c: Regenerate.
- * m32c-asm.c: Regenerate.
- * m32r-asm.c: Regenerate.
- * m32r-dis.c: Regenerate.
- * mt-asm.c: Regenerate.
- * mt-ibld.c: Regenerate.
- * mt-opc.c: Regenerate.
- * openrisc-asm.c: Regenerate.
- * xc16x-asm.c: Regenerate.
- * xstormy16-asm.c: Regenerate.
-
- * Makefile.am: Run "make dep-am".
- * Makefile.in: Regenerate.
- * po/POTFILES.in: Regenerate.
-
-2007-03-06 Andreas Krebbel <krebbel1@de.ibm.com>
-
- * opcodes/s390-opc.c (INSTR_RRE_FR, INSTR_RRF_F0FF2, INSTR_RRF_F0FR,
- INSTR_RRF_UUFF, INSTR_RRF_0UFF, INSTR_RRF_FFFU, INSTR_RRR_F0FF): New
- instruction formats added.
- (MASK_RRE_FR, MASK_RRF_F0FF2, MASK_RRF_F0FR, MASK_RRF_UUFF,
- MASK_RRF_0UFF, MASK_RRF_FFFU, MASK_RRR_F0FF): New instruction format
- masks added.
- * opcodes/s390-opc.txt (lpdfr - tgxt): Decimal floating point
- instructions added.
- * opcodes/s390-mkopc.c (s390_opcode_cpu_val): S390_OPCODE_Z9_EC added.
- (main): z9-ec cpu type option added.
- * include/opcode/s390.h (s390_opcode_cpu_val): S390_OPCODE_Z9_EC added.
-
-2007-02-22 DJ Delorie <dj@redhat.com>
-
- * s390-opc.c (INSTR_SS_L2RDRD): New.
- (MASK_SS_L2RDRD): New.
- * s390-opc.txt (pka): Use it.
-
-2007-02-20 Thiemo Seufer <ths@mips.com>
- Chao-Ying Fu <fu@mips.com>
-
- * mips-dis.c (mips_arch_choices): Add DSP R2 support.
- (print_insn_args): Add support for balign instruction.
- * mips-opc.c (D33): New shortcut for DSP R2 instructions.
- (mips_builtin_opcodes): Add DSP R2 instructions.
-
-2007-02-19 Andreas Krebbel <krebbel1@de.ibm.com>
-
- * s390-opc.c (INSTR_RRF_U0FR, MASK_RRF_U0FR): Removed.
- (INSTR_RRF_U0RF, MASK_RRF_U0RF): Added.
- * s390-opc.txt (cfxbr, cfdbr, cfebr, cgebr, cgdbr, cgxbr, cger, cgdr,
- cgxr, cfxr, cfdr, cfer): Instruction type set to INSTR_RRF_U0RF.
-
-2007-02-19 Andreas Krebbel <krebbel1@de.ibm.com>
-
- * s390-opc.txt ("efpc", "sfpc"): Set to RRE_RR_OPT instruction type.
- * s390-opc.c (s390_operands): Add RO_28 as optional gpr.
- (INSTR_RRE_RR_OPT, MASK_RRE_RR_OPT): New instruction type for efpc
- and sfpc.
-
-2007-02-16 Nick Clifton <nickc@redhat.com>
-
- PR binutils/4045
- * avr-dis.c (comment_start): New variable, contains the prefix to
- use when printing addresses in comments.
- (print_insn_avr): Set comment_start to an empty space if there is
- no symbol table available as the generic address printing code
- will prefix the numeric value of the address with 0x.
-
-2007-02-13 H.J. Lu <hongjiu.lu@intel.com>
-
- * i386-dis.c: Updated to use an array of MAX_OPERANDS operands
- in struct dis386.
-
-2007-02-05 Dave Brolley <brolley@redhat.com>
- Richard Sandiford <rsandifo@redhat.com>
- DJ Delorie <dj@redhat.com>
- Graydon Hoare <graydon@redhat.com>
- Frank Ch. Eigler <fche@redhat.com>
- Ben Elliston <bje@redhat.com>
-
- * Makefile.am (HFILES): Add mep-desc.h mep-opc.h.
- (CFILES): Add mep-*.c
- (ALL_MACHINES): Add mep-*.lo.
- (CLEANFILES): Add stamp-mep.
- (CGEN_CPUS): Add mep.
- (MEP_DEPS): New variable.
- (mep-*): New targets.
- * configure.in: Handle bfd_mep_arch.
- * disassemble.c (ARCH_mep): New macro.
- (disassembler): Handle bfd_arch_mep.
- (disassemble_init_for_target): Likewise.
- * mep-*: New files for Toshiba Media Processor (MeP).
- * Makefile.in: Regenerated.
- * configure: Regenerated.
-
-2007-02-05 H.J. Lu <hongjiu.lu@intel.com>
-
- * i386-dis.c (OP_J): Undo the last change. Properly handle 64K
- wrap around within the same segment in 16bit mode.
-
-2007-02-02 H.J. Lu <hongjiu.lu@intel.com>
-
- * i386-dis.c (OP_J): Mask to 16bit only if there is a data16
- prefix.
-
-2007-02-02 H.J. Lu <hongjiu.lu@intel.com>
-
- * avr-dis.c (avr_operand): Correct PR number in comment.
-
-2007-02-02 H.J. Lu <hongjiu.lu@intel.com>
-
- * disassemble.c (disassembler_usage): Call
- print_i386_disassembler_options for i386 disassembler.
-
- * i386-dis.c (print_i386_disassembler_options): New.
- (print_insn): Support the new addr64 option.
-
-2007-02-02 Hiroki Kaminaga <kaminaga@sm.sony.co.jp>
-
- * ppc-dis.c (powerpc_dialect): Handle ppc440.
- * ppc-dis.c (print_ppc_disassembler_options): Note the -M440 can
- be used.
-
-2007-02-02 Alan Modra <amodra@bigpond.net.au>
-
- * ppc-opc.c (insert_bdm): -Many comment.
- (valid_bo): Add "extract" param. Accept both powerpc and power4
- BO fields when disassembling with -Many.
- (insert_bo, extract_bo, insert_boe, extract_boe): Adjust valid_bo call.
-
-2007-01-08 Kazu Hirata <kazu@codesourcery.com>
-
- * m68k-opc.c (m68k_opcodes): Replace cpu32 with
- cpu32 | fido_a except on tbl instructions.
-
-2007-01-04 Paul Brook <paul@codesourcery.com>
+2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
- * arm-dis.c (arm_opcodes): Fix cpsie and cpsid entries.
+ PR gas/5534
+ * i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
+ Byte, Word, Dword, QWord and Xmmword.
-2007-01-04 Andreas Schwab <schwab@suse.de>
+ * i386-opc.h (No_xSuf): New.
+ (CheckSize): Likewise.
+ (Byte): Likewise.
+ (Word): Likewise.
+ (Dword): Likewise.
+ (QWord): Likewise.
+ (Xmmword): Likewise.
+ (FWait): Updated.
+ (i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
+ Dword, QWord and Xmmword.
- * m68k-opc.c: Fix encoding of signed bit in the cpu32 tbls insns.
+ * i386-opc.tbl: Add CheckSize|QWord to movq if IgnoreSize is
+ used.
+ * i386-tbl.h: Regenerated.
-2007-01-04 Julian Brown <julian@codesourcery.com>
+2008-01-02 Mark Kettenis <kettenis@gnu.org>
- * arm-dis.c (neon_opcode): Fix disassembly for vshl, vqshl, vrshl,
- vqrshl instructions.
+ * m88k-dis.c (instructions): Fix fcvt.* instructions.
+ From Miod Vallat.
-For older changes see ChangeLog-2006
+For older changes see ChangeLog-2007
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