2007-09-14 H.J. Lu <hongjiu.lu@intel.com>
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
index 9867bbe8ed0103aa3e7b36670595ceeb123299e2..1b47123379445d93bbee9885a391415ded44baef 100644 (file)
@@ -1,3 +1,366 @@
+2007-09-14  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * Makefile.am: Run "make dep-am".
+       * Makefile.in: Regenerate.
+
+2007-09-14  Michael Meissner  <michael.meissner@amd.com>
+           Dwarakanath Rajagopal  <dwarak.rajagopal@amd.com>
+           Tony Linthicum  <tony.linthicum@amd.com>
+
+       * i386-opc.h (CpuSSE5):  New macro.
+       (i386_cpu_flags): Add Drex, Drexv and Drexc.
+
+       * i386-gen.c (cpu_flag_init): Add CPU_SSE5_FLAGS.
+       (operand_type_init): Add CpuSSE5.
+       (opcode_modifiers): Add Drex, Drexv and Drexc.
+       (i386_opcode_modifier): Ditto.
+
+       * i386-opc.tbl (fmaddps,fmaddpd,fmaddss,fmaddsd): Define SSE5
+       instructions here.
+       (fmsubps,fmsubpd,fmsubss,fmsubsd): Ditto.
+       (fnmaddps,fnmaddpd,fnmaddss,fnmaddsd): Ditto.
+       (fnmsubps,fnmsubpd,fnmsubss,fnmsubsd): Ditto.
+       (pmacssww,pmacsww,pmacsswd,pmacswd): Ditto.
+       (pmacssdd,pmacsdd,pmacssdql,pmacssdqh): Ditto.
+       (pmacsdql,pmacsdqh,pmadcsswd,pmadcswd): Ditto.
+       (phaddbw,phaddbd,phaddbq,phaddwd): Ditto.
+       (phaddwq,phadddq,phaddubw,phaddubd): Ditto.
+       (phaddubq,phadduwd,phadduwq,phaddudq): Ditto.
+       (phsubbw,phsubwd,phsubdq): Ditto.
+       (pcmov,pperm,permps,permpd): Ditto.
+       (protb,protw,protd,protq): Ditto.
+       (pshlb,pshlw,pshld,pshlq): Ditto.
+       (pshab,pshaw,pshad,pshaq): Ditto.
+       (comps,comeqps,comltps,comungeps,comleps,comungtps): Ditto.
+       (comunordps,comneps,comneqps,comnltps,comugeps): Ditto.
+       (comnleps,comugtps,comordps,comueqps,comultps): Ditto.
+       (comngeps,comuleps,comngtps,comfalseps,comuneps): Ditto.
+       (comuneqps,comunltps,comgeps,comunleps,comgtps,comtrueps): Ditto.
+       (compd,comeqpd,comltpd,comungepd,comlepd,comungtpd,comunordpd): Ditto.
+       (comnepd,comneqpd,comnltpd,comugepd,comnlepd,comugtpd): Ditto.
+       (comordpd,comueqpd,comultpd,comngepd,comulepd,comngtpd): Ditto.
+       (comfalsepd,comunepd,comuneqpd,comunltpd,comgepd): Ditto.
+       (comunlepd,comgtpd,comtruepd): Ditto.
+       (comss,comeqss,comltss,comungess,comless,comungtss,comunordss): Ditto.
+       (comness,comneqss,comnltss,comugess,comnless,comugtss): Ditto.
+       (comordss,comueqss,comultss,comngess,comuless,comngtss): Ditto.
+       (comfalsess,comuness,comuneqss,comunltss,comgess): Ditto.
+       (comunless,comgtss,comtruess): Ditto.
+       (comsd,comeqsd,comltsd,comungesd,comlesd,comungtsd,comunordsd): Ditto.
+       (comnesd,comneqsd,comnltsd,comugesd,comnlesd,comugtsd): Ditto.
+       (comordsd,comueqsd,comultsd,comngesd,comulesd,comngtsd): Ditto.
+       (comfalsesd,comunesd,comuneqsd,comunltsd,comgesd): Ditto.
+       (comunlesd,comgtsd,comtruesd): Ditto.
+       (pcomub,pcomltub,pcomleub,pcomgtub,pcomgeub,pcomequb): Ditto.
+       (pcomnequb,pcomneub): Ditto.
+       (pcomuw,pcomltuw,pcomleuw,pcomgtuw,pcomgeuw,pcomequw): Ditto.
+       (pcomnequw,pcomneuw): Ditto.
+       (pcomud,pcomltud,pcomleud,pcomgtud,pcomgeud,pcomequd): Ditto.
+       (pcomnequd,pcomneud): Ditto.
+       (pcomuq,pcomltuq,pcomleuq,pcomgtuq,pcomgeuq,pcomequq): Ditto.
+       (pcomnequq,pcomneuq): Ditto.
+       (pcomb,pcomltb,pcomleb,pcomgtb,pcomgeb,pcomeqb): Ditto.
+       (pcomneqb,pcomneb): Ditto.
+       (pcomw,pcomltw,pcomlew,pcomgtw,pcomgew,pcomeqw): Ditto.
+       (pcomneqw,pcomnew): Ditto.
+       (pcomd,pcomltd,pcomled,pcomgtd,pcomged,pcomeqd): Ditto.
+       (pcomneqd,pcomned): Ditto.
+       (pcomq,pcomltq,pcomleq,pcomgtq,pcomgeq): Ditto.
+       (pcomeqq,pcomneqq,pcomneq): Ditto.
+       (pcomtrueb, pcomtruew, pcomtrued, pcomtrueq): Ditto.
+       (pcomtrueub, pcomtrueuw, pcomtrueud, pcomtrueuq): Ditto.
+       (pcomfalseb, pcomfalsew, pcomfalsed, pcomfalseq): Ditto.
+       (pcomfalseub, pcomfalseuw, pcomfalseud, pcomfalseuq): Ditto.
+       (frczps,frczpd,frczss,frczsd): Ditto.
+       (cvtph2ps,cvtps2ph): Ditto.
+
+       * i386-tbl.h: Regenerate from i386-opc.tbl.
+       * i386-init.h: Likewise.
+
+       * i386-dis.c (libiberty.h): Include to get ARRAY_SIZE.
+       (dis386_move_test): New disassembly support for move from test
+       register instruction that overlaps with SSE5 instructions.
+       (print_insn): Add support for special casing the i386/i486 move
+       from test register instruction that overlaps with the SSE5
+       0x0f24 4 operand instructions.
+       (OP_DREX_ICMP): New macros for SSE5 DREX handling.
+       (OP_DREX_FCMP): Ditto.
+       (OP_E_extended): Rename from OP_E, add additional argument to skip
+       the DREX byte.
+       (OP_E): Call OP_E_extended.
+       (DREX_REG_MEMORY): New macros for drex handling.
+       (DREX_REG_UNKNOWN): Ditto.
+       (DREX4_OC1): Ditto.
+       (DREX4_NO_OC0): Ditto.
+       (DREX4_MASK): Ditto.
+       (three_byte_table): Add SSE5 instructions.
+       (print_drex_arg): New function to print a DREX register or memory
+       reference.
+       (OP_DREX4): New function for handling DREX 4 argument ops.
+       (OP_DREX3): New function for handling DREX 3 argument ops.
+       (twobyte_has_modrm): 0f{25,7a,7b} all use the modrm byte.
+       (THREE_BYTE_SSE5_0F{24,25,7A,7B}): New macros for initializing 3
+       byte opcode support for SSE5 instructions.
+       (dis386_twobyte): Add SSE5 24/25/7a/7b support.
+       (three_byte_table): Add rows for describing SSE5 instructions.
+
+2007-09-13  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * i386-dis.c (get_valid_dis386): Take a pointer to
+       disassemble_info.  Handle IS_3BYTE_OPCODE.
+       (print_insn): Updated.  Don't handle IS_3BYTE_OPCODE here.
+
+2007-09-12  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * i386-opc.h (CpuUnused): Defined with CpuMax.
+       (OTUnused): Defined with OTMax.
+
+2007-09-12  Jan Beulich  <jbeulich@novell.com>
+
+       * i386-opc.tbl: Add two-operand forms of blendvps, blendvpd, and
+       pblendvb.
+       * i386-tbl.h: Regenerate.
+
+2007-09-09  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * i386-gen.c (main): Remove the local variable, unused.
+
+2007-09-08  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * Makefile.am: Run "make dep-am".
+       * Makefile.in: Regenerate.
+
+2007-09-08  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * configure.in (AC_CHECK_HEADERS): Add limits.h.
+       * configure: Regenerated.
+       * config.in: Likewise.
+
+       * i386-gen.c: Include "sysdep.h" instead of <stdlib.h> and
+       <string.h>.  Use xstrerror instead of strerror.
+       (initializer): New.
+       (cpu_flag_init): Likewise.
+       (bitfield): Likewise.
+       (BITFIELD): New.
+       (cpu_flags): Likewise.
+       (opcode_modifiers): Likewise.
+       (operand_types): Likewise.
+       (compare): Likewise.
+       (set_cpu_flags): Likewise.
+       (output_cpu_flags): Likewise.
+       (process_i386_cpu_flags): Likewise.
+       (output_opcode_modifier): Likewise.
+       (process_i386_opcode_modifier): Likewise.
+       (output_operand_type): Likewise.
+       (process_i386_operand_type): Likewise.
+       (set_bitfield): Likewise.
+       (operand_type_init): Likewise.
+       (process_i386_initializers): Likewise.
+       (process_i386_opcodes): Call process_i386_opcode_modifier to
+       process opcode_modifier.  Call process_i386_operand_type to
+       process operand_types.
+       (process_i386_registers): Call process_i386_operand_type to
+       process reg_type.
+       (main): Check unused bits in i386_cpu_flags and i386_operand_type.
+       Sort cpu_flags, opcode_modifiers and operand_types.  Call
+       process_i386_initializers.
+
+       * i386-init.h: New.
+       * i386-tbl.h: Regenerated.
+
+       * i386-opc.h: Include <limits.h>.
+       (CHAR_BIT): Define as 8 if not defined.
+       (Cpu186): Changed to position of bitfiled.
+       (Cpu286): Likewise.
+       (Cpu386): Likewise.
+       (Cpu486): Likewise.
+       (Cpu586): Likewise.
+       (Cpu686): Likewise.
+       (CpuP4): Likewise.
+       (CpuK6): Likewise.
+       (CpuK8): Likewise.
+       (CpuMMX): Likewise.
+       (CpuMMX2): Likewise.
+       (CpuSSE): Likewise.
+       (CpuSSE2): Likewise.
+       (Cpu3dnow): Likewise.
+       (Cpu3dnowA): Likewise.
+       (CpuSSE3): Likewise.
+       (CpuPadLock): Likewise.
+       (CpuSVME): Likewise.
+       (CpuVMX): Likewise.
+       (CpuSSSE3): Likewise.
+       (CpuSSE4a): Likewise.
+       (CpuABM): Likewise.
+       (CpuSSE4_1): Likewise.
+       (CpuSSE4_2): Likewise.
+       (Cpu64): Likewise.
+       (CpuNo64): Likewise.
+       (D): Likewise.
+       (W): Likewise.
+       (Modrm): Likewise.
+       (ShortForm): Likewise.
+       (Jump): Likewise.
+       (JumpDword): Likewise.
+       (JumpByte): Likewise.
+       (JumpInterSegment): Likewise.
+       (FloatMF): Likewise.
+       (FloatR): Likewise.
+       (FloatD): Likewise.
+       (Size16): Likewise.
+       (Size32): Likewise.
+       (Size64): Likewise.
+       (IgnoreSize): Likewise.
+       (DefaultSize): Likewise.
+       (No_bSuf): Likewise.
+       (No_wSuf): Likewise.
+       (No_lSuf): Likewise.
+       (No_sSuf): Likewise.
+       (No_qSuf): Likewise.
+       (No_xSuf): Likewise.
+       (FWait): Likewise.
+       (IsString): Likewise.
+       (RegKludge): Likewise.
+       (IsPrefix): Likewise.
+       (ImmExt): Likewise.
+       (NoRex64): Likewise.
+       (Rex64): Likewise.
+       (Ugh): Likewise.
+       (Reg8): Likewise.
+       (Reg16): Likewise.
+       (Reg32): Likewise.
+       (Reg64): Likewise.
+       (FloatReg): Likewise.
+       (RegMMX): Likewise.
+       (RegXMM): Likewise.
+       (Imm8): Likewise.
+       (Imm8S): Likewise.
+       (Imm16): Likewise.
+       (Imm32): Likewise.
+       (Imm32S): Likewise.
+       (Imm64): Likewise.
+       (Imm1): Likewise.
+       (BaseIndex): Likewise.
+       (Disp8): Likewise.
+       (Disp16): Likewise.
+       (Disp32): Likewise.
+       (Disp32S): Likewise.
+       (Disp64): Likewise.
+       (InOutPortReg): Likewise.
+       (ShiftCount): Likewise.
+       (Control): Likewise.
+       (Debug): Likewise.
+       (Test): Likewise.
+       (SReg2): Likewise.
+       (SReg3): Likewise.
+       (Acc): Likewise.
+       (FloatAcc): Likewise.
+       (JumpAbsolute): Likewise.
+       (EsSeg): Likewise.
+       (RegMem): Likewise.
+       (OTMax): Likewise.
+       (Reg): Commented out.
+       (WordReg): Likewise.
+       (ImplicitRegister): Likewise.
+       (Imm): Likewise.
+       (EncImm): Likewise.
+       (Disp): Likewise.
+       (AnyMem): Likewise.
+       (LLongMem): Likewise.
+       (LongMem): Likewise.
+       (ShortMem): Likewise.
+       (WordMem): Likewise.
+       (ByteMem): Likewise.
+       (CpuMax): New
+       (CpuLM): Likewise.
+       (CpuNumOfUints): Likewise.
+       (CpuNumOfBits): Likewise.
+       (CpuUnused): Likewise.
+       (OTNumOfUints): Likewise.
+       (OTNumOfBits): Likewise.
+       (OTUnused): Likewise.
+       (i386_cpu_flags): New type.
+       (i386_operand_type): Likewise.
+       (i386_opcode_modifier): Likewise.
+       (CpuSledgehammer): Removed.
+       (CpuSSE4): Likewise.
+       (CpuUnknownFlags): Likewise.
+       (Reg): Likewise.
+       (WordReg): Likewise.
+       (ImplicitRegister): Likewise.
+       (Imm): Likewise.
+       (EncImm): Likewise.
+       (Disp): Likewise.
+       (AnyMem): Likewise.
+       (LLongMem): Likewise.
+       (LongMem): Likewise.
+       (ShortMem): Likewise.
+       (WordMem): Likewise.
+       (ByteMem): Likewise.
+       (template): Use i386_cpu_flags for cpu_flags, use
+       i386_opcode_modifier for opcode_modifier, use
+       i386_operand_type for operand_types.
+       (reg_entry): Use i386_operand_type for reg_type.
+
+       * Makefile.am (HFILES): Add i386-init.h.
+       ($(srcdir)/i386-init.h): New rule.
+       ($(srcdir)/i386-tbl.h): Depend on $(srcdir)/i386-init.h
+       instead.
+       * Makefile.in: Regenerated.
+
+2007-09-06  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * i386-gen.c (next_field): Updated to take a separator.
+       (process_i386_opcodes): Updated.
+       (process_i386_registers): Likewise.
+
+2007-09-06  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * i386-gen.c (table): Moved ...
+       (main): Here.  Call process_copyright to output copyright.
+       (process_copyright): New.
+       (process_i386_opcodes): Take FILE *table.
+       (process_i386_registers): Likewise.
+
+2007-09-06  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * i386-gen.c (table): New.
+       (process_i386_opcodes): Report errno when faied to open
+       i386-opc.tbl.  Output opcodes to table.  Close i386-opc.tbl
+       before return.
+       (process_i386_registers): Report errno when faied to open
+       i386-reg.tbl.  Output opcodes to table.  Close i386-reg.tbl
+       before return.
+       (main): Open i386-tbl.h for output.
+
+       * Makefile.am ($(srcdir)/i386-tbl.h): Remove " > $@".
+       * Makefile.in: Regenerated.
+
+2007-09-06  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * i386-opc.tbl: Correct SVME instructions to allow 32bit register
+       operand in 64bit mode.
+       * i386-tbl.h: Regenerated.
+
+2007-08-31  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * i386-dis.c (OPC_EXT_40...OPC_EXT_45): New.
+       (dis386_twobyte): Use OPC_EXT_40...OPC_EXT_45.
+       (opc_ext_table): Add OPC_EXT_40...OPC_EXT_45.
+
+2007-08-31  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * i386-dis.c (SVME_Fixup): Removed.
+       (OPC_EXT_39): New.
+       (OPC_EXT_RM_6): Likewise.
+       (grps): Use OPC_EXT_39.
+       (opc_ext_table): Add OPC_EXT_39.
+       (opc_ext_rm_table): Add OPC_EXT_RM_6.
+
+       * i386-opc.tbl: Correct SVME instructions to take register
+       operand only.
+       * i386-tbl.h: Regenerated.
+
 2007-08-31  H.J. Lu  <hongjiu.lu@intel.com>
 
        * Makefile.am (INCLUDES): Remove -D_GNU_SOURCE.
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