+Tue Jun 16 13:10:51 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
+
+ * i386-dis.c (index16): Add '%' to register names. Use ','
+ instead of '+'.
+
+Sat Jun 13 11:33:55 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
+
+ * i386-dis.c: Don't print opcode suffix when we can figure out the
+ size (and gas can!) by register operands, or from the default
+ size.
+ (putop): Handle 'A', 'B', 'L', 'P', 'Q', 'R' macros. Rename 'C'
+ macro to 'E'.
+ (dis386, dis386_twobyte, grps): Use new suffix macros.
+ (dis386): Correct imul Ib to imul sIb. Change jnl to jge to be
+ consistent. Add suffix for call, jmp, lcall, ljmp, iret. Reverse
+ order of cmps operands to agree with Intel docs. Correct operand
+ of aad and aam (Ib -> sIb). Change ud2b from 0fb8 to 0fb9 to
+ agree with Intel docs.
+ (print_insn_x86): Print orphan fwait before other prefixes.
+ Return correct byte count for orphan fwait with prefixes. Don't
+ print `bound' operands in reverse order.
+ (ckprefix): Stop accumulating prefixes if we get fwait.
+ (OP_DIR): Print `$' before Ap operands of ljmp, lcall.
+
+Fri Jun 12 13:40:38 1998 Tom Tromey <tromey@cygnus.com>
+
+ * po/Make-in (all-yes): If maintainer mode, depend on .pot file.
+ ($(PACKAGE).pot): Unconditionally depend on POTFILES.
+
+Fri Jun 12 11:04:06 1998 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
+
+ Fix problems when bfd_vma is wider than long.
+ * i386-dis.c: Make op_address and start_pc unsigned.
+ (set_op): Make parameter unsigned.
+ (print_insn_x86): Cast to bfd_vma when passing a value to
+ print_address_func.
+ * ns32k-dis.c (CORE_ADDR): Don't define.
+ (print_insn_ns32k): Change type of addr to bfd_vma. Use
+ bfd_scan_vma to read back address.
+ (print_insn_arg): Change type of addr to bfd_vma. Use sprintf_vma
+ to format it.
+ * m68k-dis.c (COERCE32): Cast to bfd_signed_vma to avoid overflow.
+ (NEXTULONG): New definition.
+ (print_insn_m68k): Avoid overflow when computing third argument of
+ print_insn_arg.
+ (print_insn_arg): Use NEXTULONG to fetch 32 bit address values.
+ Use disp instead of val to store offset values.
+ (print_indexed): Use base_disp instead of word to store base
+ displacement, to avoid overflow.
+ * m10300-dis.c (disassemble): Cast value to long when computing
+ pc-relative address, to get correct sign extension.
+
+Wed Jun 10 15:58:37 1998 Doug Evans <devans@canuck.cygnus.com>
+
+ * m32r-opc.c: Regenerate.
+
+Tue Jun 9 14:27:57 1998 Nick Clifton <nickc@cygnus.com>
+
+ * arm-opc.h (thumb_opcodes): Display 'add rx, rY, #0' insns as
+ 'mov rX, rY'. Patch courtesy of Tony Thompson <Tony.Thompson@arm.com>
+
+Mon Jun 8 18:17:21 1998 Nick Clifton <nickc@cygnus.com>
+
+ * d30v-opc.c: Remove FALG_MUL32 attribyte from MULX2H insn.
+
+Fri Jun 5 23:47:55 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
+
+ * i386-dis.c: Combine aflag and dflag into sizeflag. Change OP_*
+ functions to void.
+ (OP_DSreg): Rename from OP_DSSI.
+ (OP_ESreg): Rename from OP_ESDI.
+ (Xb, Xv, Yb, Yv): Use index reg code, not b_mode or v_mode.
+ (DSBX): Define.
+ (append_seg): Rename from append_prefix.
+ (ptr_reg): New function.
+ (dis386): Add S suffix to pushf, popf, ret, lret, enter, leave.
+ Add DSBX for xlat.
+ (PREFIX_ADDR): Rename from PREFIX_ADR.
+ (float_reg): Add non-broken opcodes for people who don't want
+ UNIXWARE_COMPAT.
+
+Fri Jun 5 19:15:04 1998 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
+
+ * m68k-opc.c (tstb, tstw, tstl): Don't allow pcrel on
+ 68000/68008/68010.
+
+Wed Jun 3 18:56:22 1998 H.J. Lu <hjl@gnu.org>
+
+ * i386-dis.c (dis386): Change 0x60 to "pushaS", 0x61 to "popaS".
+
+Tue Jun 2 15:06:46 1998 Geoff Keating <geoffk@ozemail.com.au>
+
+ * ppc-opc.c (powerpc_macros): Support shifts and rotates of size
+ 0; produce error message for shifts of size 32 (or 64 for 64-bit
+ shifts), because the hardware doesn't support them.
+
+start-sanitize-r5900
+Mon Jun 1 10:27:26 1998 Jeffrey A Law (law@cygnus.com)
+
+ * mips-opc.c (c.lt.s): Remove r5900 specific variant.
+ (c.le.s): Likewise.
+
+ * vu0.h (sqc2): Fix opcode.
+
+ * mips-opc.c (rsqrt.s): Update based on r5900 ISA manual version 2.1
+ (sqrt.s): Likewise.
+
+end-sanitize-r5900
+start-sanitize-vr5400
+Thu May 28 08:46:09 1998 Catherine Moore <clm@cygnus.com>
+
+ * mips-opc.c (macc, maccu, macchi, macchiu, msac, msacu, msachi, msachiu):
+ Change pinfo to use WR_HILO.
+
+end-sanitize-vr5400
+start-sanitize-d30v
+Wed May 27 15:29:13 1998 Nick Clifton <nickc@cygnus.com>
+
+ * d30v-opc.c: Add new operand: Ra3. Change SHORT_B3, SHORT_B3b,
+ LONG_2, LONG_2b formats to use this new operand.
+
+end-sanitize-d30v
+Tue May 26 20:47:48 1998 Stan Cox <scox@cygnus.com>
+
+ * sparc-dis.c (compute_arch_mask): Added bfd_mach_sparc_sparclite_le.
+
+Tue May 26 20:45:33 1998 Mark Alexander <marka@cygnus.com>
+
+ * sparc-dis.c (print_insn_sparc): big endian instruction / little
+ endian data support.
+
+start-sanitize-d30v
+Tue May 26 16:14:39 1998 Nick Clifton <nickc@cygnus.com>
+
+ * d30v-opc.c (d30v_format_table): Change definition of SHORT_B3
+ and SHORT_B3b formats to use Rb instead of Ra.
+
+ Add FLAG_MUL16 to MUL2XH opcode.
+
+ Add FLAG_ADDSUBppp to SRC and SATHp opcodes to implement extension
+ to existing 1.1.1 parallelisation prohibition procedure.
+
+end-sanitize-d30v
+Fri May 22 16:00:00 1998 Doug Evans <devans@canuck.cygnus.com>
+
+ * cgen-asm.in (insert_normal): Handle empty fields and 64 bit hosts.
+ * cgen-dis.in (extract_normal): Likewise.
+ * m32r-asm.c,m32r-dis.c: Regenerate.
+
+start-sanitize-sky
+Fri May 22 11:44:10 1998 Doug Evans <devans@canuck.cygnus.com>
+
+ * dvp-opc.c (parse_dotdest): Missing dest -> xyzw.
+
+end-sanitize-sky
+start-sanitize-r5900
+Wed May 20 00:22:27 1998 Jeffrey A Law (law@cygnus.com)
+
+ * mips-opc.c (multu1): Add two operand variant for the r5900.
+
+end-sanitize-r5900
+Tue May 19 17:36:08 1998 Ian Lance Taylor <ian@cygnus.com>
+
+ * mips-dis.c (print_mips16_insn_arg): Handle type ']' correctly
+ with a shift count of 0.
+
+start-sanitize-r5900
+Mon May 18 14:27:06 1998 Frank Ch. Eigler <fche@cygnus.com>
+
+ * mips-opc.c (mult1): Add two-operand variety of mult1 for R5900.
+
+Mon May 18 11:44:00 1998 Jeffrey A Law (law@cygnus.com)
+
+ * mips-dis.c (print_insn_arg): Handle ';' opcode completer.
+ (_print_insn_mips): Likewise.
+ * vu0.h (vopmula, vopmsub): Correctly handle opcode/operand
+ completers.
+
+end-sanitize-r5900
+Fri May 15 14:58:31 1998 Doug Evans <devans@seba.cygnus.com>
+
+ * cgen-opc.c (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
+ (cgen_hw_lookup_by_num): New function.
+
+start-sanitize-m32rx
+ * m32r-opc.c, m32r-opc.h: Regenerate, delete h-abort.
+
+end-sanitize-m32rx
+Wed May 13 17:03:59 1998 Doug Evans <devans@canuck.cygnus.com>
+
+ * m32r-asm.c: Regenerate (handle uppercase HIGH/SHIGH/LOW/SDA).
+
+Wed May 13 14:34:31 1998 Mark Alexander <marka@cygnus.com>
+
+ * sparc-dis.c (print_insn_sparc): Always fetch instructions
+ as big-endian on SPARClite.
+
+start-sanitize-m32rx
+Tue May 12 13:39:51 1998 Nick Clifton <nickc@cygnus.com>
+
+ * m32r-opc.c: Regenerated - SPECIAL attribute added to some
+ insns.
+ * m32r-opc.h: Regenerated - SPECIAL attribute added to some
+ insns.
+
+end-sanitize-m32rx
+start-sanitize-d30v
Tue May 12 11:46:31 1998 Richard Henderson <rth@cygnus.com>
* d30v-opc.c (pre_defined_register): Remove alias for r0.
+end-sanitize-d30v
start-sanitize-r5900
Mon May 11 13:12:15 1998 Frank Ch. Eigler <fche@cygnus.com>
start-sanitize-sky
* dvp-dis.c: Internationalised.
* dvp-opc.c: Internationalised.
- * dvp-opc.c: Internationalised.
end-sanitize-sky
* h8300-dis.c: Internationalised.
* h8500-dis.c: Internationalised.
projects / deliverable / binutils-gdb.git / blobdiff