+2007-10-01 H.J. Lu <hongjiu.lu@intel.com>
+
+ * i386-dis.c (THREE_BYTE_0FBA): Renamed to ...
+ (THREE_BYTE_0F7B): This.
+ (dis386_twobyte): Updated.
+ (three_byte_table): Updated comments.
+
+2007-10-01 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
+
+ * cr16-opc.c: Updated the branch on condition instructions with
+ RELAXABLE flag.
+
+2007-09-30 H.J. Lu <hongjiu.lu@intel.com>
+
+ * 386-dis.c (prefix_table): Reformat comment.
+
+2007-09-29 H.J. Lu <hongjiu.lu@intel.com>
+
+ * 386-dis.c (USE_GROUPS): Renamed to ...
+ (USE_REG_TABLE): This.
+ (USE_OPC_EXT_TABLE): Renamed to ...
+ (USE_MOD_TABLE): This.
+ (USE_OPC_EXT_RM_TABLE): Renamed to ...
+ (USE_RM_TABLE): This.
+ (USE_XXX_TABLE): Reordered.
+ (GRP): Renamed to ...
+ (REG_TABLE): This.
+ (OPC_EXT_TABLE): Renamed to ...
+ (MOD_TABLE): This.
+ (OPC_EXT_RM_TABLE): Renamed to ...
+ (RM_TABLE): This.
+ (GRP_XXX): Renamed to ...
+ (REG_XXX): This.
+ (PREGRP_XXX): Renamed to ...
+ (PREFIX_XXX): This.
+ (OPC_EXT_XXX): Renamed to ...
+ (MOD_XXX): This.
+ (OPC_EXT_RM_XXX): Renamed to ...
+ (RM_XXX): This.
+ (grps): Renamed to ...
+ (reg_table): This
+ (prefix_user_table): Renamed to ...
+ (prefix_table): This
+ (opc_ext_table): Renamed to ...
+ (mod_table): This
+ (opc_ext_rm_table): Renamed to ...
+ (rm_table): This
+ (OPC_EXT_RM_XXX): Likewise.
+ (dis386): Updated.
+ (dis386_twobyte): Likewise.
+ (reg_table): Likewise.
+ (prefix_table): Likewise.
+ (x86_64_table): Likewise.
+ (three_byte_table): Likewise.
+ (mod_table): Likewise.
+ (rm_table): Likewise.
+ (get_valid_dis386): Likewise.
+
+2007-09-28 H.J. Lu <hongjiu.lu@intel.com>
+
+ * 386-dis.c (USE_PREFIX_USER_TABLE): Renamed to ...
+ (USE_PREFIX_TABLE): This.
+ (X86_64_SPECIAL): Renamed to ...
+ (USE_X86_64_TABLE): This.
+ (IS_3BYTE_OPCODE): Renamed to ...
+ (USE_3BYTE_TABLE): This.
+ (GRPXXX): Removed.
+ (PREGRPXXX): Likewise.
+ (X86_64_XXX): Likewise.
+ (THREE_BYTE_XXX): Likewise.
+ (OPC_EXT_XXX): Likewise.
+ (OPC_EXT_RM_XXX): Likewise.
+ (DIS386): New.
+ (GRP): Likewise.
+ (PREGRP): Likewise.
+ (X86_64_TABLE): Likewise.
+ (THREE_BYTE_TABLE): Likewise.
+ (OPC_EXT_TABLE): Likewise.
+ (OPC_EXT_RM_TABLE): Likewise.
+ (GRP_XXX): Likewise.
+ (PREGRP_XXX): Likewise.
+ (X86_64_XXX): Likewise.
+ (THREE_BYTE_XXX): Likewise.
+ (OPC_EXT_XXX): Likewise.
+ (OPC_EXT_RM_XXX): Likewise.
+ (dis386): Updated.
+ (dis386_twobyte): Likewise.
+ (grps): Likewise.
+ (prefix_user_table): Likewise.
+ (x86_64_table): Likewise.
+ (three_byte_table): Likewise.
+ (opc_ext_table): Likewise.
+ (opc_ext_rm_table): Likewise.
+ (get_valid_dis386): Likewise.
+
+2007-09-27 H.J. Lu <hongjiu.lu@intel.com>
+
+ * i386-dis.c (dis386): Swap X86_64_27 with OPC_EXT_2.
+ (x86_64_table): Likewise.
+ (opc_ext_table): Likewise.
+
+2007-09-27 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR binutils/5072
+ * i386-dis.c: Update comments on '{', '}' and '|' to support
+ only AT&T and Intel modes.
+ (X86_64_4...X86_64_27): New.
+ (dis386): Updated. Use X86_64_4...X86_64_21.
+ (dis386_twobyte): Updated.
+ (float_mem): Likewise.
+ (x86_64_table): Add X86_64_4...X86_64_27.
+ (opc_ext_table): Updated. Use X86_64_22...X86_64_27.
+ (putop): Updated handling of '{', '}' and '|' to support only
+ AT&T and Intel modes.
+
+2007-09-27 Kazu Hirata <kazu@codesourcery.com>
+
+ * m68k-dis.c (print_insn_arg): Use %mbo instead of %mbb.
+
+2007-09-26 James E. Wilson <wilson@specifix.com>
+
+ * ia64-gen.c (print_dependency_table): Fix typo in last patch.
+
+2007-09-26 Nick Clifton <nickc@redhat.com>
+
+ * mt-asm.c (parse_imm16): Reword error message in order to allow
+ it to be translated properly.
+ * ia64-gen.c (print_dependency_table): Likewise.
+ * mips-dis.c (print_insn_args): Likewise.
+
+2007-09-26 Jan Beulich <jbeulich@novell.com>
+
+ * i386-dis.c (OP_E_extended): Distinguish rip- and eip-
+ relative addressing. Update used_prefixes based on whether any
+ base or index register was printed.
+
+2007-09-26 Jan Beulich <jbeulich@novell.com>
+
+ * i386-opc.h (RegEip): Define.
+ (RegEiz): Adjust.
+ * i386-reg.tbl: Add eip. Mark rip and eip with RegRex64.
+ * i386-tbl.h: Re-generate.
+
+2007-09-25 H.J. Lu <hongjiu.lu@intel.com>
+
+ * i386-gen.c (process_i386_opcodes): Process opcode_length.
+
+ * i386-opc.h (template): Add opcode_length.
+ * 386-opc.tbl: Likewise.
+ * i386-tbl.h: Regenerated.
+
+2007-09-21 H.J. Lu <hongjiu.lu@intel.com>
+
+ * i386-opc.h: Adjust whitespaces.
+
+2007-09-21 Dave Brolley <brolley@redhat.com>
+
+ * mep-desc.c: Regenerated.
+
+2007-09-20 H.J. Lu <hongjiu.lu@intel.com>
+
+ * i386-dis.c (OP_E_extended): Display eiz for [eiz*1 + offset].
+
+2007-09-20 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR 658
+ * 386-dis.c (index64): New.
+ (index32): Likewise.
+ (intel_index64): Likewise.
+ (intel_index32): Likewise.
+ (att_index64): Likewise.
+ (att_index32): Likewise.
+ (print_insn): Set index64 and index32.
+ (OP_E_extended): Use index64/index32 for index register for
+ SIB with INDEX == 4.
+
+ * i386-opc.h (RegEiz): New.
+ (RegRiz): Likewise.
+
+ * i386-reg.tbl: Add eiz and riz.
+ * i386-tbl.h: Regenerated.
+
+2007-09-19 H.J. Lu <hongjiu.lu@intel.com>
+
+ * i386-dis.c (OP_E_extended): Always display scale for memory.
+
+2007-09-17 H.J. Lu <hongjiu.lu@intel.com>
+
+ * i386-opc.h (RegRip): New.
+
+ * i386-reg.tbl (rip): Use RegRip for reg_num.
+ * i386-tbl.h: Regenerated.
+
+2007-09-17 Nick Clifton <nickc@redhat.com>
+
+ * po/es.po: Updated Spanish translation.
+
+2007-09-14 H.J. Lu <hongjiu.lu@intel.com>
+
+ * Makefile.am: Run "make dep-am".
+ * Makefile.in: Regenerate.
+
+2007-09-14 Michael Meissner <michael.meissner@amd.com>
+ Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
+ Tony Linthicum <tony.linthicum@amd.com>
+
+ * i386-opc.h (CpuSSE5): New macro.
+ (i386_cpu_flags): Add Drex, Drexv and Drexc.
+
+ * i386-gen.c (cpu_flag_init): Add CPU_SSE5_FLAGS.
+ (operand_type_init): Add CpuSSE5.
+ (opcode_modifiers): Add Drex, Drexv and Drexc.
+ (i386_opcode_modifier): Ditto.
+
+ * i386-opc.tbl (fmaddps,fmaddpd,fmaddss,fmaddsd): Define SSE5
+ instructions here.
+ (fmsubps,fmsubpd,fmsubss,fmsubsd): Ditto.
+ (fnmaddps,fnmaddpd,fnmaddss,fnmaddsd): Ditto.
+ (fnmsubps,fnmsubpd,fnmsubss,fnmsubsd): Ditto.
+ (pmacssww,pmacsww,pmacsswd,pmacswd): Ditto.
+ (pmacssdd,pmacsdd,pmacssdql,pmacssdqh): Ditto.
+ (pmacsdql,pmacsdqh,pmadcsswd,pmadcswd): Ditto.
+ (phaddbw,phaddbd,phaddbq,phaddwd): Ditto.
+ (phaddwq,phadddq,phaddubw,phaddubd): Ditto.
+ (phaddubq,phadduwd,phadduwq,phaddudq): Ditto.
+ (phsubbw,phsubwd,phsubdq): Ditto.
+ (pcmov,pperm,permps,permpd): Ditto.
+ (protb,protw,protd,protq): Ditto.
+ (pshlb,pshlw,pshld,pshlq): Ditto.
+ (pshab,pshaw,pshad,pshaq): Ditto.
+ (comps,comeqps,comltps,comungeps,comleps,comungtps): Ditto.
+ (comunordps,comneps,comneqps,comnltps,comugeps): Ditto.
+ (comnleps,comugtps,comordps,comueqps,comultps): Ditto.
+ (comngeps,comuleps,comngtps,comfalseps,comuneps): Ditto.
+ (comuneqps,comunltps,comgeps,comunleps,comgtps,comtrueps): Ditto.
+ (compd,comeqpd,comltpd,comungepd,comlepd,comungtpd,comunordpd): Ditto.
+ (comnepd,comneqpd,comnltpd,comugepd,comnlepd,comugtpd): Ditto.
+ (comordpd,comueqpd,comultpd,comngepd,comulepd,comngtpd): Ditto.
+ (comfalsepd,comunepd,comuneqpd,comunltpd,comgepd): Ditto.
+ (comunlepd,comgtpd,comtruepd): Ditto.
+ (comss,comeqss,comltss,comungess,comless,comungtss,comunordss): Ditto.
+ (comness,comneqss,comnltss,comugess,comnless,comugtss): Ditto.
+ (comordss,comueqss,comultss,comngess,comuless,comngtss): Ditto.
+ (comfalsess,comuness,comuneqss,comunltss,comgess): Ditto.
+ (comunless,comgtss,comtruess): Ditto.
+ (comsd,comeqsd,comltsd,comungesd,comlesd,comungtsd,comunordsd): Ditto.
+ (comnesd,comneqsd,comnltsd,comugesd,comnlesd,comugtsd): Ditto.
+ (comordsd,comueqsd,comultsd,comngesd,comulesd,comngtsd): Ditto.
+ (comfalsesd,comunesd,comuneqsd,comunltsd,comgesd): Ditto.
+ (comunlesd,comgtsd,comtruesd): Ditto.
+ (pcomub,pcomltub,pcomleub,pcomgtub,pcomgeub,pcomequb): Ditto.
+ (pcomnequb,pcomneub): Ditto.
+ (pcomuw,pcomltuw,pcomleuw,pcomgtuw,pcomgeuw,pcomequw): Ditto.
+ (pcomnequw,pcomneuw): Ditto.
+ (pcomud,pcomltud,pcomleud,pcomgtud,pcomgeud,pcomequd): Ditto.
+ (pcomnequd,pcomneud): Ditto.
+ (pcomuq,pcomltuq,pcomleuq,pcomgtuq,pcomgeuq,pcomequq): Ditto.
+ (pcomnequq,pcomneuq): Ditto.
+ (pcomb,pcomltb,pcomleb,pcomgtb,pcomgeb,pcomeqb): Ditto.
+ (pcomneqb,pcomneb): Ditto.
+ (pcomw,pcomltw,pcomlew,pcomgtw,pcomgew,pcomeqw): Ditto.
+ (pcomneqw,pcomnew): Ditto.
+ (pcomd,pcomltd,pcomled,pcomgtd,pcomged,pcomeqd): Ditto.
+ (pcomneqd,pcomned): Ditto.
+ (pcomq,pcomltq,pcomleq,pcomgtq,pcomgeq): Ditto.
+ (pcomeqq,pcomneqq,pcomneq): Ditto.
+ (pcomtrueb, pcomtruew, pcomtrued, pcomtrueq): Ditto.
+ (pcomtrueub, pcomtrueuw, pcomtrueud, pcomtrueuq): Ditto.
+ (pcomfalseb, pcomfalsew, pcomfalsed, pcomfalseq): Ditto.
+ (pcomfalseub, pcomfalseuw, pcomfalseud, pcomfalseuq): Ditto.
+ (frczps,frczpd,frczss,frczsd): Ditto.
+ (cvtph2ps,cvtps2ph): Ditto.
+
+ * i386-tbl.h: Regenerate from i386-opc.tbl.
+ * i386-init.h: Likewise.
+
+ * i386-dis.c (libiberty.h): Include to get ARRAY_SIZE.
+ (dis386_move_test): New disassembly support for move from test
+ register instruction that overlaps with SSE5 instructions.
+ (print_insn): Add support for special casing the i386/i486 move
+ from test register instruction that overlaps with the SSE5
+ 0x0f24 4 operand instructions.
+ (OP_DREX_ICMP): New macros for SSE5 DREX handling.
+ (OP_DREX_FCMP): Ditto.
+ (OP_E_extended): Rename from OP_E, add additional argument to skip
+ the DREX byte.
+ (OP_E): Call OP_E_extended.
+ (DREX_REG_MEMORY): New macros for drex handling.
+ (DREX_REG_UNKNOWN): Ditto.
+ (DREX4_OC1): Ditto.
+ (DREX4_NO_OC0): Ditto.
+ (DREX4_MASK): Ditto.
+ (three_byte_table): Add SSE5 instructions.
+ (print_drex_arg): New function to print a DREX register or memory
+ reference.
+ (OP_DREX4): New function for handling DREX 4 argument ops.
+ (OP_DREX3): New function for handling DREX 3 argument ops.
+ (twobyte_has_modrm): 0f{25,7a,7b} all use the modrm byte.
+ (THREE_BYTE_SSE5_0F{24,25,7A,7B}): New macros for initializing 3
+ byte opcode support for SSE5 instructions.
+ (dis386_twobyte): Add SSE5 24/25/7a/7b support.
+ (three_byte_table): Add rows for describing SSE5 instructions.
+
+2007-09-13 H.J. Lu <hongjiu.lu@intel.com>
+
+ * i386-dis.c (get_valid_dis386): Take a pointer to
+ disassemble_info. Handle IS_3BYTE_OPCODE.
+ (print_insn): Updated. Don't handle IS_3BYTE_OPCODE here.
+
+2007-09-12 H.J. Lu <hongjiu.lu@intel.com>
+
+ * i386-opc.h (CpuUnused): Defined with CpuMax.
+ (OTUnused): Defined with OTMax.
+
2007-09-12 Jan Beulich <jbeulich@novell.com>
* i386-opc.tbl: Add two-operand forms of blendvps, blendvpd, and
projects / deliverable / binutils-gdb.git / blobdiff