+2017-06-29 Anton Kolesov <Anton.Kolesov@synopsys.com>
+
+ * arc-dis.c (parse_disassembler_options): Use
+ FOR_EACH_DISASSEMBLER_OPTION.
+
+2017-06-29 Anton Kolesov <Anton.Kolesov@synopsys.com>
+
+ * arc-dis.c (parse_option): Use disassembler_options_cmp to compare
+ disassembler option strings.
+ (parse_cpu_option): Likewise.
+
+2017-06-28 Tamar Christina <tamar.christina@arm.com>
+
+ * aarch64-asm.c (aarch64_ins_reglane): Added 4B dotprod.
+ * aarch64-dis.c (aarch64_ext_reglane): Likewise.
+ * aarch64-tbl.h (QL_V3DOT, QL_V2DOT): New.
+ (aarch64_feature_dotprod, DOT_INSN): New.
+ (udot, sdot): New.
+ * aarch64-dis-2.c: Regenerated.
+
+2017-06-28 Jiong Wang <jiong.wang@arm.com>
+
+ * arm-dis.c (coprocessor_opcodes): New entries for vsdot and vudot.
+
+2017-06-28 Maciej W. Rozycki <macro@imgtec.com>
+ Matthew Fortune <matthew.fortune@imgtec.com>
+ Andrew Bennett <andrew.bennett@imgtec.com>
+
+ * mips-formats.h (INT_BIAS): New macro.
+ (INT_ADJ): Redefine in INT_BIAS terms.
+ * mips-dis.c (mips_arch_choices): Add "interaptiv-mr2" entry.
+ (mips_print_save_restore): New function.
+ (print_insn_arg) <OP_SAVE_RESTORE_LIST>: Update comment.
+ (validate_insn_args) <OP_SAVE_RESTORE_LIST>: Remove `abort'
+ call.
+ (print_insn_args): Handle OP_SAVE_RESTORE_LIST.
+ (print_mips16_insn_arg): Call `mips_print_save_restore' for
+ OP_SAVE_RESTORE_LIST handling, factored out from here.
+ * mips-opc.c (decode_mips_operand) <'-'> <'m'>: New case.
+ (RD_31, RD_SP, WR_SP, MOD_SP, IAMR2): New macros.
+ (mips_builtin_opcodes): Add "restore" and "save" entries.
+ * mips16-opc.c (decode_mips16_operand) <'n', 'o'>: New cases.
+ (IAMR2): New macro.
+ (mips16_opcodes): Add "copyw" and "ucopyw" entries.
+
+2017-06-23 Andrew Waterman <andrew@sifive.com>
+
+ * riscv-opc.c (riscv_opcodes): Mark I-type SLT instruction as an
+ alias; do not mark SLTI instruction as an alias.
+
+2017-06-21 H.J. Lu <hongjiu.lu@intel.com>
+
+ * i386-dis.c (RM_0FAE_REG_5): Removed.
+ (PREFIX_MOD_3_0F01_REG_5_RM_1): Likewise.
+ (PREFIX_MOD_3_0F01_REG_5_RM_0): New.
+ (PREFIX_MOD_3_0FAE_REG_5): Likewise.
+ (prefix_table): Remove PREFIX_MOD_3_0F01_REG_5_RM_1. Add
+ PREFIX_MOD_3_0F01_REG_5_RM_0.
+ (prefix_table): Update PREFIX_MOD_0_0FAE_REG_5. Add
+ PREFIX_MOD_3_0FAE_REG_5.
+ (mod_table): Update MOD_0FAE_REG_5.
+ (rm_table): Update RM_0F01_REG_5. Remove RM_0FAE_REG_5.
+ * i386-opc.tbl: Update incsspd, incsspq and setssbsy.
+ * i386-tbl.h: Regenerated.
+
+2017-06-21 H.J. Lu <hongjiu.lu@intel.com>
+
+ * i386-dis.c (prefix_table): Replace savessp with saveprevssp.
+ * i386-opc.tbl: Likewise.
+ * i386-tbl.h: Regenerated.
+
2017-06-21 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (reg_table): Swap indirEv with NOTRACK on "call{&|}"