Add new opcodes

[deliverable/binutils-gdb.git] / opcodes / ChangeLog

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 37aabe8744a120cc163d974d41ca1d431c0d0896..38f7fdfd80a38cd3130b0afafc864afbbe9416fb 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,37 @@
+2001-03-16  Martin Schwidefsky  <schwidefsky@de.ibm.com>
+
+       * s390-opc.c: Add new opcodes.  Smooth out formatting.
+       * s390-opc.txt: Add new opcodes.
+       
+2001-03-06  Nick Clifton  <nickc@redhat.com>
+
+       * arm-dis.c (print_insn_thumb): Compute destination address
+        of BLX(1) instruction by taking bit 1 from PC and not from bit
+        0 of the offset.
+
+2001-03-06  Igor Shevlyakov  <igor@windriver.com>
+
+       * m68k-dis.c (print_insn_m68k): Recognize Coldfire CPUs
+       so command line switches will work.
+
+2001-03-05  Dave Brolley  <brolley@redhat.com>
+
+       * fr30-asm.c: Regenerate.
+       * fr30-desc.c: Regenerate.
+       * fr30-desc.h: Regenerate.
+       * fr30-dis.c: Regenerate.
+       * fr30-ibld.c: Regenerate.
+       * fr30-opc.c: Regenerate.
+       * fr30-opc.h: Regenerate.
+       * m32r-asm.c: Regenerate.
+       * m32r-desc.c: Regenerate.
+       * m32r-desc.h: Regenerate.
+       * m32r-dis.c: Regenerate.
+       * m32r-ibld.c: Regenerate.
+       * m32r-opc.c: Regenerate.
+       * m32r-opc.h: Regenerate.
+       * m32r-opinst.c: Regenerate.
+
 2001-02-28  Igor Shevlyakov  <igor@windriver.com>
 
        * m68k-opc.c: fix cpushl according to Motorola. Enable
@@ -228,7 +262,7 @@ Sat Jan 13 01:48:24 MET 2001  Jan Hubicka  <jh@suse.cz>
 
        * ia64-dis.c (print_insn_ia64): Cast away const on ia64_free_opcode
        argument.
-       * ia64_gen.c (insert_deplist): Cast sizeof result to int.
+       * ia64-gen.c (insert_deplist): Cast sizeof result to int.
        (print_dependency_table): Print NULL if semantics field not set.
        (insert_opcode_dependencies): Mark cmp parameter as unused.
        (print_main_table): Use fprintf_vma to print long long fields.
@@ -357,7 +391,7 @@ Sat Jan 13 01:48:24 MET 2001  Jan Hubicka  <jh@suse.cz>
        * sparc-dis.c (v9a_asr_reg_names): Add v9b ASRs.
        (compute_arch_mask): Add v8plusb and v9b machines.
        (print_insn_sparc): siam mode decoding, accept ASRs up to 25.
-       * opcodes/sparc-opc.c: Support for Cheetah instruction set.
+       * sparc-opc.c: Support for Cheetah instruction set.
        (prefetch_table): Add #invalidate.
 
 2000-10-16  Nick Clifton  <nickc@redhat.com>
@@ -481,14 +515,14 @@ Sat Jan 13 01:48:24 MET 2001  Jan Hubicka  <jh@suse.cz>
        in the buffer.
        * fr30-asm.c: Regenerated.
        * fr30-desc.c: Regenerated.
-       * fr30-desc.h Regenerated.
+       * fr30-desc.h: Regenerated.
        * fr30-dis.c: Regenerated.
        * fr30-ibld.c: Regenerated.
        * fr30-opc.c: Regenerated.
-       * fr30-opc.h Regenerated.
+       * fr30-opc.h: Regenerated.
        * m32r-asm.c: Regenerated.
        * m32r-desc.c: Regenerated.
-       * m32r-desc.h Regenerated.
+       * m32r-desc.h: Regenerated.
        * m32r-dis.c: Regenerated.
        * m32r-ibld.c: Regenerated.
        * m32r-opc.c: Regenerated.
@@ -771,7 +805,7 @@ Sat Jan 13 01:48:24 MET 2001  Jan Hubicka  <jh@suse.cz>
 
 2000-05-11  Thomas de Lellis  <tdel@windriver.com>
 
-       * arm-opc.c: Disassembly of thumb ldsb/ldsh
+       * arm-opc.h: Disassembly of thumb ldsb/ldsh
        instructions changed to ldrsb/ldrsh.
 
 2000-05-11  Ulf Carlsson  <ulfc@engr.sgi.com>
@@ -880,7 +914,7 @@ Sat Jan 13 01:48:24 MET 2001  Jan Hubicka  <jh@suse.cz>
        * ia64-asmtab.c, ia64-asmtab.h, ia64-dis.c, ia64-gen.c ia64-ic.tbl,
        ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c ia64-opc-f.c, ia64-opc-i.c,
        ia64-opc-m.c, ia64-opc-x.c, ia64-opc.c, ia64-opc.h, ia64-raw.tbl,
-       ia64-war.tbl, ia64-waw.tbl): New files.
+       ia64-war.tbl, ia64-waw.tbl: New files.
 
 2000-04-20  Alexandre Oliva  <aoliva@redhat.com>
 
@@ -915,7 +949,7 @@ Sat Jan 13 01:48:24 MET 2001  Jan Hubicka  <jh@suse.cz>
 
 2000-04-05  J"orn Rennecke <amylaar@redhat.com>
 
-       * sh-opc.c (sh_table): Use A_DISP_PC / PCRELIMM_8BY2 for ldre & ldrs.
+       * sh-opc.h (sh_table): Use A_DISP_PC / PCRELIMM_8BY2 for ldre & ldrs.
        stc GBR,@-<REG_N> is available for arch_sh1_up.
        Group parallel processing insn with identical mnemonics together.
        Make three-operand psha / pshl come first.
@@ -1034,7 +1068,7 @@ Sat Jan 13 01:48:24 MET 2001  Jan Hubicka  <jh@suse.cz>
 2000-02-23  Andrew Haley  <aph@redhat.com>
 
        * m32r-asm.c, m32r-desc.c, m32r-desc.h, m32r-dis.c,
-       m32r-ibld.c,m32r-opc.h: Rebuild.
+       m32r-ibld.c, m32r-opc.h: Rebuild.
 
 2000-02-23  Linas Vepstas <linas@linas.org>