+2018-04-04 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR binutils/23025
+ * i386-dis.c (get_valid_dis386): Don't set vex.prefix nor vex.w
+ to 0.
+ (print_insn): Clear vex instead of vex.evex.
+
+2018-04-04 Nick Clifton <nickc@redhat.com>
+
+ * po/es.po: Updated Spanish translation.
+
+2018-03-28 Jan Beulich <jbeulich@suse.com>
+
+ * i386-gen.c (opcode_modifiers): Delete VecESize.
+ * i386-opc.h (VecESize): Delete.
+ (struct i386_opcode_modifier): Delete vecesize.
+ * i386-opc.tbl: Drop VecESize.
+ * i386-tlb.h: Re-generate.
+
+2018-03-28 Jan Beulich <jbeulich@suse.com>
+
+ * i386-opc.h (NO_BROADCAST, BROADCAST_1TO16, BROADCAST_1TO8,
+ BROADCAST_1TO4, BROADCAST_1TO2): Delete.
+ (struct i386_opcode_modifier): Shrink broadcast field to 1 bit.
+ * i386-opc.tbl: Replace Broadcast=<N> by Broadcast.
+ * i386-tlb.h: Re-generate.
+
+2018-03-28 Jan Beulich <jbeulich@suse.com>
+
+ * i386-opc.tbl (vcvt*d2si, vcvt*d2usi, vcvt*s2si, vcvt*s2usi):
+ Fold AVX512 forms
+ * i386-tlb.h: Re-generate.
+
+2018-03-28 Jan Beulich <jbeulich@suse.com>
+
+ * i386-dis.c (prefix_table): Drop Y for cvt*2si.
+ (vex_len_table): Drop Y for vcvt*2si.
+ (putop): Replace plain 'Y' handling by abort().
+
+2018-03-28 Nick Clifton <nickc@redhat.com>
+
+ PR 22988
+ * aarch64-tbl.h (aarch64_opcode_table): Add entries for LDFF1xx
+ instructions with only a base address register.
+ * aarch64-opc.c (operand_general_constraint_met_p): Add code to
+ handle AARHC64_OPND_SVE_ADDR_R.
+ (aarch64_print_operand): Likewise.
+ * aarch64-asm-2.c: Regenerate.
+ * aarch64_dis-2.c: Regenerate.
+ * aarch64-opc-2.c: Regenerate.
+
+2018-03-22 Jan Beulich <jbeulich@suse.com>
+
+ * i386-opc.tbl: Drop VecESize from register only insn forms and
+ memory forms not allowing broadcast.
+ * i386-tlb.h: Re-generate.
+
+2018-03-22 Jan Beulich <jbeulich@suse.com>
+
+ * i386-opc.tbl (vfrczs*, vphadd*, vphsub*, vpmacs*, vpmadcs*,
+ vprot*, vpsha*, vpshl*, bextr, blc*, bls*, t1mskc, tzmsk, sha1*,
+ sha256*): Drop Disp<N>.
+
+2018-03-22 Jan Beulich <jbeulich@suse.com>
+
+ * i386-dis.c (EbndS, bnd_swap_mode): New.
+ (prefix_table): Use EbndS.
+ (OP_E_register, OP_E_memory): Also handle bnd_swap_mode.
+ * i386-opc.tbl (bndmov): Move misplaced Load.
+ * i386-tlb.h: Re-generate.
+
+2018-03-22 Jan Beulich <jbeulich@suse.com>
+
+ * i386-opc.tbl (vcvtdq2pd, vcvtps2pd, vcvtudq2pd): Use separate
+ templates allowing memory operands and folded ones for register
+ only flavors.
+ * i386-tlb.h: Re-generate.
+
+2018-03-22 Jan Beulich <jbeulich@suse.com>
+
+ * i386-opc.tbl (vfrczp*, vpcmov, vpermil2p*): Fold 128- and
+ 256-bit templates. Drop redundant leftover Disp<N>.
+ * i386-tlb.h: Re-generate.
+
+2018-03-14 Kito Cheng <kito.cheng@gmail.com>
+
+ * riscv-opc.c (riscv_insn_types): New.
+
+2018-03-13 Nick Clifton <nickc@redhat.com>
+
+ * po/pt_BR.po: Updated Brazilian Portuguese translation.
+
+2018-03-08 H.J. Lu <hongjiu.lu@intel.com>
+
+ * i386-opc.tbl: Add Optimize to clr.
+ * i386-tbl.h: Regenerated.
+
+2018-03-08 H.J. Lu <hongjiu.lu@intel.com>
+
+ * i386-gen.c (opcode_modifiers): Remove OldGcc.
+ * i386-opc.h (OldGcc): Removed.
+ (i386_opcode_modifier): Remove oldgcc.
+ * i386-opc.tbl: Remove fsubp, fsubrp, fdivp and fdivrp
+ instructions for old (<= 2.8.1) versions of gcc.
+ * i386-tbl.h: Regenerated.
+
+2018-03-08 Jan Beulich <jbeulich@suse.com>
+
+ * i386-opc.h (EVEXDYN): New.
+ * i386-opc.tbl: Fold various AVX512VL templates.
+ * i386-tlb.h: Re-generate.
+
+2018-03-08 Jan Beulich <jbeulich@suse.com>
+
+ * i386-opc.tbl (vexpandpd, vexpandps, vmovapd, vmovaps,
+ vmovdqa32, vmovdqa64, vmovdqu32, vmovdqu64, vmovupd, vmovups,
+ vpexpandd, vpexpandq): Fold AFX512VF templates.
+ * i386-tlb.h: Re-generate.
+
+2018-03-08 Jan Beulich <jbeulich@suse.com>
+
+ * i386-opc.tbl (vgf2p8affineinvqb, vgf2p8affineqb, vgf2p8mulb):
+ Fold 128- and 256-bit VEX-encoded templates.
+ * i386-tlb.h: Re-generate.
+
+2018-03-08 Jan Beulich <jbeulich@suse.com>
+
+ * i386-opc.tbl (vexpandpd, vexpandps, vmovapd, vmovaps,
+ vmovdqa32, vmovdqa64, vmovdqu32, vmovdqu64, vmovupd, vmovups,
+ vpexpandd, vpexpandq): Fold AVX512F templates.
+ * i386-tlb.h: Re-generate.
+
+2018-03-08 Jan Beulich <jbeulich@suse.com>
+
+ * i386-opc.tbl (llwpcb, slwpcb, lwpval, lwpins): Fold 32- and
+ 64-bit templates. Drop Disp<N>.
+ * i386-tlb.h: Re-generate.
+
+2018-03-08 Jan Beulich <jbeulich@suse.com>
+
+ * i386-opc.tbl (vfmadd*, vfmsub*, vfnmadd*, vfnmsub*): Fold 128-
+ and 256-bit templates.
+ * i386-tlb.h: Re-generate.
+
+2018-03-08 Jan Beulich <jbeulich@suse.com>
+
+ * i386-opc.tbl (cmpxchg8b): Add NoRex64.
+ * i386-tlb.h: Re-generate.
+
+2018-03-08 Jan Beulich <jbeulich@suse.com>
+
+ * i386-opc.tbl (cmpxchg16b, fisttp, fisttpll, bndmov, mwaitx):
+ Drop NoAVX.
+ * i386-tlb.h: Re-generate.
+
+2018-03-08 Jan Beulich <jbeulich@suse.com>
+
+ * i386-opc.tbl (ldmxcsr, stmxcsr): Add NoAVX.
+ * i386-tlb.h: Re-generate.
+
+2018-03-08 Jan Beulich <jbeulich@suse.com>
+
+ * i386-gen.c (opcode_modifiers): Delete FloatD.
+ * i386-opc.h (FloatD): Delete.
+ (struct i386_opcode_modifier): Delete floatd.
+ * i386-opc.tbl (fadd, fsub, fsubr, fmul, fdiv, fdivr): Replace
+ FloatD by D.
+ * i386-tlb.h: Re-generate.
+
+2018-03-08 Jan Beulich <jbeulich@suse.com>
+
+ * i386-dis.c (float_reg): Adjust DC and DE fsub*/fdiv* patterns.
+
+2018-03-08 Jan Beulich <jbeulich@suse.com>
+
+ * i386-opc.tbl (vmovd): Disallow Qword memory operands.
+ * i386-tlb.h: Re-generate.
+
+2018-03-08 Jan Beulich <jbeulich@suse.com>
+
+ * i386-opc.tbl (vcvtpd2ps): Fold AVX 128- and 256-bit memory
+ forms.
+ * i386-tlb.h: Re-generate.
+
+2018-03-07 Alan Modra <amodra@gmail.com>
+
+ * disassemble.c (disassembler): Use bfd_arch_powerpc entry for
+ bfd_arch_rs6000.
+ * disassemble.h (print_insn_rs6000): Delete.
+ * ppc-dis.c (powerpc_init_dialect): Handle rs6000.
+ (disassemble_init_powerpc): Call powerpc_init_dialect for rs6000.
+ (print_insn_rs6000): Delete.
+
+2018-03-03 Alan Modra <amodra@gmail.com>
+
+ * sysdep.h (opcodes_error_handler): Define.
+ (_bfd_error_handler): Declare.
+ * Makefile.am: Remove stray #.
+ * opc2c.c (main): Remove bogus -l arg handling. Print "DO NOT
+ EDIT" comment.
+ * aarch64-dis.c, * arc-dis.c, * arm-dis.c, * avr-dis.c,
+ * d30v-dis.c, * h8300-dis.c, * mmix-dis.c, * ppc-dis.c,
+ * riscv-dis.c, * s390-dis.c, * sparc-dis.c, * v850-dis.c: Use
+ opcodes_error_handler to print errors. Standardize error messages.
+ * msp430-decode.opc, * nios2-dis.c, * rl78-decode.opc: Likewise,
+ and include opintl.h.
+ * nds32-asm.c: Likewise, and include sysdep.h and opintl.h.
+ * i386-gen.c: Standardize error messages.
+ * msp430-decode.c, * rl78-decode.c, rx-decode.c: Regenerate.
+ * Makefile.in: Regenerate.
+ * epiphany-asm.c, * epiphany-desc.c, * epiphany-dis.c,
+ * epiphany-ibld.c, * fr30-asm.c, * fr30-desc.c, * fr30-dis.c,
+ * fr30-ibld.c, * frv-asm.c, * frv-desc.c, * frv-dis.c, * frv-ibld.c,
+ * frv-opc.c, * ip2k-asm.c, * ip2k-desc.c, * ip2k-dis.c, * ip2k-ibld.c,
+ * iq2000-asm.c, * iq2000-desc.c, * iq2000-dis.c, * iq2000-ibld.c,
+ * lm32-asm.c, * lm32-desc.c, * lm32-dis.c, * lm32-ibld.c,
+ * m32c-asm.c, * m32c-desc.c, * m32c-dis.c, * m32c-ibld.c,
+ * m32r-asm.c, * m32r-desc.c, * m32r-dis.c, * m32r-ibld.c,
+ * mep-asm.c, * mep-desc.c, * mep-dis.c, * mep-ibld.c, * mt-asm.c,
+ * mt-desc.c, * mt-dis.c, * mt-ibld.c, * or1k-asm.c, * or1k-desc.c,
+ * or1k-dis.c, * or1k-ibld.c, * xc16x-asm.c, * xc16x-desc.c,
+ * xc16x-dis.c, * xc16x-ibld.c, * xstormy16-asm.c, * xstormy16-desc.c,
+ * xstormy16-dis.c, * xstormy16-ibld.c: Regenerate.
+
+2018-03-01 H.J. Lu <hongjiu.lu@intel.com>
+
+ * * i386-opc.tbl: Add "Optimize" to AVX256 and AVX512
+ vpsub[bwdq] instructions.
+ * i386-tbl.h: Regenerated.
+
+2018-03-01 Alan Modra <amodra@gmail.com>
+
+ * configure.ac (ALL_LINGUAS): Sort.
+ * configure: Regenerate.
+
+2018-02-27 Thomas Preud'homme <thomas.preudhomme@arm.com>
+
+ * arm-dis.c (print_insn_coprocessor): Replace uses of ARM_FEATURE_COPY
+ macro by assignements.
+
+2018-02-27 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR gas/22871
+ * i386-gen.c (opcode_modifiers): Add Optimize.
+ * i386-opc.h (Optimize): New enum.
+ (i386_opcode_modifier): Add optimize.
+ * i386-opc.tbl: Add "Optimize" to "mov $imm, reg",
+ "sub reg, reg/mem", "test $imm, acc", "test $imm, reg/mem",
+ "and $imm, acc", "and $imm, reg/mem", "xor reg, reg/mem",
+ "movq $imm, reg" and AVX256 and AVX512 versions of vandnps,
+ vandnpd, vpandn, vpandnd, vpandnq, vxorps, vxorpd, vpxor,
+ vpxord and vpxorq.
+ * i386-tbl.h: Regenerated.
+
+2018-02-26 Alan Modra <amodra@gmail.com>
+
+ * crx-dis.c (getregliststring): Allocate a large enough buffer
+ to silence false positive gcc8 warning.
+
+2018-02-22 Shea Levy <shea@shealevy.com>
+
+ * disassemble.c (ARCH_riscv): Define if ARCH_all.
+
+2018-02-22 H.J. Lu <hongjiu.lu@intel.com>
+
+ * i386-opc.tbl: Add {rex},
+ * i386-tbl.h: Regenerated.
+
+2018-02-20 Maciej W. Rozycki <macro@mips.com>
+
+ * mips16-opc.c (decode_mips16_operand) <'M'>: Remove case.
+ (mips16_opcodes): Replace `M' with `m' for "restore".
+
+2018-02-19 Thomas Preud'homme <thomas.preudhomme@arm.com>
+
+ * arm-dis.c (thumb_opcodes): Fix BXNS mask.
+
2018-02-13 Maciej W. Rozycki <macro@mips.com>
* wasm32-dis.c (print_insn_wasm32): Rename `index' local