+Fri Oct 10 16:44:52 1997 Nick Clifton <nickc@cygnus.com>
+
+ * v850-opc.c (extract_d22): Use signed arithmatic.
+
+Tue Oct 7 23:40:43 1997 Gavin Koch <gavin@cygnus.com>
+
+ * mips-opc.c: Three op mult is not an ISA insn.
+
+Tue Oct 7 23:37:21 1997 Gavin Koch <gavin@cygnus.com>
+
+ * mips-opc.c: Fix formatting.
+
+Fri Oct 3 17:26:54 1997 Ian Lance Taylor <ian@cygnus.com>
+
+ * i386-dis.c (OP_E): Explicitly sign extend 8 bit values, rather
+ than assuming that char is signed. Explicitly sign extend 16 bit
+ values, rather than assuming that short is 16 bits.
+ (OP_sI, OP_J, OP_DIR): Likewise.
+
+start-sanitize-v850e
+Thu Oct 2 13:36:45 1997 Nick Clifton <nickc@cygnus.com>
+
+ * v850-dis.c (v850_sreg_names): Use symbolic names for higher
+ system registers.
+
+start-sanitize-v850e
+Wed Oct 1 16:58:54 1997 Nick Clifton <nickc@cygnus.com>
+
+ * v850-opc.c: Fix typo in comment.
+
+ * v850-dis.c (disassemble): Add test of processor type when
+ determining opcodes.
+
+Wed Oct 1 14:10:20 1997 Ian Lance Taylor <ian@cygnus.com>
+
+ * configure.in: Use a diversion to set enable_shared before the
+ arguments are parsed.
+ * configure: Rebuild.
+
+Thu Sep 25 13:04:59 1997 Ian Lance Taylor <ian@cygnus.com>
+
+ * m68k-opc.c (TBL1): Use ! rather than `.
+ * m68k-dis.c (print_insn_arg): Remove ` operand specifier.
+
+Wed Sep 24 11:29:35 1997 Ian Lance Taylor <ian@cygnus.com>
+
+ * m68k-opc.c: Correct bchg, bclr, bset, and btst on ColdFire.
+
+ * m68k-opc.c: Accept tst{b,w,l} with immediate operands on cpu32.
+
+ * m68k-opc.c: Correct movew of an immediate operand to %sr or %ccr
+ for mcf5200.
+
+ * configure.in: Call AC_CHECK_TOOL before AM_PROG_LIBTOOL.
+ * aclocal.m4: Rebuild with new libtool.
+ * configure: Rebuild.
+
+start-sanitize-v850e
+Fri Sep 19 11:45:49 1997 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * v850-opc.c ("cmov"): Order reg param r1, r2 not r2, r2.
+
+end-sanitize-v850e
+Thu Sep 18 11:21:43 1997 Doug Evans <dje@canuck.cygnus.com>
+
+ * sparc-opc.c (sparclet_cpreg_table): Add %ccsr2, %cccrr, %ccrstr.
+
+Tue Sep 16 15:18:20 1997 Nick Clifton <nickc@cygnus.com>
+
+ * v850-opc.c (v850_opcodes): Further rearrangements.
+
+start-sanitize-d30v
+Tue Sep 16 16:12:11 1997 Ken Raeburn <raeburn@cygnus.com>
+
+ * d30v-opc.c (rot2h, sra2h, srl2h insns): Revert last change.
+
+end-sanitize-d30v
+Tue Sep 16 09:48:50 1997 Nick Clifton <nickc@cygnus.com>
+
+ * v850-opc.c (v850_opcodes): Fields reordered to allow assembler
+ parser to work.
+
+Tue Sep 16 10:01:00 1997 Gavin Koch <gavin@cygnus.com>
+
+ * mips-opc.c: Added tx39 insns sdbbp, rfe, and deret.
+start-sanitize-tx19
+ * mips16-opc.c: Added mips16 sdbbp.
+end-sanitize-tx19
+
+Mon Sep 15 18:31:52 1997 Nick Clifton <nickc@cygnus.com>
+
+ * v850-opc.c: Initialise processors field of v850_opcode structure.
+
+start-sanitize-d30v
+Wed Aug 27 21:42:39 1997 Ken Raeburn <raeburn@cygnus.com>
+
+ Merge changes from Martin Hunt:
+
+ * d30v-opc.c: Change mvfacc to accept 6-bit unsigned values.
+
+ * d30v-opc.c (pre_defined_registers): Add control registers from 0-63.
+ (d30v_opcode_tabel): Add dbt, rtd, srah, and srlh instructions. Fix
+ rot2h, sra2h, and srl2h to use new SHORT_A5S format.
+
+ * d30v-dis.c (print_insn): Fix disassembly of SHORT_D2 opcodes.
+
+ * d30v-dis.c (print_insn): First operand of d*i (delayed
+ branch) instructions is relative.
+
+ * d30v-opc.c (d30v_opcode_table): Change form for repeati.
+ (d30v_operand_table): Add IMM6S3 type.
+ (d30v_format_table): Change SHORT_D2. Add LONG_Db.
+
+ * d30v-dis.c: Fix bug with ".s" and ".l" extensions
+ and cmp instructions.
+
+ * d30v-opc.c: Correct entries for repeat*, and sat*.
+ Make IMM5 unsigned. Create IMM6U and IMM12S3U operand
+ types. Correct several formats.
+
+ * d30v-opc.c: (pre_defined_registers): Add dpsw and dpc.
+
+ * d30v-opc.c (pre_defined_registers): Change control registers.
+
+ * d30v-opc.c (d30v_format_table): Correct SHORT_C1 and
+ SHORT_C2. Manual was incorrect.
+
+ * d30v-dis.c (lookup_opcode): Return value now indicates
+ if an opcode has a short and a long form. Used for deciding
+ to append a ".s" or ".l".
+ (print_insn): Append a ".s" to an instruction if it is
+ the short form and ".l" if it is a long form. Do not append
+ anything if the instruction has only one possible size.
+
+ * d30v-opc.c: Change mulx2h to require an even register.
+ New form: SHORT_A2; a SHORT_A form that needs an even
+ register as the first operand.
+
+ * d30v-dis.c (print_insn_d30v): Fix problem where the last
+ instruction was not being disassembled if there were an odd
+ number of instructions.
+
+ * d30v-opc.c (SHORT_M2, LONG_M2): Two new forms.
+
+end-sanitize-d30v
start-sanitize-v850e
Fri Sep 12 11:43:54 1997 Nick Clifton <nickc@cygnus.com>
* v850-dis.c (disassemble): Improved display of register lists.
-start-sanitize-v850e
+end-sanitize-v850e
Thu Sep 11 17:35:10 1997 Doug Evans <dje@canuck.cygnus.com>
* sparc-opc.c (sparc_opcodes): Fix assembler args to
* alpha-opc.c (alpha_opcodes): Fix hw_rei_stall mungage.
+start-sanitize-v850e
Mon Aug 18 11:10:03 1997 Nick Clifton <nickc@cygnus.com>
* v850-opc.c (v850_opcodes[]): Remove use of flag field.
-start-sanitize-v850eq
* v850-opc.c (v850_opcodes[]): Add support for reversed short load
opcodes..
-start-sanitize-v850eq
-start-sanitize-v850e
Mon Aug 18 11:08:25 1997 Nick Clifton <nickc@cygnus.com>
* configure (cgen_files): Add support for v850e target.
* configure.in (cgen_files): Add support for v850e target.
-end-sanitize-v850e
-start-sanitize-v850eq
Mon Aug 18 11:08:25 1997 Nick Clifton <nickc@cygnus.com>
* configure (cgen_files): Add support for v850eq target.
* configure.in (cgen_files): Add support for v850eq target.
-end-sanitize-v850eq
+end-sanitize-v850e
Fri Aug 15 05:17:48 1997 Doug Evans <dje@canuck.cygnus.com>
Wed Aug 13 18:52:11 1997 Nick Clifton <nickc@cygnus.com>
-start-sanitize-v850eq
- * .Sanitize (Do-first): Add support for keep-v850eq command line
- option.
-
+start-sanitize-v850e
* v850-dis.c (disassemble): Add support for v850EQ instructions.
* v850-opc.c (insert_i5div, extract_i5div): New Functions.
(v850_opcodes): Add v850EQ instructions.
-end-sanitize-v850eq
-start-sanitize-v850e
- * .Sanitize (Do-first): Add support for keep-v850e command line
- option.
-
+
* v850-dis.c (disassemble): Add support for v850E instructions.
* v850-opc.c (insert_d5_4, extract_d5_4, insert_d16_16,
extract_d16_16, insert_i9, extract_i9, insert_u9, extract_u9,
insert_spe, extract_spe): New Functions.
(v850_opcodes): Add v850E instructions.
-start-sanitize-v850e
+end-sanitize-v850e
* v850-opc.c: Reorganised and re-layed out to improve readability
and portability.
* mips-opc.c (mips_builtin_opcodes): Add "pinteh", "pexeh" and
"pexew" as synonyms for "pintoh", "pexoh", "pexow".
-end-sanitize-5900
+end-sanitize-r5900
Wed Jun 25 15:25:57 1997 Felix Lee <flee@cirdan.cygnus.com>
* ppc-opc.c (extract_nsi): make unsigned expression signed before
(v850_opcodes): Fix mask for jarl and jr.
* v850-dis.c: New file. Skeleton for disassembler support.
- * Makefile.in Remove v850 references, they're not needed here
- and they weren't being sanitized away.
+ * Makefile.in Remove v850 references, they're not needed here.
* configure.in: Add v850-dis.o when building v850 toolchains.
* configure: Rebuilt.
* disassemble.c (disassembler): Call v850 disassembler.