+2005-10-08 James Lemke <jim@wasabisystems.com>
+
+ * arm-dis.c (coprocessor_opcodes): Fix mask for various Maverick CDP
+ operations.
+
+2005-10-06 Daniel Jacobowitz <dan@codesourcery.com>
+
+ * ppc-dis.c (struct dis_private): Remove.
+ (powerpc_dialect): Avoid aliasing warnings.
+ (print_insn_big_powerpc, print_insn_little_powerpc): Likewise.
+
+2005-09-30 Nick Clifton <nickc@redhat.com>
+
+ * po/ga.po: New Irish translation.
+ * configure.in (ALL_LINGUAS): Add "ga".
+ * configure: Regenerate.
+
+2005-09-30 H.J. Lu <hongjiu.lu@intel.com>
+
+ * Makefile.am: Run "make dep-am".
+ * Makefile.in: Regenerated.
+ * aclocal.m4: Likewise.
+ * configure: Likewise.
+
+2005-09-30 Catherine Moore <clm@cm00re.com>
+
+ * Makefile.am: Bfin support.
+ * Makefile.in: Regenerated.
+ * aclocal.m4: Regenerated.
+ * bfin-dis.c: New file.
+ * configure.in: Bfin support.
+ * configure: Regenerated.
+ * disassemble.c (ARCH_bfin): Define.
+ (disassembler): Add case for bfd_arch_bfin.
+
+2005-09-28 Jan Beulich <jbeulich@novell.com>
+
+ * i386-dis.c (stack_v_mode): Renamed from branch_v_mode.
+ (indirEv): Use it.
+ (stackEv): New.
+ (Ob64, Ov64): Rename to Ob, Ov. Delete unused original definitions.
+ (dis386): Document and use new 'V' meta character. Use it for
+ single-byte push/pop opcode forms. Use stackEv for mod-r/m push/pop
+ opcode forms. Correct typo in 'pop ss'. Replace Ob64/Ov64 by Ob/Ov.
+ (putop): 'q' suffix for 'T' and 'U' meta depends on DFLAG. Mark
+ data prefix as used whenever DFLAG was examined. Handle 'V'.
+ (intel_operand_size): Use stack_v_mode.
+ (OP_E): Use stack_v_mode, but handle only the special case of
+ 64-bit mode without operand size override here; fall through to
+ v_mode case otherwise.
+ (OP_REG): Special case rAX_reg ... rDI_reg only when 64-bit mode
+ and no operand size override is present.
+ (OP_J): Use get32s for obtaining the displacement also when rex64
+ is present.
+
+2005-09-08 Paul Brook <paul@codesourcery.com>
+
+ * arm-dis.c (arm_opcodes, thumb32_opcodes): Rename smi to smc.
+
+2005-09-06 Chao-ying Fu <fu@mips.com>
+
+ * mips-opc.c (MT32): New define.
+ (mips_builtin_opcodes): Move "bc0f", "bc0fl", "bc0t", "bc0tl" to the
+ bottom to avoid opcode collision with "mftr" and "mttr".
+ Add MT instructions.
+ * mips-dis.c (mips_arch_choices): Enable INSN_MT for mips32r2.
+ (print_insn_args): Add supports for +t, +T, !, $, *, &, g operand
+ formats.
+
+2005-09-02 Paul Brook <paul@codesourcery.com>
+
+ * arm-dis.c (coprocessor_opcodes): Add null terminator.
+
2005-09-02 Paul Brook <paul@codesourcery.com>
* arm-dis.c (coprocessor_opcodes): New.