* elf32-mep.c (config_names): Regenerate configuration.

[deliverable/binutils-gdb.git] / opcodes / ChangeLog

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 2d8303c0199e27c99b14eeabbc576807a787fce6..483617e5a7e129aaf6ea59974cdd3a86b3073f26 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,116 @@
+2009-02-02  DJ Delorie  <dj@redhat.com>
+
+       * mep-asm.c: Regenerate.
+       * mep-desc.c: Regenerate.
+       * mep-desc.h: Regenerate.
+       * mep-dis.c: Regenerate.
+       * mep-ibld.c: Regenerate.
+       * mep-opc.c: Regenerate.
+       * mep-opc.h: Regenerate.
+
+2009-01-29  Mark Mitchell  <mark@codesourcery.com>
+
+       * arm-dis.c (thumb32_opcodes): Correct decoding for qadd, qdadd,
+       qsub, and qdsub.
+
+2009-01-28  Chao-ying Fu  <fu@mips.com>
+
+        * mips-opc.c (suxc1): Add the flag of FP_D.
+
+2009-01-20  Alan Modra  <amodra@bigpond.net.au>
+
+       * fr30-asm.c, fr30-dis.c, fr30-ibld.c, frv-asm.c, frv-dis.c,
+       * frv-ibld.c, ip2k-asm.c, ip2k-dis.c, ip2k-ibld.c,
+       * iq2000-asm.c, iq2000-dis.c, iq2000-ibld.c, m32c-asm.c,
+       * m32c-dis.c, m32c-ibld.c, m32r-asm.c, m32r-dis.c,
+       * m32r-ibld.c, mep-asm.c, mep-dis.c, mep-ibld.c, mt-asm.c,
+       * mt-dis.c, mt-ibld.c, openrisc-asm.c, openrisc-dis.c,
+       * openrisc-ibld.c, xc16x-asm.c, xc16x-dis.c, xc16x-ibld.c,
+       * xstormy16-asm.c, xstormy16-dis.c, xstormy16-ibld.c: Regenerate.
+
+2009-01-16  Alan Modra  <amodra@bigpond.net.au>
+
+       * configure.in (commonbfdlib): Delete.
+       (SHARED_LIBADD): Add pic libiberty if such is available.
+       * configure: Regenerate.
+       * po/POTFILES.in: Regenerate.
+
+2009-01-14  Peter Bergner  <bergner@vnet.ibm.com>
+
+       * ppc-dis.c (print_insn_powerpc): Skip insn if it is deprecated.
+       * ppc-opc.c (powerpc_opcodes) <mtfsf, mtfsf.>: Deprecate the two
+       operand form and enable the four operand form for POWER6 and later.
+       <mtfsfi, mtfsfi.>: Deprecate the two operand form and enable the
+       three operand form for POWER6 and later.
+
+2009-01-14  Mike Frysinger  <vapier@gentoo.org>
+
+       * bfin-dis.c (OUTS): Use "%s" as format string.
+
+2009-01-13  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * i386-gen.c (cpu_flag_init): Remove a white space.
+       (operand_type_init): Likewise.
+
+2009-01-12  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * i386-opc.tbl: Add NoAVX to movnti, lfence and mfence.
+       * i386-tbl.h: Regenerated.
+
+2009-01-12  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * i386-dis.c (dis386): Use EbS on addB, orB, adcB, sbbB, andB,
+       subB, xorB and cmpB.  Use EvS on addS, orS, adcS, sbbS, andS,
+       subS, xorS and cmpS.
+
+2009-01-10  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * i386-gen.c (cpu_flag_init): Replace CpuP4 and CpuK6 with
+       CpuClflush and CpuSYSCALL, respectively. Remove CpuK8.  Add
+       CPU_COREI7_FLAGS, CPU_CLFLUSH_FLAGS and CPU_SYSCALL_FLAGS.
+       (cpu_flags): Remove CpuP4, CpuK6 and CpuK8.  Add CpuClflush
+       and CpuSYSCALL.
+       (lineno): Removed.
+       (set_bitfield): Take an argument, lineno.  Don't report lineno
+       on error if it is -1.
+       (process_i386_cpu_flag): Take an argument, lineno.
+       (process_i386_opcode_modifier): Likewise.
+       (process_i386_operand_type): Likewise.
+       (output_i386_opcode): Likewise.
+       (opcode_hash_entry): Add lineno.
+       (process_i386_opcodes): Updated.
+       (process_i386_registers): Likewise.
+       (process_i386_initializers): Likewise.
+
+       * i386-opc.h (CpuP4): Removed.
+       (CpuK6): Likewise.
+       (CpuK8): Likewise.
+       (CpuClflush): New.
+       (CpuSYSCALL): Likewise.
+       (CpuMMX): Updated.
+       (i386_cpu_flags): Remove cpup4, cpuk6 and cpuk8.  Add
+       cpuclflush and cpusyscall.
+
+       * i386-opc.tbl: Update movnti, clflush, lfence, mfence, pause,
+       syscall and sysret.
+       * i386-init.h: Regenerated.
+       * i386-tbl.h: Likewise.
+
+2009-01-09  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * i386-gen.c (cpu_flag_init): Add CpuRdtscp to CPU_K8_FLAGS
+       and CPU_AMDFAM10_FLAGS.  Add CPU_RDTSCP_FLAGS.
+       (cpu_flags): Add CpuRdtscp.
+       (set_bitfield): Remove CpuSledgehammer check.
+
+       * i386-opc.h (CpuRdtscp): New.
+       (CpuLM): Updated.
+       (i386_cpu_flags): Add cpurdtscp.
+
+       * i386-opc.tbl: Replace CpuSledgehammer with CpuRdtscp.
+       * i386-init.h: Regenerated.
+       * i386-tbl.h: Likewise.
+
 2009-01-09  Peter Bergner  <bergner@vnet.ibm.com>
 
        * ppc-opc.c (PPCNONE): Define.