+2019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
+ Michael Collison <michael.collison@arm.com>
+
+ * arm-dis.c (enum mve_instructions): Add new instructions.
+ (enum mve_unpredictable): Add new reasons.
+ (enum mve_undefined): Likewise.
+ (is_mve_okay_in_it): Handle new isntructions.
+ (is_mve_encoding_conflict): Likewise.
+ (is_mve_undefined): Likewise.
+ (is_mve_unpredictable): Likewise.
+ (print_mve_vmov_index): Likewise.
+ (print_simd_imm8): Likewise.
+ (print_mve_undefined): Likewise.
+ (print_mve_unpredictable): Likewise.
+ (print_mve_size): Likewise.
+ (print_insn_mve): Likewise.
+
+2019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
+ Michael Collison <michael.collison@arm.com>
+
+ * arm-dis.c (enum mve_instructions): Add new instructions.
+ (enum mve_unpredictable): Add new reasons.
+ (enum mve_undefined): Likewise.
+ (is_mve_encoding_conflict): Handle new instructions.
+ (is_mve_undefined): Likewise.
+ (is_mve_unpredictable): Likewise.
+ (print_mve_undefined): Likewise.
+ (print_mve_unpredictable): Likewise.
+ (print_mve_rounding_mode): Likewise.
+ (print_mve_vcvt_size): Likewise.
+ (print_mve_size): Likewise.
+ (print_insn_mve): Likewise.
+
+2019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
+ Michael Collison <michael.collison@arm.com>
+
+ * arm-dis.c (enum mve_instructions): Add new instructions.
+ (enum mve_unpredictable): Add new reasons.
+ (enum mve_undefined): Likewise.
+ (is_mve_undefined): Handle new instructions.
+ (is_mve_unpredictable): Likewise.
+ (print_mve_undefined): Likewise.
+ (print_mve_unpredictable): Likewise.
+ (print_mve_size): Likewise.
+ (print_insn_mve): Likewise.
+
+2019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
+ Michael Collison <michael.collison@arm.com>
+
+ * arm-dis.c (enum mve_instructions): Add new instructions.
+ (enum mve_undefined): Add new reasons.
+ (insns): Add new instructions.
+ (is_mve_encoding_conflict):
+ (print_mve_vld_str_addr): New print function.
+ (is_mve_undefined): Handle new instructions.
+ (is_mve_unpredictable): Likewise.
+ (print_mve_undefined): Likewise.
+ (print_mve_size): Likewise.
+ (print_insn_coprocessor_1): Handle MVE VLDR, VSTR instructions.
+ (print_insn_mve): Handle new operands.
+
+2019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
+ Michael Collison <michael.collison@arm.com>
+
+ * arm-dis.c (enum mve_instructions): Add new instructions.
+ (enum mve_unpredictable): Add new reasons.
+ (is_mve_encoding_conflict): Handle new instructions.
+ (is_mve_unpredictable): Likewise.
+ (mve_opcodes): Add new instructions.
+ (print_mve_unpredictable): Handle new reasons.
+ (print_mve_register_blocks): New print function.
+ (print_mve_size): Handle new instructions.
+ (print_insn_mve): Likewise.
+
+2019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
+ Michael Collison <michael.collison@arm.com>
+
+ * arm-dis.c (enum mve_instructions): Add new instructions.
+ (enum mve_unpredictable): Add new reasons.
+ (enum mve_undefined): Likewise.
+ (is_mve_encoding_conflict): Handle new instructions.
+ (is_mve_undefined): Likewise.
+ (is_mve_unpredictable): Likewise.
+ (coprocessor_opcodes): Move NEON VDUP from here...
+ (neon_opcodes): ... to here.
+ (mve_opcodes): Add new instructions.
+ (print_mve_undefined): Handle new reasons.
+ (print_mve_unpredictable): Likewise.
+ (print_mve_size): Handle new instructions.
+ (print_insn_neon): Handle vdup.
+ (print_insn_mve): Handle new operands.
+
+2019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
+ Michael Collison <michael.collison@arm.com>
+
+ * arm-dis.c (enum mve_instructions): Add new instructions.
+ (enum mve_unpredictable): Add new values.
+ (mve_opcodes): Add new instructions.
+ (vec_condnames): New array with vector conditions.
+ (mve_predicatenames): New array with predicate suffixes.
+ (mve_vec_sizename): New array with vector sizes.
+ (enum vpt_pred_state): New enum with vector predication states.
+ (struct vpt_block): New struct type for vpt blocks.
+ (vpt_block_state): Global struct to keep track of state.
+ (mve_extract_pred_mask): New helper function.
+ (num_instructions_vpt_block): Likewise.
+ (mark_outside_vpt_block): Likewise.
+ (mark_inside_vpt_block): Likewise.
+ (invert_next_predicate_state): Likewise.
+ (update_next_predicate_state): Likewise.
+ (update_vpt_block_state): Likewise.
+ (is_vpt_instruction): Likewise.
+ (is_mve_encoding_conflict): Add entries for new instructions.
+ (is_mve_unpredictable): Likewise.
+ (print_mve_unpredictable): Handle new cases.
+ (print_instruction_predicate): Likewise.
+ (print_mve_size): New function.
+ (print_vec_condition): New function.
+ (print_insn_mve): Handle vpt blocks and new print operands.
+
+2019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
+
+ * arm-dis.c (print_insn_coprocessor_1): Disable the use of coprocessors
+ 8, 14 and 15 for Armv8.1-M Mainline.
+
+2019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
+ Michael Collison <michael.collison@arm.com>
+
+ * arm-dis.c (enum mve_instructions): New enum.
+ (enum mve_unpredictable): Likewise.
+ (enum mve_undefined): Likewise.
+ (struct mopcode32): New struct.
+ (is_mve_okay_in_it): New function.
+ (is_mve_architecture): Likewise.
+ (arm_decode_field): Likewise.
+ (arm_decode_field_multiple): Likewise.
+ (is_mve_encoding_conflict): Likewise.
+ (is_mve_undefined): Likewise.
+ (is_mve_unpredictable): Likewise.
+ (print_mve_undefined): Likewise.
+ (print_mve_unpredictable): Likewise.
+ (print_insn_coprocessor_1): Use arm_decode_field_multiple.
+ (print_insn_mve): New function.
+ (print_insn_thumb32): Handle MVE architecture.
+ (select_arm_features): Force thumb for Armv8.1-m Mainline.
+
+2019-05-10 Nick Clifton <nickc@redhat.com>
+
+ PR 24538
+ * ia64-opc.c (ia64_find_matching_opcode): Check for reaching the
+ end of the table prematurely.
+
2019-05-10 Faraz Shahbazker <fshahbazker@wavecomp.com>
* mips-opc.c (mips_opcodes): Enable ADD, SUB, DADD and DSUB
projects / deliverable / binutils-gdb.git / blobdiff