[AArch64][PATCH 13/14] Support FP16 Adv.SIMD Shift By Immediate instructions.

[deliverable/binutils-gdb.git] / opcodes / ChangeLog

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 5993ba5538b175e3e88d84c7fda56f1beabbccb4..5b76b1b32a8b7b603d7ce285e20fadd3ba685d02 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,62 @@
+2015-12-14  Matthew Wahab  <matthew.wahab@arm.com>
+
+       * aarch64-asm-2.c: Regenerate.
+       * aarch64-dis-2.c: Regenerate.
+       * aarch64-opc-2.c: Regenerate.
+       * aarch64-tbl.h (QL_VSHIFT_H): New.
+       (aarch64_opcode_table): Add fp16 versions of scvtf, fcvtzs, ucvtf
+       and fcvtzu to the Adv.SIMD shift by immediate group.
+
+2015-12-14  Matthew Wahab  <matthew.wahab@arm.com>
+
+       * aarch64-asm-2.c: Regenerate.
+       * aarch64-dis-2.c: Regenerate.
+       * aarch64-opc-2.c: Regenerate.
+       * aarch64-tbl.h (QL_SISD_PAIR_H): New.
+       (aarch64_opcode_table): Add fp16 versions of fmaxnmp, faddp,
+       fmaxp, fminnmp, fminp to the Adv.SIMD scalar pairwise group.
+
+2015-12-14  Matthew Wahab  <matthew.wahab@arm.coM>
+
+       * aarch64-dis.c (get_vreg_qualifier_from_value): Update comment
+       and adjust calculation to ignore qualifier for type 2H.
+       * aarch64-opc.c (aarch64_opnd_qualifier): Add "2H".
+
+2015-12-14  Matthew Wahab  <matthew.wahab@arm.com>
+
+       * aarch64-asm-2.c: Regenerate.
+       * aarch64-dis-2.c: Regenerate.
+       * aarch64-opc-2.c: Regenerate.
+       * aarch64-tbl.h (QL_SIMD_IMM_H): New.
+       (aarch64_opcode_table): Add fp16 version of fmov to the Adv.SIMD
+       modified immediate group.
+
+2015-12-14  Matthew Wahab  <matthew.wahab@arm.com>
+
+       * aarch64-asm-2.c: Regenerate.
+       * aarch64-dis-2.c: Regenerate.
+       * aarch64-opc-2.c: Regenerate.
+       * aarch64-tbl.h (QL_XLANES_FP_H): New.
+       (aarch64_opcode_table): Add fp16 versions of fmaxnmv, fmaxv,
+       fminnmv, fminv to the Adv.SIMD across lanes group.
+
+2015-12-14  Matthew Wahab  <matthew.wahab@arm.com>
+
+       * aarch64-asm-2.c: Regenerate.
+       * aarch64-dis-2.c: Regenerate.
+       * aarch64-opc-2.c: Regenerate.
+       * aarch64-tbl.h (aarch64_opcode_table): Add fp16 versions of fmla,
+       fmls, fmul and fmulx to the scalar indexed element group.
+
+2015-12-14  Matthew Wahab  <matthew.wahab@arm.com>
+
+       * aarch64-asm-2.c: Regenerate.
+       * aarch64-dis-2.c: Regenerate.
+       * aarch64-opc-2.c: Regenerate.
+       * aarch64-tbl.h (QL_ELEMENT_FP_H): New.
+       (aarch64_opcode_table): Add fp16 versions of fmla, fmls, fmul and
+       fmulx to the vector indexed element group.
+
 2015-12-14  Matthew Wahab  <matthew.wahab@arm.com>
 
        * aarch64-asm-2.c: Regenerate.