start-sanitize-v850
+Sat Aug 31 01:27:26 1996 Jeffrey A Law (law@cygnus.com)
+
+ * v850-dis.c (disassemble): Handle insertion of ',', '[' and
+ ']' characters into the output stream.
+ * v850-opc.c (v850_opcodes: Remove size field from all opcodes.
+ Add "memop" field to all opcodes (for the disassembler).
+ Reorder opcodes so that "nop" comes before "mov" and "jr"
+ comes before "jarl".
+
+ * v850-dis.c (print_insn_v850): Fix typo in last change.
+
+ * v850-dis.c (print_insn_v850): Properly handle disassembling
+ a two byte insn at the end of a memory region when the memory
+ region's size is only two byte aligned.
+
+ * v850-dis.c (v850_cc_names): Fix stupid thinkos.
+
+ * v850-dis.c (v850_reg_names): Define.
+ (v850_sreg_names, v850_cc_names): Likewise.
+ (disassemble): Very rough cut at printing operands (unformatted).
+
+ * v850-opc.c (BOP_MASK): Fix.
+ (v850_opcodes): Fix mask for jarl and jr.
+
+ * v850-dis.c: New file. Skeleton for disassembler support.
+ * Makefile.in Remove v850 references, they're not needed here
+ and they weren't being sanitized away.
+ * configure.in: Add v850-dis.o when building v850 toolchains.
+ * configure: Rebuilt.
+ * disassemble.c (disassembler): Call v850 disassembler.
+
+ * v850-opc.c (insert_d8_7, extract_d8_7): New functions.
+ (insert_d8_6, extract_d8_6): New functions.
+ (v850_operands): Rename D7S to D7; operand for D7 is unsigned.
+ Rename D8 to D8_7, use {insert,extract}_d8_7 routines.
+ Add D8_6.
+ (IF4A, IF4B): Use "D7" instead of "D7S".
+ (IF4C, IF4D): Use "D8_7" instead of "D8".
+ (IF4E, IF4F): New. Use "D8_6".
+ (v850_opcodes): Use IF4A/IF4B for sld.b/sst.b. Use IF4C/IF4D for
+ sld.h/sst.h. Use IF4E/IF4F for sld.w/sst.w.
+
+ * v850-opc.c (insert_d16_15, extract_d16_15): New functions.
+ (v850_operands): Change D16 to D16_15, use special insert/extract
+ routines. New new D16 that uses the generic insert/extract code.
+ (IF7A, IF7B): Use D16_15.
+ (IF7C, IF7D): New. Use D16.
+ (v850_opcodes): Use IF7C and IF7D for ld.b and st.b.
+
+ * v850-opc.c (insert_d9, insert_d22): Slightly improve error
+ message. Issue an error if the branch offset is odd.
+
+ * v850-opc.c: Add notes about needing special insert/extract
+ for all the load/store insns, except "ld.b" and "st.b".
+
+ * v850-opc.c (insert_d22, extract_d22): New functions.
+ (v850_operands): Use insert_d22 and extract_d22 for
+ D22 operands.
+ (insert_d9): Fix range check.
+
+Fri Aug 30 18:01:02 1996 J.T. Conklin <jtc@hippo.cygnus.com>
+
+ * v850-opc.c (v850_operands): Add V850_OPERAND_SIGNED flag
+ and set bits field to D9 and D22 operands.
+
+Thu Aug 29 11:10:46 1996 Jeffrey A Law (law@cygnus.com)
+
+ * v850-opc.c (v850_operands): Define SR2 operand.
+ (v850_opcodes): "ldsr" uses R1,SR2.
+
+ * v850-opc.c (v850_opcodes): Fix opcode specs for
+ sld.w, sst.b, sst.h, sst.w, and nop.
+
+Wed Aug 28 15:55:43 1996 Jeffrey A Law (law@cygnus.com)
+
+ * v850-opc.c (v850_opcodes): Add null opcode to mark the
+ end of the opcode table.
+
+end-sanitize-v850
+start-sanitize-d10v
+Mon Aug 26 13:35:53 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
+
+ * d10v-opc.c (pre_defined_registers): Added register pairs,
+ "r0-r1", "r2-r3", etc.
+
+end-sanitize-d10v
+start-sanitize-v850
+Fri Aug 23 00:27:01 1996 Jeffrey A Law (law@cygnus.com)
+
+ * v850-opc.c (v850_operands): Make I16 be a signed operand.
+ Create I16U for an unsigned 16bit mmediate operand.
+ (v850_opcodes): Use I16U for "ori", "andi" and "xori".
+
+ * v850-opc.c (v850_operands): Define EP operand.
+ (IF4A, IF4B, IF4C, IF4D): Use EP.
+
+ * v850-opc.c (v850_opcodes): Fix opcode numbers for "mov"
+ with immediate operand, "movhi". Tweak "ldsr".
+
+ * v850-opc.c (v850_opcodes): Get ld.[bhw] and st.[bhw]
+ correct. Get sld.[bhw] and sst.[bhw] closer.
+
+ * v850-opc.c (v850_operands): "not" is a two byte insn
+
+ * v850-opc.c (v850_opcodes): Correct bit pattern for setf.
+
+ * v850-opc.c (v850_operands): D16 inserts at offset 16!
+
+ * v850-opc.c (two): Get order of words correct.
+
+ * v850-opc.c (v850_operands): I16 inserts at offset 16!
+
+ * v850-opc.c (v850_operands): Add "SR1" and "SR2" for system
+ register source and destination operands.
+ (v850_opcodes): Use SR1 and SR2 for "ldsr" and "stsr".
+
+ * v850-opc.c (v850_opcodes): Fix thinko in "jmp" opcode. Fix
+ same thinko in "trap" opcode.
+
+ * v850-opc.c (v850_opcodes): Add initializer for size field
+ on all opcodes.
+
+ * v850-opc.c (v850_operands): D6 -> DS7. References changed.
+ Add D8 for 8-bit unsigned field in short load/store insns.
+ (IF4A, IF4D): These both need two registers.
+ (IF4C, IF4D): Define. Use 8-bit unsigned field.
+ (v850_opcodes): For "sld.h", "sld.w", "sst.h", "sst.w", use
+ IF4C & IF4D. For "trap" use I5U, not I5. Add IF1 operand
+ for "ldsr" and "stsr".
+ * v850-opc.c (v850_operands): 3-bit immediate for bit insns
+ is unsigned.
+
+ * v850-opc.c (v850_opcodes): Correct short store half (sst.h) and
+ short store word (sst.w).
+
+Thu Aug 22 16:57:27 1996 J.T. Conklin <jtc@rtl.cygnus.com>
+
+ * v850-opc.c (v850_operands): Added insert and extract fields,
+ pointers to functions that handle unusual operand encodings.
+
Thu Aug 22 01:05:24 1996 Jeffrey A Law (law@cygnus.com)
* v850-opc.c (v850_opcodes): Enable "trap".
Wed Aug 21 17:31:26 1996 J.T. Conklin <jtc@hippo.cygnus.com>
- * v850-opc.c: Add flags field to struct v850_operands, add move
- opcodes to opcode table.
+ * v850-opc.c (v850_operands): Add flags field.
+ (v850_opcodes): add move opcodes.
Tue Aug 20 14:41:03 1996 J.T. Conklin <jtc@hippo.cygnus.com>
projects / deliverable / binutils-gdb.git / blobdiff