gas/testsuite/

[deliverable/binutils-gdb.git] / opcodes / ChangeLog

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 81b4003f1aa6c7fa84d5afbf91cbd8a2af443e17..69a13a6a4ba0319c3a5b9e2d908f025690749043 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,51 @@
+2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * i386-gen.c (cpu_flags): Add CpuXsave.
+
+       * i386-opc.h (CpuXsave): New.
+       (Cpu64): Updated.
+       (i386_cpu_flags): Add cpuxsave.
+
+       * i386-dis.c (MOD_0FAE_REG_4): New.
+       (RM_0F01_REG_2): Likewise.
+       (MOD_0FAE_REG_5): Updated.
+       (RM_0F01_REG_3): Likewise.
+       (reg_table): Use MOD_0FAE_REG_4.
+       (mod_table): Use RM_0F01_REG_2.  Add MOD_0FAE_REG_4.  Updated
+       for xrstor.
+       (rm_table): Add RM_0F01_REG_2.
+
+       * i386-opc.tbl: Add xsave, xrstor, xgetbv and xsetbv.
+       * i386-init.h: Regenerated.
+       * i386-tbl.h: Likewise.
+
+2008-02-11  Jan Beulich  <jbeulich@novell.com>
+
+       * i386-opc.tbl: Remove Disp32S from CpuNo64 opcodes. Remove
+       Disp16 from Cpu64 non-jump opcodes (including loop and j?cxz).
+       * i386-tbl.h: Re-generate.
+
+2008-02-04  H.J. Lu  <hongjiu.lu@intel.com>
+
+       PR 5715
+       * configure: Regenerated.
+
+2008-02-04  Adam Nemet  <anemet@caviumnetworks.com>
+
+       * mips-dis.c: Update copyright.
+       (mips_arch_choices): Add Octeon.
+       * mips-opc.c: Update copyright.
+       (IOCT): New macro.
+       (mips_builtin_opcodes): Add Octeon instruction synciobdma.
+
+2008-01-29  Alan Modra  <amodra@bigpond.net.au>
+
+       * ppc-opc.c: Support optional L form mtmsr.
+
+2008-01-24  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * i386-dis.c (OP_E_extended): Handle r12 like rsp.
+
 2008-01-23  H.J. Lu  <hongjiu.lu@intel.com>
 
        * i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS.