-2007-10-15 H.J. Lu <hongjiu.lu@intel.com>
+2008-05-30 H.J. Lu <hongjiu.lu@intel.com>
- * i386-dis.c (dis386_twobyte): Reformat.
- (prefix_table): Likewise.
- (three_byte_table): Likewise.
-
-2007-10-15 Alan Modra <amodra@bigpond.net.au>
-
- * mcore-dis.c (print_insn_mcore): Protect "fprintf" var against
- macro expansion.
-
-2007-10-12 H.J. Lu <hongjiu.lu@intel.com>
-
- * i386-gen.c (opcode_modifiers): Add FirstXmm0.
-
- * i386-opc.h (FirstXmm0): New.
- (IsPrefix): Updated.
- (i386_opcode_modifier): Add firstxmm0.
-
- * i386-opc.tbl (blendvpd): Replace RegKludge with FirstXmm0.
- (blendvps): Likewise.
- (pblendvb): Likewise.
+ * i386-opc.tbl: Add vmovd with 64bit operand.
* i386-tbl.h: Regenerated.
-2007-10-12 H.J. Lu <hongjiu.lu@intel.com>
-
- * i386-dis.c (prefix_table): Reformat pblendvb and blendvps.
-
-2007-10-10 H.J. Lu <hongjiu.lu@intel.com>
-
- * i386-dis.c (v_mode): Defined as previous one + 1.
- (w_mode): Likewise.
- (d_mode): Likewise.
- (q_mode): Likewise.
- (t_mode): Likewise.
- (x_mode): Likewise.
- (m_mode): Likewise.
- (cond_jump_mode): Likewise.
- (loop_jcxz_mode): Likewise.
- (dq_mode): Likewise.
- (dqw_mode): Likewise.
- (f_mode): Likewise.
- (const_1_mode): Likewise.
- (stack_v_mode): Likewise.
- (z_mode): Likewise.
- (o_mode): Likewise.
- (dqb_mode): Likewise.
- (dqd_mode): Likewise.
- (es_reg): Likewise.
- (cs_reg): Likewise.
- (ss_reg): Likewise.
- (ds_reg): Likewise.
- (fs_reg): Likewise.
- (gs_reg): Likewise.
- (eAX_reg): Likewise.
- (eCX_reg): Likewise.
- (eDX_reg): Likewise.
- (eBX_reg): Likewise.
- (eSP_reg): Likewise.
- (eBP_reg): Likewise.
- (eSI_reg): Likewise.
- (eDI_reg): Likewise.
- (al_reg): Likewise.
- (cl_reg): Likewise.
- (dl_reg): Likewise.
- (bl_reg): Likewise.
- (ah_reg): Likewise.
- (ch_reg): Likewise.
- (dh_reg): Likewise.
- (bh_reg): Likewise.
- (ax_reg): Likewise.
- (cx_reg): Likewise.
- (dx_reg): Likewise.
- (bx_reg): Likewise.
- (sp_reg): Likewise.
- (bp_reg): Likewise.
- (si_reg): Likewise.
- (di_reg): Likewise.
- (rAX_reg): Likewise.
- (rCX_reg): Likewise.
- (rDX_reg): Likewise.
- (rBX_reg): Likewise.
- (rSP_reg): Likewise.
- (rBP_reg): Likewise.
- (rSI_reg): Likewise.
- (rDI_reg): Likewise.
- (z_mode_ax_reg): Likewise.
- (indir_dx_reg): Likewise.
- (DREX_OC1): Updated.
- (DREX_NO_OC0): Likewise.
- (DREX_MASK): Likewise.
- (MAX_BYTEMODE): New. Issue an error if MAX_BYTEMODE is not
- less than DREX_OC1.
-
-2007-10-08 H.J. Lu <hongjiu.lu@intel.com>
-
- * i386-dis.c: Updated comments for 'Y'.
- (putop): Don't add 'q' for 'Y' if suffix_always isn't true.
-
-2007-10-08 Maciej W. Rozycki <macro@linux-mips.org>
-
- * opcodes/mips-dis.c (mips_cp0_names_r3000): New definition.
- (mips_cp0_names_r4000): Likewise.
- (mips_arch_choices): Link to the above as appropriate.
-
-2007-10-08 Nick Clifton <nickc@redhat.com>
-
- * configure.in (SHARED_DEPENDENCIES): Change non-cygwin dependency
- to be ../bfd/libbfd.la.
- * configure: Regenerate.
-
-2007-10-05 H.J. Lu <hongjiu.lu@intel.com>
-
- * i386-dis.c (dis386_twobyte): Add getsec.
+2008-05-27 Martin Schwidefsky <schwidefsky@de.ibm.com>
- * i386-gen.c (cpu_flags): Add CpuSMX.
+ * s390-opc.c (INSTR_RRF_R0RR): Fix RRF_R0RR operand format.
- * i386-opc.h (CpuSMX): New.
- (CpuSSSE3): Updated.
- (i386_cpu_flags): Add cpusmx.
-
- * i386-opc.tbl: Add getsec.
- * i386-init.h: Regenerated.
- * i386-tbl.h: Likewise.
-
-2007-10-05 H.J. Lu <hongjiu.lu@intel.com>
-
- * i386-dis.c (reg_table): Use "{ XX }" on "(bad)".
- (prefix_table): Likewise.
-
-2007-10-04 H.J. Lu <hongjiu.lu@intel.com>
-
- * i386-dis.c (dis386_twobyte): Use EXx instead of EXq on
- unpckhpX and unpckhpX.
-
-2007-10-04 David Daney <ddaney@avtrex.com>
-
- * mips-opc.c (mips_builtin_opcodes): Mark lwxc1 as working on FP_S
- registers.
-
-2007-10-04 H.J. Lu <hongjiu.lu@intel.com>
-
- * i386-dis.c (MOD_0F12_PREFIX_0): Use "movlps" and "movhlps"
- instead of "movlpX" and "movhlpX", respectively.
- (MOD_0F16_PREFIX_0): Use "movhps" and "movlhps" instead of
- "movhpX" and "movlhpX", respectively.
-
-2007-10-04 Nick Clifton <nickc@redhat.com>
-
- * configure.in (WIN32LDFLAGS): Rename to SHARED_LDFLAGS.
- (WIN32LIBADD): Rename to SHARED_LIBADD
- (SHARED_DEPENDENCIES): New exported variable.
- (enable_shared): Add dependency upon libbfd.la for non-cygwin
- based shared library builds.
- * Makefile.am (libopcodes_la_DEPENDENCIES): Append
- SHARED_DEPENDENCIES.
- (libopcodes_la_LIBADD): Rename WIN32LIBADD to SHARED_LIBADD.
- (libopcodes_la_LDFLAGS): Rename WIN32LDFLAGS to SHARED_LDFLAGS.
- * configure: Regenerate.
- * Makefile.in: Regenerate.
+2008-05-22 H.J. Lu <hongjiu.lu@intel.com>
- PR gas/5100
- * arc-opc.c (insert_offset): Fix spelling mistake in error
- message.
-
-2007-10-03 H.J. Lu <hongjiu.lu@intel.com>
-
- * i386-dis.c (OP_REG): Set add to 0 only when needed.
- (OP_C): Likewise.
- (OP_D): Likewise.
- (OP_MMX): Likewise.
- (OP_XMM): Likewise.
- (OP_EM): Likewise.
- (OP_MXC): Likewise.
- (OP_EX): Likewise.
-
-2007-10-03 H.J. Lu <hongjiu.lu@intel.com>
-
- * i386-opc.tbl: Update SSE comments.
-
-2007-10-01 H.J. Lu <hongjiu.lu@intel.com>
-
- * i386-dis.c (THREE_BYTE_0FBA): Renamed to ...
- (THREE_BYTE_0F7B): This.
- (dis386_twobyte): Updated.
- (three_byte_table): Updated comments.
-
-2007-10-01 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
-
- * cr16-opc.c: Updated the branch on condition instructions with
- RELAXABLE flag.
-
-2007-09-30 H.J. Lu <hongjiu.lu@intel.com>
-
- * 386-dis.c (prefix_table): Reformat comment.
-
-2007-09-29 H.J. Lu <hongjiu.lu@intel.com>
-
- * 386-dis.c (USE_GROUPS): Renamed to ...
- (USE_REG_TABLE): This.
- (USE_OPC_EXT_TABLE): Renamed to ...
- (USE_MOD_TABLE): This.
- (USE_OPC_EXT_RM_TABLE): Renamed to ...
- (USE_RM_TABLE): This.
- (USE_XXX_TABLE): Reordered.
- (GRP): Renamed to ...
- (REG_TABLE): This.
- (OPC_EXT_TABLE): Renamed to ...
- (MOD_TABLE): This.
- (OPC_EXT_RM_TABLE): Renamed to ...
- (RM_TABLE): This.
- (GRP_XXX): Renamed to ...
- (REG_XXX): This.
- (PREGRP_XXX): Renamed to ...
- (PREFIX_XXX): This.
- (OPC_EXT_XXX): Renamed to ...
- (MOD_XXX): This.
- (OPC_EXT_RM_XXX): Renamed to ...
- (RM_XXX): This.
- (grps): Renamed to ...
- (reg_table): This
- (prefix_user_table): Renamed to ...
- (prefix_table): This
- (opc_ext_table): Renamed to ...
- (mod_table): This
- (opc_ext_rm_table): Renamed to ...
- (rm_table): This
- (OPC_EXT_RM_XXX): Likewise.
- (dis386): Updated.
- (dis386_twobyte): Likewise.
- (reg_table): Likewise.
- (prefix_table): Likewise.
- (x86_64_table): Likewise.
- (three_byte_table): Likewise.
- (mod_table): Likewise.
- (rm_table): Likewise.
- (get_valid_dis386): Likewise.
-
-2007-09-28 H.J. Lu <hongjiu.lu@intel.com>
-
- * 386-dis.c (USE_PREFIX_USER_TABLE): Renamed to ...
- (USE_PREFIX_TABLE): This.
- (X86_64_SPECIAL): Renamed to ...
- (USE_X86_64_TABLE): This.
- (IS_3BYTE_OPCODE): Renamed to ...
- (USE_3BYTE_TABLE): This.
- (GRPXXX): Removed.
- (PREGRPXXX): Likewise.
- (X86_64_XXX): Likewise.
- (THREE_BYTE_XXX): Likewise.
- (OPC_EXT_XXX): Likewise.
- (OPC_EXT_RM_XXX): Likewise.
- (DIS386): New.
- (GRP): Likewise.
- (PREGRP): Likewise.
- (X86_64_TABLE): Likewise.
- (THREE_BYTE_TABLE): Likewise.
- (OPC_EXT_TABLE): Likewise.
- (OPC_EXT_RM_TABLE): Likewise.
- (GRP_XXX): Likewise.
- (PREGRP_XXX): Likewise.
- (X86_64_XXX): Likewise.
- (THREE_BYTE_XXX): Likewise.
- (OPC_EXT_XXX): Likewise.
- (OPC_EXT_RM_XXX): Likewise.
- (dis386): Updated.
- (dis386_twobyte): Likewise.
- (grps): Likewise.
- (prefix_user_table): Likewise.
- (x86_64_table): Likewise.
- (three_byte_table): Likewise.
- (opc_ext_table): Likewise.
- (opc_ext_rm_table): Likewise.
- (get_valid_dis386): Likewise.
-
-2007-09-27 H.J. Lu <hongjiu.lu@intel.com>
-
- * i386-dis.c (dis386): Swap X86_64_27 with OPC_EXT_2.
- (x86_64_table): Likewise.
- (opc_ext_table): Likewise.
-
-2007-09-27 H.J. Lu <hongjiu.lu@intel.com>
-
- PR binutils/5072
- * i386-dis.c: Update comments on '{', '}' and '|' to support
- only AT&T and Intel modes.
- (X86_64_4...X86_64_27): New.
- (dis386): Updated. Use X86_64_4...X86_64_21.
- (dis386_twobyte): Updated.
- (float_mem): Likewise.
- (x86_64_table): Add X86_64_4...X86_64_27.
- (opc_ext_table): Updated. Use X86_64_22...X86_64_27.
- (putop): Updated handling of '{', '}' and '|' to support only
- AT&T and Intel modes.
-
-2007-09-27 Kazu Hirata <kazu@codesourcery.com>
-
- * m68k-dis.c (print_insn_arg): Use %mbo instead of %mbb.
-
-2007-09-26 James E. Wilson <wilson@specifix.com>
-
- * ia64-gen.c (print_dependency_table): Fix typo in last patch.
-
-2007-09-26 Nick Clifton <nickc@redhat.com>
-
- * mt-asm.c (parse_imm16): Reword error message in order to allow
- it to be translated properly.
- * ia64-gen.c (print_dependency_table): Likewise.
- * mips-dis.c (print_insn_args): Likewise.
-
-2007-09-26 Jan Beulich <jbeulich@novell.com>
-
- * i386-dis.c (OP_E_extended): Distinguish rip- and eip-
- relative addressing. Update used_prefixes based on whether any
- base or index register was printed.
-
-2007-09-26 Jan Beulich <jbeulich@novell.com>
-
- * i386-opc.h (RegEip): Define.
- (RegEiz): Adjust.
- * i386-reg.tbl: Add eip. Mark rip and eip with RegRex64.
- * i386-tbl.h: Re-generate.
-
-2007-09-25 H.J. Lu <hongjiu.lu@intel.com>
-
- * i386-gen.c (process_i386_opcodes): Process opcode_length.
-
- * i386-opc.h (template): Add opcode_length.
- * 386-opc.tbl: Likewise.
+ * i386-opc.tbl: Add NoAVX to cvtpd2pi, cvtpi2pd and cvttpd2pi.
* i386-tbl.h: Regenerated.
-2007-09-21 H.J. Lu <hongjiu.lu@intel.com>
-
- * i386-opc.h: Adjust whitespaces.
-
-2007-09-21 Dave Brolley <brolley@redhat.com>
-
- * mep-desc.c: Regenerated.
-
-2007-09-20 H.J. Lu <hongjiu.lu@intel.com>
+2008-05-22 H.J. Lu <hongjiu.lu@intel.com>
- * i386-dis.c (OP_E_extended): Display eiz for [eiz*1 + offset].
-
-2007-09-20 H.J. Lu <hongjiu.lu@intel.com>
-
- PR 658
- * 386-dis.c (index64): New.
- (index32): Likewise.
- (intel_index64): Likewise.
- (intel_index32): Likewise.
- (att_index64): Likewise.
- (att_index32): Likewise.
- (print_insn): Set index64 and index32.
- (OP_E_extended): Use index64/index32 for index register for
- SIB with INDEX == 4.
-
- * i386-opc.h (RegEiz): New.
- (RegRiz): Likewise.
-
- * i386-reg.tbl: Add eiz and riz.
+ PR gas/6517
+ * i386-opc.tbl: Break cvtsi2ss/cvtsi2sd/vcvtsi2sd/vcvtsi2ss
+ into 32bit and 64bit. Remove Reg64|Qword and add
+ IgnoreSize|No_qSuf on 32bit version.
* i386-tbl.h: Regenerated.
-2007-09-19 H.J. Lu <hongjiu.lu@intel.com>
-
- * i386-dis.c (OP_E_extended): Always display scale for memory.
-
-2007-09-17 H.J. Lu <hongjiu.lu@intel.com>
+2008-05-21 H.J. Lu <hongjiu.lu@intel.com>
- * i386-opc.h (RegRip): New.
-
- * i386-reg.tbl (rip): Use RegRip for reg_num.
+ * i386-opc.tbl: Add NoAVX to movdq2q and movq2dq.
* i386-tbl.h: Regenerated.
-2007-09-17 Nick Clifton <nickc@redhat.com>
+2008-05-21 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
- * po/es.po: Updated Spanish translation.
+ * cr16-dis.c (build_mask): Adjust the mask for 32-bit bcond.
-2007-09-14 H.J. Lu <hongjiu.lu@intel.com>
+2008-05-14 Alan Modra <amodra@bigpond.net.au>
* Makefile.am: Run "make dep-am".
* Makefile.in: Regenerate.
-2007-09-14 Michael Meissner <michael.meissner@amd.com>
- Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
- Tony Linthicum <tony.linthicum@amd.com>
-
- * i386-opc.h (CpuSSE5): New macro.
- (i386_cpu_flags): Add Drex, Drexv and Drexc.
-
- * i386-gen.c (cpu_flag_init): Add CPU_SSE5_FLAGS.
- (operand_type_init): Add CpuSSE5.
- (opcode_modifiers): Add Drex, Drexv and Drexc.
- (i386_opcode_modifier): Ditto.
-
- * i386-opc.tbl (fmaddps,fmaddpd,fmaddss,fmaddsd): Define SSE5
- instructions here.
- (fmsubps,fmsubpd,fmsubss,fmsubsd): Ditto.
- (fnmaddps,fnmaddpd,fnmaddss,fnmaddsd): Ditto.
- (fnmsubps,fnmsubpd,fnmsubss,fnmsubsd): Ditto.
- (pmacssww,pmacsww,pmacsswd,pmacswd): Ditto.
- (pmacssdd,pmacsdd,pmacssdql,pmacssdqh): Ditto.
- (pmacsdql,pmacsdqh,pmadcsswd,pmadcswd): Ditto.
- (phaddbw,phaddbd,phaddbq,phaddwd): Ditto.
- (phaddwq,phadddq,phaddubw,phaddubd): Ditto.
- (phaddubq,phadduwd,phadduwq,phaddudq): Ditto.
- (phsubbw,phsubwd,phsubdq): Ditto.
- (pcmov,pperm,permps,permpd): Ditto.
- (protb,protw,protd,protq): Ditto.
- (pshlb,pshlw,pshld,pshlq): Ditto.
- (pshab,pshaw,pshad,pshaq): Ditto.
- (comps,comeqps,comltps,comungeps,comleps,comungtps): Ditto.
- (comunordps,comneps,comneqps,comnltps,comugeps): Ditto.
- (comnleps,comugtps,comordps,comueqps,comultps): Ditto.
- (comngeps,comuleps,comngtps,comfalseps,comuneps): Ditto.
- (comuneqps,comunltps,comgeps,comunleps,comgtps,comtrueps): Ditto.
- (compd,comeqpd,comltpd,comungepd,comlepd,comungtpd,comunordpd): Ditto.
- (comnepd,comneqpd,comnltpd,comugepd,comnlepd,comugtpd): Ditto.
- (comordpd,comueqpd,comultpd,comngepd,comulepd,comngtpd): Ditto.
- (comfalsepd,comunepd,comuneqpd,comunltpd,comgepd): Ditto.
- (comunlepd,comgtpd,comtruepd): Ditto.
- (comss,comeqss,comltss,comungess,comless,comungtss,comunordss): Ditto.
- (comness,comneqss,comnltss,comugess,comnless,comugtss): Ditto.
- (comordss,comueqss,comultss,comngess,comuless,comngtss): Ditto.
- (comfalsess,comuness,comuneqss,comunltss,comgess): Ditto.
- (comunless,comgtss,comtruess): Ditto.
- (comsd,comeqsd,comltsd,comungesd,comlesd,comungtsd,comunordsd): Ditto.
- (comnesd,comneqsd,comnltsd,comugesd,comnlesd,comugtsd): Ditto.
- (comordsd,comueqsd,comultsd,comngesd,comulesd,comngtsd): Ditto.
- (comfalsesd,comunesd,comuneqsd,comunltsd,comgesd): Ditto.
- (comunlesd,comgtsd,comtruesd): Ditto.
- (pcomub,pcomltub,pcomleub,pcomgtub,pcomgeub,pcomequb): Ditto.
- (pcomnequb,pcomneub): Ditto.
- (pcomuw,pcomltuw,pcomleuw,pcomgtuw,pcomgeuw,pcomequw): Ditto.
- (pcomnequw,pcomneuw): Ditto.
- (pcomud,pcomltud,pcomleud,pcomgtud,pcomgeud,pcomequd): Ditto.
- (pcomnequd,pcomneud): Ditto.
- (pcomuq,pcomltuq,pcomleuq,pcomgtuq,pcomgeuq,pcomequq): Ditto.
- (pcomnequq,pcomneuq): Ditto.
- (pcomb,pcomltb,pcomleb,pcomgtb,pcomgeb,pcomeqb): Ditto.
- (pcomneqb,pcomneb): Ditto.
- (pcomw,pcomltw,pcomlew,pcomgtw,pcomgew,pcomeqw): Ditto.
- (pcomneqw,pcomnew): Ditto.
- (pcomd,pcomltd,pcomled,pcomgtd,pcomged,pcomeqd): Ditto.
- (pcomneqd,pcomned): Ditto.
- (pcomq,pcomltq,pcomleq,pcomgtq,pcomgeq): Ditto.
- (pcomeqq,pcomneqq,pcomneq): Ditto.
- (pcomtrueb, pcomtruew, pcomtrued, pcomtrueq): Ditto.
- (pcomtrueub, pcomtrueuw, pcomtrueud, pcomtrueuq): Ditto.
- (pcomfalseb, pcomfalsew, pcomfalsed, pcomfalseq): Ditto.
- (pcomfalseub, pcomfalseuw, pcomfalseud, pcomfalseuq): Ditto.
- (frczps,frczpd,frczss,frczsd): Ditto.
- (cvtph2ps,cvtps2ph): Ditto.
+2008-05-02 H.J. Lu <hongjiu.lu@intel.com>
- * i386-tbl.h: Regenerate from i386-opc.tbl.
- * i386-init.h: Likewise.
-
- * i386-dis.c (libiberty.h): Include to get ARRAY_SIZE.
- (dis386_move_test): New disassembly support for move from test
- register instruction that overlaps with SSE5 instructions.
- (print_insn): Add support for special casing the i386/i486 move
- from test register instruction that overlaps with the SSE5
- 0x0f24 4 operand instructions.
- (OP_DREX_ICMP): New macros for SSE5 DREX handling.
- (OP_DREX_FCMP): Ditto.
- (OP_E_extended): Rename from OP_E, add additional argument to skip
- the DREX byte.
- (OP_E): Call OP_E_extended.
- (DREX_REG_MEMORY): New macros for drex handling.
- (DREX_REG_UNKNOWN): Ditto.
- (DREX4_OC1): Ditto.
- (DREX4_NO_OC0): Ditto.
- (DREX4_MASK): Ditto.
- (three_byte_table): Add SSE5 instructions.
- (print_drex_arg): New function to print a DREX register or memory
- reference.
- (OP_DREX4): New function for handling DREX 4 argument ops.
- (OP_DREX3): New function for handling DREX 3 argument ops.
- (twobyte_has_modrm): 0f{25,7a,7b} all use the modrm byte.
- (THREE_BYTE_SSE5_0F{24,25,7A,7B}): New macros for initializing 3
- byte opcode support for SSE5 instructions.
- (dis386_twobyte): Add SSE5 24/25/7a/7b support.
- (three_byte_table): Add rows for describing SSE5 instructions.
-
-2007-09-13 H.J. Lu <hongjiu.lu@intel.com>
-
- * i386-dis.c (get_valid_dis386): Take a pointer to
- disassemble_info. Handle IS_3BYTE_OPCODE.
- (print_insn): Updated. Don't handle IS_3BYTE_OPCODE here.
-
-2007-09-12 H.J. Lu <hongjiu.lu@intel.com>
-
- * i386-opc.h (CpuUnused): Defined with CpuMax.
- (OTUnused): Defined with OTMax.
-
-2007-09-12 Jan Beulich <jbeulich@novell.com>
-
- * i386-opc.tbl: Add two-operand forms of blendvps, blendvpd, and
- pblendvb.
- * i386-tbl.h: Regenerate.
-
-2007-09-09 H.J. Lu <hongjiu.lu@intel.com>
-
- * i386-gen.c (main): Remove the local variable, unused.
-
-2007-09-08 H.J. Lu <hongjiu.lu@intel.com>
+ * i386-dis.c (MOVBE_Fixup): New.
+ (Mo): Likewise.
+ (PREFIX_0F3880): Likewise.
+ (PREFIX_0F3881): Likewise.
+ (PREFIX_0F38F0): Updated.
+ (prefix_table): Add PREFIX_0F3880 and PREFIX_0F3881. Update
+ PREFIX_0F38F0 and PREFIX_0F38F1 for movbe.
+ (three_byte_table): Use PREFIX_0F3880 and PREFIX_0F3881.
- * Makefile.am: Run "make dep-am".
- * Makefile.in: Regenerate.
+ * i386-gen.c (cpu_flag_init): Add CPU_MOVBE_FLAGS and
+ CPU_EPT_FLAGS.
+ (cpu_flags): Add CpuMovbe and CpuEPT.
-2007-09-08 H.J. Lu <hongjiu.lu@intel.com>
+ * i386-opc.h (CpuMovbe): New.
+ (CpuEPT): Likewise.
+ (CpuLM): Updated.
+ (i386_cpu_flags): Add cpumovbe and cpuept.
- * configure.in (AC_CHECK_HEADERS): Add limits.h.
- * configure: Regenerated.
- * config.in: Likewise.
-
- * i386-gen.c: Include "sysdep.h" instead of <stdlib.h> and
- <string.h>. Use xstrerror instead of strerror.
- (initializer): New.
- (cpu_flag_init): Likewise.
- (bitfield): Likewise.
- (BITFIELD): New.
- (cpu_flags): Likewise.
- (opcode_modifiers): Likewise.
- (operand_types): Likewise.
- (compare): Likewise.
- (set_cpu_flags): Likewise.
- (output_cpu_flags): Likewise.
- (process_i386_cpu_flags): Likewise.
- (output_opcode_modifier): Likewise.
- (process_i386_opcode_modifier): Likewise.
- (output_operand_type): Likewise.
- (process_i386_operand_type): Likewise.
- (set_bitfield): Likewise.
- (operand_type_init): Likewise.
- (process_i386_initializers): Likewise.
- (process_i386_opcodes): Call process_i386_opcode_modifier to
- process opcode_modifier. Call process_i386_operand_type to
- process operand_types.
- (process_i386_registers): Call process_i386_operand_type to
- process reg_type.
- (main): Check unused bits in i386_cpu_flags and i386_operand_type.
- Sort cpu_flags, opcode_modifiers and operand_types. Call
- process_i386_initializers.
-
- * i386-init.h: New.
- * i386-tbl.h: Regenerated.
-
- * i386-opc.h: Include <limits.h>.
- (CHAR_BIT): Define as 8 if not defined.
- (Cpu186): Changed to position of bitfiled.
- (Cpu286): Likewise.
- (Cpu386): Likewise.
- (Cpu486): Likewise.
- (Cpu586): Likewise.
- (Cpu686): Likewise.
- (CpuP4): Likewise.
- (CpuK6): Likewise.
- (CpuK8): Likewise.
- (CpuMMX): Likewise.
- (CpuMMX2): Likewise.
- (CpuSSE): Likewise.
- (CpuSSE2): Likewise.
- (Cpu3dnow): Likewise.
- (Cpu3dnowA): Likewise.
- (CpuSSE3): Likewise.
- (CpuPadLock): Likewise.
- (CpuSVME): Likewise.
- (CpuVMX): Likewise.
- (CpuSSSE3): Likewise.
- (CpuSSE4a): Likewise.
- (CpuABM): Likewise.
- (CpuSSE4_1): Likewise.
- (CpuSSE4_2): Likewise.
- (Cpu64): Likewise.
- (CpuNo64): Likewise.
- (D): Likewise.
- (W): Likewise.
- (Modrm): Likewise.
- (ShortForm): Likewise.
- (Jump): Likewise.
- (JumpDword): Likewise.
- (JumpByte): Likewise.
- (JumpInterSegment): Likewise.
- (FloatMF): Likewise.
- (FloatR): Likewise.
- (FloatD): Likewise.
- (Size16): Likewise.
- (Size32): Likewise.
- (Size64): Likewise.
- (IgnoreSize): Likewise.
- (DefaultSize): Likewise.
- (No_bSuf): Likewise.
- (No_wSuf): Likewise.
- (No_lSuf): Likewise.
- (No_sSuf): Likewise.
- (No_qSuf): Likewise.
- (No_xSuf): Likewise.
- (FWait): Likewise.
- (IsString): Likewise.
- (RegKludge): Likewise.
- (IsPrefix): Likewise.
- (ImmExt): Likewise.
- (NoRex64): Likewise.
- (Rex64): Likewise.
- (Ugh): Likewise.
- (Reg8): Likewise.
- (Reg16): Likewise.
- (Reg32): Likewise.
- (Reg64): Likewise.
- (FloatReg): Likewise.
- (RegMMX): Likewise.
- (RegXMM): Likewise.
- (Imm8): Likewise.
- (Imm8S): Likewise.
- (Imm16): Likewise.
- (Imm32): Likewise.
- (Imm32S): Likewise.
- (Imm64): Likewise.
- (Imm1): Likewise.
- (BaseIndex): Likewise.
- (Disp8): Likewise.
- (Disp16): Likewise.
- (Disp32): Likewise.
- (Disp32S): Likewise.
- (Disp64): Likewise.
- (InOutPortReg): Likewise.
- (ShiftCount): Likewise.
- (Control): Likewise.
- (Debug): Likewise.
- (Test): Likewise.
- (SReg2): Likewise.
- (SReg3): Likewise.
- (Acc): Likewise.
- (FloatAcc): Likewise.
- (JumpAbsolute): Likewise.
- (EsSeg): Likewise.
- (RegMem): Likewise.
- (OTMax): Likewise.
- (Reg): Commented out.
- (WordReg): Likewise.
- (ImplicitRegister): Likewise.
- (Imm): Likewise.
- (EncImm): Likewise.
- (Disp): Likewise.
- (AnyMem): Likewise.
- (LLongMem): Likewise.
- (LongMem): Likewise.
- (ShortMem): Likewise.
- (WordMem): Likewise.
- (ByteMem): Likewise.
- (CpuMax): New
- (CpuLM): Likewise.
- (CpuNumOfUints): Likewise.
- (CpuNumOfBits): Likewise.
- (CpuUnused): Likewise.
- (OTNumOfUints): Likewise.
- (OTNumOfBits): Likewise.
- (OTUnused): Likewise.
- (i386_cpu_flags): New type.
- (i386_operand_type): Likewise.
- (i386_opcode_modifier): Likewise.
- (CpuSledgehammer): Removed.
- (CpuSSE4): Likewise.
- (CpuUnknownFlags): Likewise.
- (Reg): Likewise.
- (WordReg): Likewise.
- (ImplicitRegister): Likewise.
- (Imm): Likewise.
- (EncImm): Likewise.
- (Disp): Likewise.
- (AnyMem): Likewise.
- (LLongMem): Likewise.
- (LongMem): Likewise.
- (ShortMem): Likewise.
- (WordMem): Likewise.
- (ByteMem): Likewise.
- (template): Use i386_cpu_flags for cpu_flags, use
- i386_opcode_modifier for opcode_modifier, use
- i386_operand_type for operand_types.
- (reg_entry): Use i386_operand_type for reg_type.
-
- * Makefile.am (HFILES): Add i386-init.h.
- ($(srcdir)/i386-init.h): New rule.
- ($(srcdir)/i386-tbl.h): Depend on $(srcdir)/i386-init.h
- instead.
- * Makefile.in: Regenerated.
-
-2007-09-06 H.J. Lu <hongjiu.lu@intel.com>
-
- * i386-gen.c (next_field): Updated to take a separator.
- (process_i386_opcodes): Updated.
- (process_i386_registers): Likewise.
-
-2007-09-06 H.J. Lu <hongjiu.lu@intel.com>
+ * i386-opc.tbl: Add entries for movbe and EPT instructions.
+ * i386-init.h: Regenerated.
+ * i386-tbl.h: Likewise.
- * i386-gen.c (table): Moved ...
- (main): Here. Call process_copyright to output copyright.
- (process_copyright): New.
- (process_i386_opcodes): Take FILE *table.
- (process_i386_registers): Likewise.
+2008-04-29 Adam Nemet <anemet@caviumnetworks.com>
-2007-09-06 H.J. Lu <hongjiu.lu@intel.com>
+ * mips-opc.c (mips_builtin_opcodes): Set field `match' to 0 for
+ the two drem and the two dremu macros.
- * i386-gen.c (table): New.
- (process_i386_opcodes): Report errno when faied to open
- i386-opc.tbl. Output opcodes to table. Close i386-opc.tbl
- before return.
- (process_i386_registers): Report errno when faied to open
- i386-reg.tbl. Output opcodes to table. Close i386-reg.tbl
- before return.
- (main): Open i386-tbl.h for output.
+2008-04-28 Adam Nemet <anemet@caviumnetworks.com>
- * Makefile.am ($(srcdir)/i386-tbl.h): Remove " > $@".
- * Makefile.in: Regenerated.
+ * mips-opc.c (mips_builtin_opcodes): Mark prefx and c1
+ instructions FP_S. Mark l.s, li.s, lwc1, swc1, s.s, trunc.w.s and
+ cop1 macros INSN2_M_FP_S. Mark l.d, li.d, ldc1 and sdc1 macros
+ INSN2_M_FP_D. Mark trunc.w.d macro INSN2_M_FP_S and INSN2_M_FP_D.
-2007-09-06 H.J. Lu <hongjiu.lu@intel.com>
+2008-04-25 David S. Miller <davem@davemloft.net>
- * i386-opc.tbl: Correct SVME instructions to allow 32bit register
- operand in 64bit mode.
- * i386-tbl.h: Regenerated.
+ * sparc-dis.c: Emit %stick instead of %sys_tick, and %stick_cmpr
+ instead of %sys_tick_cmpr, as suggested in architecture manuals.
-2007-08-31 H.J. Lu <hongjiu.lu@intel.com>
+2008-04-23 Paolo Bonzini <bonzini@gnu.org>
- * i386-dis.c (OPC_EXT_40...OPC_EXT_45): New.
- (dis386_twobyte): Use OPC_EXT_40...OPC_EXT_45.
- (opc_ext_table): Add OPC_EXT_40...OPC_EXT_45.
+ * aclocal.m4: Regenerate.
+ * configure: Regenerate.
-2007-08-31 H.J. Lu <hongjiu.lu@intel.com>
+2008-04-23 David S. Miller <davem@davemloft.net>
- * i386-dis.c (SVME_Fixup): Removed.
- (OPC_EXT_39): New.
- (OPC_EXT_RM_6): Likewise.
- (grps): Use OPC_EXT_39.
- (opc_ext_table): Add OPC_EXT_39.
- (opc_ext_rm_table): Add OPC_EXT_RM_6.
+ * sparc-opc.c (asi_table): Add UltraSPARC and Niagara
+ extended values.
+ (prefetch_table): Add missing values.
- * i386-opc.tbl: Correct SVME instructions to take register
- operand only.
- * i386-tbl.h: Regenerated.
+2008-04-22 H.J. Lu <hongjiu.lu@intel.com>
-2007-08-31 H.J. Lu <hongjiu.lu@intel.com>
+ * i386-gen.c (opcode_modifiers): Add NoAVX.
- * Makefile.am (INCLUDES): Remove -D_GNU_SOURCE.
- * Makefile.in: Regenerated.
+ * i386-opc.h (NoAVX): New.
+ (OldGcc): Updated.
+ (i386_opcode_modifier): Add noavx.
- * configure.in (AC_GNU_SOURCE): Added.
- (AC_PROG_CC): Moved before AC_GNU_SOURCE.
- (AC_CHECK_DECLS): Add stpcpy.
- * configure: Regenerated.
- * config.in: Likewise.
-
- * i386-dis.c: Include "sysdep.h" before "dis-asm.h".
-
- * sysdep.h (stpcpy): New.
-
-2007-08-30 H.J. Lu <hongjiu.lu@intel.com>
-
- * i386-dis.c (INVLPG_Fixup): Removed.
- (OPC_EXT_38): New.
- (OPC_EXT_RM_5): Likewise.
- (grps): Use OPC_EXT_38.
- (opc_ext_table): Add OPC_EXT_38.
- (opc_ext_rm_table): Add OPC_EXT_RM_5.
-
-2007-08-29 H.J. Lu <hongjiu.lu@intel.com>
-
- * i386-dis.c (SIMD_Fixup): Removed.
- (OPC_EXT_34...OPC_EXT_37): New.
- (dis386_twobyte): Use OPC_EXT_34 and OPC_EXT_35.
- (prefix_user_table): Use OPC_EXT_36 and OPC_EXT_37.
- (opc_ext_table): Add OPC_EXT_34...OPC_EXT_37.
-
-2007-08-29 H.J. Lu <hongjiu.lu@intel.com>
-
- * i386-dis.c (OPC_EXT_25...OPC_EXT_33): New.
- (dis386): Use OPC_EXT_0...OPC_EXT_2.
- (dis386_twobyte): Use OPC_EXT_3...OPC_EXT_5.
- (grps): Updated to use OPC_EXT_6...OPC_EXT_31.
- (prefix_user_table): Use OPC_EXT_32.
- (x86_64_table): Use OPC_EXT_33.
- (opc_ext_table): Reorder and add OPC_EXT_25...OPC_EXT_33.
-
-2007-08-29 H.J. Lu <hongjiu.lu@intel.com>
-
- * i386-dis.c (prefix_user_table): Fix comment.
-
-2007-08-29 H.J. Lu <hongjiu.lu@intel.com>
-
- * i386-dis.c (OP_Skip_MODRM): New.
- (OP_Monitor): Likewise.
- (OP_Mwait): Likewise.
- (Mb): Likewise.
- (Skip_MODRM): Likewise.
- (USE_OPC_EXT_TABLE): Likewise.
- (USE_OPC_EXT_RM_TABLE): Likewise.
- (PREGRP98...PREGRP100): Likewise.
- (OPC_EXT_0...OPC_EXT_24): Likewise.
- (OPC_EXT_RM_0...OPC_EXT_RM_4): Likewise.
- (lock_prefix): Likewise.
- (data_prefix): Likewise.
- (addr_prefix): Likewise.
- (repz_prefix): Likewise.
- (repnz_prefix): Likewise.
- (opc_ext_table): Likewise.
- (opc_ext_rm_table): Likewise.
- (get_valid_dis386): Likewise.
- (OP_VMX): Removed.
- (OP_0fae): Likewise.
- (PNI_Fixup): Likewise.
- (VMX_Fixup): Likewise.
- (VM): Likewise.
- (twobyte_uses_DATA_prefix): Likewise.
- (twobyte_uses_REPNZ_prefix): Likewise.
- (twobyte_uses_REPZ_prefix): Likewise.
- (threebyte_0x38_uses_DATA_prefix): Likewise.
- (threebyte_0x38_uses_REPNZ_prefix): Likewise.
- (threebyte_0x38_uses_REPZ_prefix): Likewise.
- (threebyte_0x3a_uses_DATA_prefix): Likewise.
- (threebyte_0x3a_uses_REPNZ_prefix): Likewise.
- (threebyte_0x3a_uses_REPZ_prefix): Likewise.
- (grps): Use OPC_EXT_0...OPC_EXT_24.
- (prefix_user_table): Add PREGRP98...PREGRP100.
- (print_insn): Remove uses_DATA_prefix, uses_LOCK_prefix,
- uses_REPNZ_prefix and uses_REPZ_prefix. Initialize
- repz_prefix, repnz_prefix, lock_prefix, addr_prefix and
- data_prefix based on prefixes. Call get_valid_dis386 to
- get a pointer to the valid dis386. Print out prefixes if
- they aren't NULL.
- (OP_C): Clear lock_prefix if PREFIX_LOCK is used.
- (REP_Fixup): Set repz_prefix to "rep " when seeing
- PREFIX_REPZ.
-
-2007-08-28 Daniel Jacobowitz <dan@codesourcery.com>
-
- * po/nl.po: Updated translation.
-
-2007-08-28 H.J. Lu <hongjiu.lu@intel.com>
-
- * i386-dis.c (Md): New.
- (grps): Use 0 on invlpg. Use M on fxsave and fxrstor. Use
- Md on ldmxcsr and stmxcsr. Use b_mode on clflush.
- (OP_0fae): Clear bytemode for sfence.
-
-2007-08-22 Ben Elliston <bje@au.ibm.com>
-
- * ppc-opc.c (PSW, PSWM, PSQ, PSQM, PSD, MTMSRD_L): New.
- (XOPS, XOPS_MASK, XW, XW_MASK): Likewise.
- (PPCPS): Likewise.
- (powerpc_opcodes): Add all pair singles instructions.
- * ppc-dis.c (powerpc_dialect): Handle "ppcps".
- (print_ppc_disassembler_options): Document -Mppcps.
-
-2007-08-21 Andreas Krebbel <krebbel1@de.ibm.com>
-
- * s390-mkopc.c (struct s390_cond_ext_format): New global struct.
- (s390_cond_ext_format): New global variable.
- (expandConditionalJump): New function.
- (main): Invoke expandConditionalJump for mnemonics containing '*'.
- * s390-opc.txt: Replace mnemonics with conditional
- mask extensions with instructions using the newly introduced '*' tag.
-
-2007-08-17 Alan Modra <amodra@bigpond.net.au>
-
- * po/Make-in: Add --msgid-bugs-address to xgettext invocation.
-
-2007-08-10 Nick Clifton <nickc@redhat.com>
-
- * po/fi.po: Updated Finnish translation.
- * po/ga.po: Updated Irish translation.
- * po/vi.po: Updated Vietnamese translation.
-
-2007-08-09 H.J. Lu <hongjiu.lu@intel.com>
-
- * i386-opc.tbl: Add NoRex64 to pmovsxbw, pmovsxwd, pmovsxdq,
- pmovzxbw, pmovzxwd, pmovzxdq and roundsd.
+ * i386-opc.tbl: Add NoAVX to SSE, SSE2, SSE3 and SSSE3
+ instructions which don't have AVX equivalent.
* i386-tbl.h: Regenerated.
-2007-08-03 James E. Wilson <wilson@specifix.com>
-
- * ia64-gen.c: (main): Add missing newline to copyright message.
- * ia64-ic.tbl (fp-non-arith): Add xmpy.
- * ia64-asmtab.c: Regenerate.
-
-2007-08-01 Michael Snyder <msnyder@access-company.com>
-
- * i386-dis.c (print_insn): Guard against NULL.
+2008-04-18 H.J. Lu <hongjiu.lu@intel.com>
+
+ * i386-dis.c (OP_VEX_FMA): New.
+ (OP_EX_VexImmW): Likewise.
+ (VexFMA): Likewise.
+ (Vex128FMA): Likewise.
+ (EXVexImmW): Likewise.
+ (get_vex_imm8): Likewise.
+ (OP_EX_VexReg): Likewise.
+ (vex_i4_done): Renamed to ...
+ (vex_w_done): This.
+ (prefix_table): Replace EXVexW with EXVexImmW on vpermil2ps
+ and vpermil2pd. Replace Vex/Vex128 with VexFMA/Vex128FMA on
+ FMA instructions.
+ (print_insn): Updated.
+ (OP_EX_VexW): Rewrite to swap register in VEX with EX.
+ (OP_REG_VexI4): Check invalid high registers.
+
+2008-04-16 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
+ Michael Meissner <michael.meissner@amd.com>
+
+ * i386-opc.tbl: Fix protX to allow memory in the middle operand.
+ * i386-tbl.h: Regenerate from i386-opc.tbl.
-2007-07-29 H.J. Lu <hongjiu.lu@intel.com>
+2008-04-14 Edmar Wienskoski <edmar@freescale.com>
- PR binutils/4834
- * i386-dis.c (EXw): New.
- (prefix_user_table): Updated to use EXw, EXd and EXq for SSE4
- instructions when appropriated.
+ * ppc-dis.c (powerpc_dialect): Handle "e500mc". Extend "e500" to
+ accept Power E500MC instructions.
+ (print_ppc_disassembler_options): Document -Me500mc.
+ * ppc-opc.c (DUIS, DUI, T): New.
+ (XRT, XRTRA): Likewise.
+ (E500MC): Likewise.
+ (powerpc_opcodes): Add new Power E500MC instructions.
-2007-07-28 H.J. Lu <hongjiu.lu@intel.com>
+2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com>
- PR binutils/4834
- * i386-dis.c (Eq): New.
- (EMC): Renamed to ...
- (EMCq): This. Use q_mode instead of v_mode.
- (prefix_user_table): Updated to use EXd, EXq, EMCq, Ed and Eq
- when appropriated.
+ * s390-dis.c (init_disasm): Evaluate disassembler_options.
+ (print_s390_disassembler_options): New function.
+ * disassemble.c (disassembler_usage): Invoke
+ print_s390_disassembler_options.
-2007-07-28 H.J. Lu <hongjiu.lu@intel.com>
+2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com>
- * i386-dis.c (dis386_twobyte): Change "movd" to "movK".
- (prefix_user_table): Likewise. Use EXq instead of EXx on
- "movq".
+ * s390-mkopc.c (insertExpandedMnemonic): Expand string sizes
+ of local variables used for mnemonic parsing: prefix, suffix and
+ number.
-2007-07-27 Nathan Sidwell <nathan@codesourcery.com>
+2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com>
- * ppc-opc (PPC7450): New.
- (powerpc_opcodes): Use it in dcba.
+ * s390-mkopc.c (s390_cond_ext_format): Add back the mnemonic
+ extensions for conditional jumps (o, p, m, nz, z, nm, np, no).
+ (s390_crb_extensions): New extensions table.
+ (insertExpandedMnemonic): Handle '$' tag.
+ * s390-opc.txt: Remove conditional jump variants which can now
+ be expanded automatically.
+ Replace '*' tag with '$' in the compare and branch instructions.
-2007-07-24 H.J. Lu <hongjiu.lu@intel.com>
+2008-04-07 H.J. Lu <hongjiu.lu@intel.com>
- * i386-gen.c (main): Print a newline after copyright notice.
+ * i386-dis.c (PREFIX_VEX_38XX): Add a tab.
+ (PREFIX_VEX_3AXX): Likewis.
-2007-07-19 Nick Clifton <nickc@redhat.com>
+2008-04-07 H.J. Lu <hongjiu.lu@intel.com>
- PR binutils/4801
- * maxq-dis.c (get_reg_name): Fix the scan of the
- mem_access_syntax_table.
+ * i386-opc.tbl: Remove 4 extra blank lines.
-2007-07-16 H.J. Lu <hongjiu.lu@intel.com>
+2008-04-04 H.J. Lu <hongjiu.lu@intel.com>
- * i386-dis.c (EMq): Removed.
- (EMx): New.
- (prefix_user_table): Replace EMq with EMx.
+ * i386-gen.c (cpu_flag_init): Replace CPU_CLMUL_FLAGS/CpuCLMUL
+ with CPU_PCLMUL_FLAGS/CpuPCLMUL.
+ (cpu_flags): Replace CpuCLMUL with CpuPCLMUL.
+ * i386-opc.tbl: Likewise.
-2007-07-16 Nick Clifton <nickc@redhat.com>
+ * i386-opc.h (CpuCLMUL): Renamed to ...
+ (CpuPCLMUL): This.
+ (CpuFMA): Updated.
+ (i386_cpu_flags): Replace cpuclmul with cpupclmul.
- * po/nl.po: Updated translation.
+ * i386-init.h: Regenerated.
-2007-07-12 Nick Clifton <nickc@redhat.com>
+2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
+
+ * i386-dis.c (OP_E_register): New.
+ (OP_E_memory): Likewise.
+ (OP_VEX): Likewise.
+ (OP_EX_Vex): Likewise.
+ (OP_EX_VexW): Likewise.
+ (OP_XMM_Vex): Likewise.
+ (OP_XMM_VexW): Likewise.
+ (OP_REG_VexI4): Likewise.
+ (PCLMUL_Fixup): Likewise.
+ (VEXI4_Fixup): Likewise.
+ (VZERO_Fixup): Likewise.
+ (VCMP_Fixup): Likewise.
+ (VPERMIL2_Fixup): Likewise.
+ (rex_original): Likewise.
+ (rex_ignored): Likewise.
+ (Mxmm): Likewise.
+ (XMM): Likewise.
+ (EXxmm): Likewise.
+ (EXxmmq): Likewise.
+ (EXymmq): Likewise.
+ (Vex): Likewise.
+ (Vex128): Likewise.
+ (Vex256): Likewise.
+ (VexI4): Likewise.
+ (EXdVex): Likewise.
+ (EXqVex): Likewise.
+ (EXVexW): Likewise.
+ (EXdVexW): Likewise.
+ (EXqVexW): Likewise.
+ (XMVex): Likewise.
+ (XMVexW): Likewise.
+ (XMVexI4): Likewise.
+ (PCLMUL): Likewise.
+ (VZERO): Likewise.
+ (VCMP): Likewise.
+ (VPERMIL2): Likewise.
+ (xmm_mode): Likewise.
+ (xmmq_mode): Likewise.
+ (ymmq_mode): Likewise.
+ (vex_mode): Likewise.
+ (vex128_mode): Likewise.
+ (vex256_mode): Likewise.
+ (USE_VEX_C4_TABLE): Likewise.
+ (USE_VEX_C5_TABLE): Likewise.
+ (USE_VEX_LEN_TABLE): Likewise.
+ (VEX_C4_TABLE): Likewise.
+ (VEX_C5_TABLE): Likewise.
+ (VEX_LEN_TABLE): Likewise.
+ (REG_VEX_XX): Likewise.
+ (MOD_VEX_XXX): Likewise.
+ (PREFIX_0F38DB..PREFIX_0F38DF): Likewise.
+ (PREFIX_0F3A44): Likewise.
+ (PREFIX_0F3ADF): Likewise.
+ (PREFIX_VEX_XXX): Likewise.
+ (VEX_OF): Likewise.
+ (VEX_OF38): Likewise.
+ (VEX_OF3A): Likewise.
+ (VEX_LEN_XXX): Likewise.
+ (vex): Likewise.
+ (need_vex): Likewise.
+ (need_vex_reg): Likewise.
+ (vex_i4_done): Likewise.
+ (vex_table): Likewise.
+ (vex_len_table): Likewise.
+ (OP_REG_VexI4): Likewise.
+ (vex_cmp_op): Likewise.
+ (pclmul_op): Likewise.
+ (vpermil2_op): Likewise.
+ (m_mode): Updated.
+ (es_reg): Likewise.
+ (PREFIX_0F38F0): Likewise.
+ (PREFIX_0F3A60): Likewise.
+ (reg_table): Add REG_VEX_71...REG_VEX_73 and REG_VEX_AE.
+ (prefix_table): Add PREFIX_0F38DB..PREFIX_0F38DF, PREFIX_0F3ADF
+ and PREFIX_VEX_XXX entries.
+ (x86_64_table): Use VEX_C4_TABLE and VEX_C5_TABLE.
+ (three_byte_table): Use PREFIX_0F38DB..PREFIX_0F38DF and
+ PREFIX_0F3ADF.
+ (mod_table): Use VEX_C4_TABLE, VEX_C5_TABLE and VEX_LEN_TABLE.
+ Add MOD_VEX_XXX entries.
+ (ckprefix): Initialize rex_original and rex_ignored. Store the
+ REX byte in rex_original.
+ (get_valid_dis386): Handle the implicit prefix in VEX prefix
+ bytes and USE_VEX_LEN_TABLE/USE_VEX_C4_TABLE/USE_VEX_C5_TABLE.
+ (print_insn): Set need_vex/need_vex_reg/vex_i4_done to 0 before
+ calling get_valid_dis386. Use rex_original and rex_ignored when
+ printing out REX.
+ (putop): Handle "XY".
+ (intel_operand_size): Handle VEX, xmm_mode, xmmq_mode and
+ ymmq_mode.
+ (OP_E_extended): Updated to use OP_E_register and
+ OP_E_memory.
+ (OP_XMM): Handle VEX.
+ (OP_EX): Likewise.
+ (XMM_Fixup): Likewise.
+ (CMP_Fixup): Use ARRAY_SIZE.
+
+ * i386-gen.c (cpu_flag_init): Add CpuAES, CPU_CLMUL_FLAGS,
+ CPU_FMA_FLAGS and CPU_AVX_FLAGS.
+ (operand_type_init): Add OPERAND_TYPE_REGYMM and
+ OPERAND_TYPE_VEX_IMM4.
+ (cpu_flags): Add CpuAVX, CpuAES, CpuCLMUL and CpuFMA.
+ (opcode_modifiers): Add Implicit1stXmm0, Vex, Vex256, VexNDD,
+ VexNDS, VexW0, VexW1, Vex0F, Vex0F38, Vex0F3A, Vex3Sources,
+ VexImmExt and SSE2AVX.
+ (operand_types): Add RegYMM, Ymmword and Vex_Imm4.
+
+ * i386-opc.h (CpuAVX): New.
+ (CpuAES): Likewise.
+ (CpuCLMUL): Likewise.
+ (CpuFMA): Likewise.
+ (Vex): Likewise.
+ (Vex256): Likewise.
+ (VexNDS): Likewise.
+ (VexNDD): Likewise.
+ (VexW0): Likewise.
+ (VexW1): Likewise.
+ (Vex0F): Likewise.
+ (Vex0F38): Likewise.
+ (Vex0F3A): Likewise.
+ (Vex3Sources): Likewise.
+ (VexImmExt): Likewise.
+ (SSE2AVX): Likewise.
+ (RegYMM): Likewise.
+ (Ymmword): Likewise.
+ (Vex_Imm4): Likewise.
+ (Implicit1stXmm0): Likewise.
+ (CpuXsave): Updated.
+ (CpuLM): Likewise.
+ (ByteOkIntel): Likewise.
+ (OldGcc): Likewise.
+ (Control): Likewise.
+ (Unspecified): Likewise.
+ (OTMax): Likewise.
+ (i386_cpu_flags): Add cpuavx, cpuaes, cpuclmul and cpufma.
+ (i386_opcode_modifier): Add implicit1stxmm0, vex, vex256,
+ vexnds, vexndd, vexw0, vexw1, vex0f, vex0f38, vex0f3a,
+ vex3sources, veximmext and sse2avx.
+ (i386_operand_type): Add regymm, ymmword and vex_imm4.
- * po/vi.po: Updated translation.
- * po/nl.po: Updated translation.
+ * i386-opc.tbl: Add AES, CLMUL, AVX and FMA new instructions.
-2007-07-06 Mark Kettenis <kettenis@gnu.org>
- H.J. Lu <hongjiu.lu@intel.com>
+ * i386-reg.tbl: Add AVX registers, ymm0..ymm15.
- * Makefile.am (i386-tbl.h): Add $(srcdir)/ to target.
- (ia64-asmtab.c): Likewise.
- * Makefile.in: Regenerate.
+ * i386-init.h: Regenerated.
+ * i386-tbl.h: Likewise.
-2007-07-05 H.J. Lu <hongjiu.lu@intel.com>
-
- * aclocal.m4: Regenerated.
-
-2007-07-04 Nick Clifton <nickc@redhat.com>
-
- * alpha-dis.c: Update copyright notice to refer to GPLv3.
- * alpha-opc.c, arc-dis.c, arc-dis.h, arc-ext.c, arc-ext.h,
- arc-opc.c, arm-dis.c, avr-dis.c, bfin-dis.c, cgen-asm.c,
- cgen-asm.in, cgen-bitset.c, cgen-dis.c, cgen-dis.in, cgen-ibld.in,
- cgen-opc.c, cgen-ops.h, cgen.sh, cgen-types.h, cr16-dis.c,
- cr16-opc.c, cris-dis.c, cris-opc.c, crx-dis.c, crx-opc.c,
- d10v-dis.c, d10v-opc.c, d30v-dis.c, d30v-opc.c, disassemble.c,
- dis-buf.c, dis-init.c, dlx-dis.c, h8300-dis.c, h8500-dis.c,
- h8500-opc.h, hppa-dis.c, i370-dis.c, i370-opc.c, i386-dis.c,
- i386-gen.c, i386-opc.c, i386-opc.h, i860-dis.c, i960-dis.c,
- ia64-asmtab.h, ia64-dis.c, ia64-gen.c, ia64-opc-a.c, ia64-opc-b.c,
- ia64-opc.c, ia64-opc-d.c, ia64-opc-f.c, ia64-opc.h, ia64-opc-i.c,
- ia64-opc-m.c, ia64-opc-x.c, m10200-dis.c, m10200-opc.c,
- m10300-dis.c, m10300-opc.c, m68hc11-dis.c, m68hc11-opc.c,
- m68k-dis.c, m68k-opc.c, m88k-dis.c, maxq-dis.c, mcore-dis.c,
- mcore-opc.h, mips16-opc.c, mips-dis.c, mips-opc.c, mmix-dis.c,
- mmix-opc.c, msp430-dis.c, ns32k-dis.c, opintl.h, or32-dis.c,
- or32-opc.c, pdp11-dis.c, pdp11-opc.c, pj-dis.c, pj-opc.c,
- ppc-dis.c, ppc-opc.c, s390-dis.c, s390-mkopc.c, s390-opc.c,
- score-dis.c, score-opc.h, sh64-dis.c, sh64-opc.c, sh64-opc.h,
- sh-dis.c, sh-opc.h, sparc-dis.c, sparc-opc.c, spu-dis.c,
- spu-opc.c, sysdep.h, tic30-dis.c, tic4x-dis.c, tic54x-dis.c,
- tic54x-opc.c, tic80-dis.c, tic80-opc.c, v850-dis.c, v850-opc.c,
- vax-dis.c, w65-dis.c, w65-opc.h, xtensa-dis.c, z80-dis.c,
- z8k-dis.c, z8kgen.c: Likewise.
- * i386-opc.tbl, i386-reg.tbl: Add copyright notice.
- * aclocal.m4, configure, fr30-asm.c, fr30-desc.c, fr30-desc.h,
- fr30-dis.c, fr30-ibld.c, fr30-opc.c, fr30-opc.h, frv-asm.c,
- frv-desc.c, frv-desc.h, frv-dis.c, frv-ibld.c, frv-opc.c,
- frv-opc.h, i386-tbl.h, ia64-asmtab.c, ip2k-asm.c, ip2k-desc.c,
- ip2k-desc.h, ip2k-dis.c, ip2k-ibld.c, ip2k-opc.c, ip2k-opc.h,
- iq2000-asm.c, iq2000-desc.c, iq2000-desc.h, iq2000-dis.c,
- iq2000-ibld.c, iq2000-opc.c, iq2000-opc.h, m32c-asm.c,
- m32c-desc.c, m32c-desc.h, m32c-dis.c, m32c-ibld.c, m32c-opc.c,
- m32c-opc.h, m32r-asm.c, m32r-desc.c, m32r-desc.h, m32r-dis.c,
- m32r-ibld.c, m32r-opc.c, m32r-opc.h, m32r-opinst.c, mep-asm.c,
- mep-desc.c, mep-desc.h, mep-dis.c, mep-ibld.c, mep-opc.c,
- mep-opc.h, mt-asm.c, mt-desc.c, mt-desc.h, mt-dis.c, mt-ibld.c,
- mt-opc.c, mt-opc.h, openrisc-asm.c, openrisc-desc.c,
- openrisc-desc.h, openrisc-dis.c, openrisc-ibld.c, openrisc-opc.c,
- openrisc-opc.h, xc16x-asm.c, xc16x-desc.c, xc16x-desc.h,
- xc16x-dis.c, xc16x-ibld.c, xc16x-opc.c, xc16x-opc.h,
- xstormy16-asm.c, xstormy16-desc.c, xstormy16-desc.h,
- xstormy16-dis.c, xstormy16-ibld.c, xstormy16-opc.c,
- xstormy16-opc.h, z8k-opc.h: Regenerated
-
-2007-07-04 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
-
- * cr16-dis.c (getcinvstring): Add const qualifier to char *
- parameter.
- (print_insn_cr16): Remove cast to char *.
-
-2007-07-03 Nathan Sidwell <nathan@codesourcery.com>
-
- * m68k-dis.c (fetch_arg): Add E. Replace length switch with
- direct masking.
- (print_ins_arg): Add j & K operand types.
- (match_insn_m68k): Check and skip initial '.' arg character.
- (m68k_scan_mask): Likewise.
- * m68k-opc.c (m68k_opcodes): Add coprocessor instructions.
-
-2007-07-02 Alan Modra <amodra@bigpond.net.au>
+2008-03-26 Bernd Schmidt <bernd.schmidt@analog.com>
+
+ From Robin Getz <robin.getz@analog.com>
+ * bfin-dis.c (bu32): Typedef.
+ (enum const_forms_t): Add c_uimm32 and c_huimm32.
+ (constant_formats[]): Add uimm32 and huimm16.
+ (fmtconst_val): New.
+ (uimm32): Define.
+ (huimm32): Define.
+ (imm16_val): Define.
+ (luimm16_val): Define.
+ (struct saved_state): Define.
+ (GREG, DPREG, DREG, PREG, SPREG, FPREG, IREG, MREG, BREG, LREG,
+ A0XREG, A0WREG, A1XREG, A1WREG,CCREG, LC0REG, LT0REG, LB0REG,
+ LC1REG, LT1REG, LB1REG, RETSREG, PCREG): Define.
+ (get_allreg): New.
+ (decode_LDIMMhalf_0): Print out the whole register value.
+
+ From Jie Zhang <jie.zhang@analog.com>
+ * bfin-dis.c (decode_dsp32mac_0): Decode (IU) option for
+ multiply and multiply-accumulate to data register instruction.
+
+ * bfin-dis.c: (c_uimm4s4d, c_imm5d, c_imm7d, c_imm16d, c_uimm16s4d,
+ c_imm32, c_huimm32e): Define.
+ (constant_formats): Add flags for printing decimal, leading spaces, and
+ exact symbols.
+ (comment, parallel): Add global flags in all disassembly.
+ (fmtconst): Take advantage of new flags, and print default in hex.
+ (fmtconst_val): Likewise.
+ (decode_macfunc): Be consistant with spaces, tabs, comments,
+ capitalization in disassembly, fix minor coding style issues.
+ (reg_names, amod0, amod1, amod0amod2, aligndir, get_allreg): Likewise.
+ (decode_ProgCtrl_0, decode_PushPopMultiple_0, decode_CCflag_0,
+ decode_CC2dreg_0, decode_CC2stat_0, decode_BRCC_0, decode_UJUMP_0,
+ decode_REGMV_0, decode_ALU2op_0, decode_PTR2op_0, decode_LOGI2op_0,
+ decode_COMP3op_0, decode_COMPI2opD_0, decode_COMPI2opP_0,
+ decode_LDSTpmod_0, decode_dagMODim_0, decode_dagMODik_0,
+ decode_dspLDST_0, decode_LDST_0, decode_LDSTiiFP_0, decode_LDSTii_0,
+ decode_LoopSetup_0, decode_LDIMMhalf_0, decode_CALLa_0,
+ decode_LDSTidxI_0, decode_linkage_0, decode_dsp32alu_0,
+ decode_dsp32shift_0, decode_dsp32shiftimm_0, decode_pseudodbg_assert_0,
+ _print_insn_bfin, print_insn_bfin): Likewise.
+
+2008-03-17 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
- * Makefile.am: Run "make dep-am".
- * Makefile.in: Regenerate.
* aclocal.m4: Regenerate.
- * config.in: Regenerate.
- * po/POTFILES.in: Regenerate.
- * po/opcodes.pot: Regenerate.
-
-2007-06-30 H.J. Lu <hongjiu.lu@intel.com>
-
- * aclocal.m4: Regenerated.
+ * configure: Likewise.
* Makefile.in: Likewise.
-2007-06-29 H.J. Lu <hongjiu.lu@intel.com>
+2008-03-13 Alan Modra <amodra@bigpond.net.au>
- * i386-reg.tbl: Remove spaces before comments.
-
-2007-06-29 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
-
- * cr16-opc.c: New file.
- * cr16-dis.c: New file.
- * Makefile.am: Entries for cr16.
+ * Makefile.am: Run "make dep-am".
* Makefile.in: Regenerate.
- * cofigure.in: Add cr16 target information.
- * configure : Regenerate.
- * disassemble.c: Add cr16 target information.
-
-2007-06-28 H.J. Lu <hongjiu.lu@intel.com>
-
- * Makefile.am (HFILES): Add i386-opc.h and i386-tbl.h.
- (CFILES): Add i386-gen.c.
- (i386-gen): New rule.
- (i386-gen.o): Likewise.
- (i386-tbl.h): Likewise.
- Run "make dep-am".
- * Makefile.in: Regenerated.
-
- * i386-gen.c: New file.
- * i386-opc.tbl: Likewise.
- * i386-reg.tbl: Likewise.
- * i386-tbl.h: Likewise.
-
- * i386-opc.c: Include "i386-tbl.h".
- (i386_optab): Removed.
- (i386_regtab): Likewise.
- (i386_regtab_size): Likewise.
-
-2007-06-26 Paul Brook <paul@codesourcery.com>
-
- * arm-dis.c (coprocessor_opcodes): Add fmxr/fmrx mvfr0/mvfr1.
-
-2007-06-25 H.J. Lu <hongjiu.lu@intel.com>
+ * configure: Regenerate.
- * i386-opc.h (regKludge): Renamed to ...
- (RegKludge): This.
+2008-03-07 Alan Modra <amodra@bigpond.net.au>
- * i386-opc.c (i386_optab): Replace regKludge with RegKludge.
+ * ppc-opc.c (powerpc_opcodes): Order and format.
-2007-06-23 H.J. Lu <hongjiu.lu@intel.com>
+2008-03-01 H.J. Lu <hongjiu.lu@intel.com>
- PR binutils/4667
- * i386-dis.c (EX): Removed.
- (EMd): New.
- (EMq): Likewise.
- (EXd): Likewise.
- (EXq): Likewise.
- (EXx): Likewise.
- (PREGRP93...PREGRP97): Likewise.
- (dis386_twobyte): Updated.
- (prefix_user_table): Updated. Add PREGRP93...PREGRP97.
- (OP_EX): Remove Intel syntax handling.
+ * i386-opc.tbl: Allow 16-bit near indirect branches for x86-64.
+ * i386-tbl.h: Regenerated.
-2007-06-18 Nathan Sidwell <nathan@codesourcery.com>
+2008-02-23 H.J. Lu <hongjiu.lu@intel.com>
- * m68k-opc.c (m68k_opcodes): Add wdebugl variants.
+ * i386-opc.tbl: Disallow 16-bit near indirect branches for
+ x86-64.
+ * i386-tbl.h: Regenerated.
-2007-06-14 H.J. Lu <hongjiu.lu@intel.com>
+2008-02-21 Jan Beulich <jbeulich@novell.com>
- * Makefile.am (ACLOCAL_AMFLAGS): Add -I ../config -I ../bfd.
+ * i386-opc.tbl: Allow Dword for far indirect call. Allow Dword
+ and Fword for far indirect jmp. Allow Reg16 and Word for near
+ indirect jmp on x86-64. Disallow Fword for lcall.
+ * i386-tbl.h: Re-generate.
- * acinclude.m4: Removed.
+2008-02-18 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
- * Makefile.in: Regenerated.
- * doc/Makefile.in: Likewise.
- * aclocal.m4: Likewise.
- * configure: Likewise.
+ * cr16-opc.c (cr16_num_optab): Defined
-2007-06-05 Paul Brook <paul@codesourcery.com>
+2008-02-16 H.J. Lu <hongjiu.lu@intel.com>
- * arm-dis.c (thumb32_opcodes): Display writeback ldrd/strd addresses.
+ * i386-gen.c (operand_type_init): Add OPERAND_TYPE_INOUTPORTREG.
+ * i386-init.h: Regenerated.
-2007-05-24 Steve Ellcey <sje@cup.hp.com>
+2008-02-14 Nick Clifton <nickc@redhat.com>
- * Makefile.in: Regnerate.
+ PR binutils/5524
+ * configure.in (SHARED_LIBADD): Select the correct host specific
+ file extension for shared libraries.
* configure: Regenerate.
- * aclocal.m4: Regenerate.
-
-2007-05-18 Alan Modra <amodra@bigpond.net.au>
-
- * ppc-dis.c (print_insn_powerpc): Don't skip all operands
- after setting skip_optional.
-
-2007-05-16 Peter Bergner <bergner@vnet.ibm.com>
-
- * ppc-dis.c (operand_value_powerpc, skip_optional_operands): New.
- (print_insn_powerpc): Use the new operand_value_powerpc and
- skip_optional_operands functions to omit or print all optional
- operands as a group.
- * ppc-opc.c (BFF, W, XFL_L, XWRA_MASK): New.
- (XFL_MASK): Delete L and W bits from the mask.
- (mtfsfi, mtfsfi.): Replace use of BF with BFF. Relpace use of XRA_MASK
- with XWRA_MASK. Use W.
- (mtfsf, mtfsf.): Use XFL_L and W.
-
-2007-05-14 H.J. Lu <hongjiu.lu@intel.com>
-
- PR binutils/4502
- * i386-dis.c (Suffix3DNow): Replace "pfmulhrw" with "pmulhrw".
-
-2007-05-10 H.J. Lu <hongjiu.lu@intel.com>
-
- * i386-opc.h (ShortForm): Redefined.
- (Jump): Likewise.
- (JumpDword): Likewise.
- (JumpByte): Likewise.
- (JumpInterSegment): Likewise.
- (FloatMF): Likewise.
- (FloatR): Likewise.
- (FloatD): Likewise.
- (Size16): Likewise.
- (Size32): Likewise.
- (Size64): Likewise.
- (IgnoreSize): Likewise.
- (DefaultSize): Likewise.
- (No_bSuf): Likewise.
- (No_wSuf): Likewise.
- (No_lSuf): Likewise.
- (No_sSuf): Likewise.
- (No_qSuf): Likewise.
- (No_xSuf): Likewise.
- (FWait): Likewise.
- (IsString): Likewise.
- (regKludge): Likewise.
- (IsPrefix): Likewise.
- (ImmExt): Likewise.
- (NoRex64): Likewise.
- (Rex64): Likewise.
- (Ugh): Likewise.
-2007-05-07 H.J. Lu <hongjiu.lu@intel.com>
+2008-02-13 Jan Beulich <jbeulich@novell.com>
- * i386-dis.c (threebyte_0x38_uses_DATA_prefix): Correct entries
- for some SSE4 instructions.
- (threebyte_0x3a_uses_DATA_prefix): Likewise.
+ * i386-opc.h (RegFlat): New.
+ * i386-reg.tbl (flat): Add.
+ * i386-tbl.h: Re-generate.
-2007-05-03 H.J. Lu <hongjiu.lu@intel.com>
+2008-02-13 Jan Beulich <jbeulich@novell.com>
- * i386-dis.c (CRC32_Fixup): Don't print suffix in Intel mode.
+ * i386-dis.c (a_mode): New.
+ (cond_jump_mode): Adjust.
+ (Ma): Change to a_mode.
+ (intel_operand_size): Handle a_mode.
+ * i386-opc.tbl: Allow Dword and Qword for bound.
+ * i386-tbl.h: Re-generate.
- * i386-opc.c (i386_optab): Remove IgnoreSize and correct operand
- type for crc32.
+2008-02-13 Jan Beulich <jbeulich@novell.com>
-2007-05-01 H.J. Lu <hongjiu.lu@intel.com>
+ * i386-gen.c (process_i386_registers): Process new fields.
+ * i386-opc.h (reg_entry): Shrink reg_flags and reg_num to
+ unsigned char. Add dw2_regnum and Dw2Inval.
+ * i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo
+ register names.
+ * i386-tbl.h: Re-generate.
- * i386-dis.c (CRC32_Fixup): Properly handle Intel mode and
- check data size prefix in 16bit mode.
+2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
- * i386-opc.c (i386_optab): Default crc32 to non-8bit and
- support Intel mode.
+ * i386-gen.c (cpu_flag_init): Add CPU_XSAVE_FLAGS.
+ * i386-init.h: Updated.
-2007-04-30 Mark Salter <msalter@redhat.com>
+2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
- * frv-desc.c: Regenerate.
- * frv-desc.h: Regenerate.
+ * i386-gen.c (cpu_flags): Add CpuXsave.
-2007-04-30 Alan Modra <amodra@bigpond.net.au>
+ * i386-opc.h (CpuXsave): New.
+ (CpuLM): Updated.
+ (i386_cpu_flags): Add cpuxsave.
- PR 4436
- * ppc-opc.c (powerpc_operands): Correct bitm for second entry of MBE.
+ * i386-dis.c (MOD_0FAE_REG_4): New.
+ (RM_0F01_REG_2): Likewise.
+ (MOD_0FAE_REG_5): Updated.
+ (RM_0F01_REG_3): Likewise.
+ (reg_table): Use MOD_0FAE_REG_4.
+ (mod_table): Use RM_0F01_REG_2. Add MOD_0FAE_REG_4. Updated
+ for xrstor.
+ (rm_table): Add RM_0F01_REG_2.
-2007-04-27 H.J. Lu <hongjiu.lu@intel.com>
+ * i386-opc.tbl: Add xsave, xrstor, xgetbv and xsetbv.
+ * i386-init.h: Regenerated.
+ * i386-tbl.h: Likewise.
- * i386-dis.c (modrm): Put reg before rm.
+2008-02-11 Jan Beulich <jbeulich@novell.com>
-2007-04-26 H.J. Lu <hongjiu.lu@intel.com>
+ * i386-opc.tbl: Remove Disp32S from CpuNo64 opcodes. Remove
+ Disp16 from Cpu64 non-jump opcodes (including loop and j?cxz).
+ * i386-tbl.h: Re-generate.
- PR binutils/4430
- * i386-dis.c (print_displacement): New.
- (OP_E): Call print_displacement instead of print_operand_value
- to output displacement when either base or index exist. Print
- the explicit zero displacement in 16bit mode.
+2008-02-04 H.J. Lu <hongjiu.lu@intel.com>
-2007-04-26 H.J. Lu <hongjiu.lu@intel.com>
+ PR 5715
+ * configure: Regenerated.
- PR binutils/4429
- * i386-dis.c (print_insn): Also swap the order of op_riprel
- when swapping op_index. Break when the RIP relative address
- is printed.
- (OP_E): Properly handle RIP relative addressing and print the
- explicit zero displacement for Intel mode.
+2008-02-04 Adam Nemet <anemet@caviumnetworks.com>
-2007-04-27 Alan Modra <amodra@bigpond.net.au>
+ * mips-dis.c: Update copyright.
+ (mips_arch_choices): Add Octeon.
+ * mips-opc.c: Update copyright.
+ (IOCT): New macro.
+ (mips_builtin_opcodes): Add Octeon instruction synciobdma.
- * Makefile.am: Run "make dep-am".
- * Makefile.in: Regenerate.
- * ns32k-dis.c: Include sysdep.h first.
+2008-01-29 Alan Modra <amodra@bigpond.net.au>
-2007-04-24 Andreas Krebbel <krebbel1@de.ibm.com>
+ * ppc-opc.c: Support optional L form mtmsr.
- * opcodes/s390-opc.c (MASK_SSF_RRDRD): Fourth nybble belongs to the
- opcode.
- * opcodes/s390-opc.txt (pfpo, ectg, csst): Add new z9-ec instructions.
+2008-01-24 H.J. Lu <hongjiu.lu@intel.com>
-2007-04-24 Nick Clifton <nickc@redhat.com>
+ * i386-dis.c (OP_E_extended): Handle r12 like rsp.
- * arm-dis.c (print_insn): Initialise type.
+2008-01-23 H.J. Lu <hongjiu.lu@intel.com>
-2007-04-24 Alan Modra <amodra@bigpond.net.au>
+ * i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS.
+ * i386-init.h: Regenerated.
- * cgen-types.h: Include bfd_stdint.h, not stdint.h.
- * Makefile.am: Run "make dep-am".
- * Makefile.in: Regenerate.
+2008-01-23 Tristan Gingold <gingold@adacore.com>
-2007-04-23 Nathan Sidwell <nathan@codesourcery.com>
+ * ia64-dis.c (print_insn_ia64): Display symbolic name of ar.fcr,
+ ar.eflag, ar.csd, ar.ssd, ar.cflg, ar.fsr, ar.fir and ar.fdr.
- * m68k-opc.c: Mark mcfisa_c instructions.
+2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
-2007-04-21 Richard Earnshaw <rearnsha@arm.com>
+ * i386-gen.c (cpu_flag_init): Remove CpuMMX2.
+ (cpu_flags): Likewise.
- * arm-dis.c (arm_opcodes): Disassemble to unified syntax.
- (thumb_opcodes): Add missing white space in adr.
- (arm_decode_shift): New parameter, print_shift. Only decode the
- shift parameter if set. Adjust callers.
- (print_insn_arm): Support for operand type q with no shift decode.
+ * i386-opc.h (CpuMMX2): Removed.
+ (CpuSSE): Updated.
-2007-04-21 Alan Modra <amodra@bigpond.net.au>
+ * i386-opc.tbl: Replace CpuMMX2 with CpuSSE|Cpu3dnowA.
+ * i386-init.h: Regenerated.
+ * i386-tbl.h: Likewise.
- * i386-opc.c (i386_float_regtab, i386_float_regtab_size): Delete.
- Move contents to..
- (i386_regtab): ..here.
- * i386-opc.h (i386_float_regtab, i386_float_regtab_size): Delete.
+2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
- * ppc-opc.c (powerpc_operands): Delete duplicate entries.
- (BA_MASK, FXM_MASK, STRM_MASK, VA_MASK, VB_MASK, VC_MASK): Delete.
- (VD_MASK, WS_MASK, MTMSRD_L, XRT_L): Delete.
- (powerpc_opcodes): Replace uses of MTMSRD_L and XRT_L.
+ * i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and
+ CPU_SMX_FLAGS.
+ * i386-init.h: Regenerated.
-2007-04-20 Nathan Sidwell <nathan@codesourcery.com>
+2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
- * m68k-dis.c (print_insn_arg): Show c04 as rambar0 and c05 as
- rambar1.
+ * i386-opc.tbl: Use Qword on movddup.
+ * i386-tbl.h: Regenerated.
-2007-04-20 Alan Modra <amodra@bigpond.net.au>
+2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
- * ppc-dis.c (print_insn_powerpc): Adjust for struct powerpc_operand
- change.
- * ppc-opc.c (powerpc_operands): Replace bit count with bit mask
- in all entries. Add PPC_OPERAND_SIGNED to DE entry. Remove
- references to following deleted functions.
- (insert_bd, extract_bd, insert_dq, extract_dq): Delete.
- (insert_ds, extract_ds, insert_de, extract_de): Delete.
- (insert_des, extract_des, insert_li, extract_li): Delete.
- (insert_nb, insert_rsq, insert_rtq, insert_ev2, extract_ev2): Delete.
- (insert_ev4, extract_ev4, insert_ev8, extract_ev8): Delete.
- (num_powerpc_operands): New constant.
- (XSPRG_MASK): Remove entire SPRG field.
- (powerpc_opcodes <bcctre, bcctrel>): Use XLBB_MASK not XLYBB_MASK.
+ * i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax.
+ * i386-tbl.h: Regenerated.
-2007-04-20 Alan Modra <amodra@bigpond.net.au>
+2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
- * ppc-opc.c (DCM, DGM, TE, RMC, R, SP, S): Correct shift.
- (Z2_MASK): Define.
- (powerpc_opcodes): Use Z2_MASK in all insns taking RMC operand.
+ * i386-dis.c (Mx): New.
+ (PREFIX_0FC3): Likewise.
+ (PREFIX_0FC7_REG_6): Updated.
+ (dis386_twobyte): Use PREFIX_0FC3.
+ (prefix_table): Add PREFIX_0FC3. Use Mq on movntq and movntsd.
+ Use Mx on movntps, movntpd, movntdq and movntdqa. Use Md on
+ movntss.
-2007-04-20 Richard Earnshaw <rearnsha@arm.com>
+2008-01-14 H.J. Lu <hongjiu.lu@intel.com>
- * arm-dis.c (print_insn): Only look for a mapping symbol in the section
- being disassembled.
+ * i386-gen.c (opcode_modifiers): Add IntelSyntax.
+ (operand_types): Add Mem.
-2007-04-19 Alan Modra <amodra@bigpond.net.au>
+ * i386-opc.h (IntelSyntax): New.
+ * i386-opc.h (Mem): New.
+ (Byte): Updated.
+ (Opcode_Modifier_Max): Updated.
+ (i386_opcode_modifier): Add intelsyntax.
+ (i386_operand_type): Add mem.
- * Makefile.am: Run "make dep-am".
- * Makefile.in: Regenerate.
- * po/POTFILES.in: Regenerate.
+ * i386-opc.tbl: Remove Reg16 from movnti. Add sizes to more
+ instructions.
-2007-04-19 Alan Modra <amodra@bigpond.net.au>
+ * i386-reg.tbl: Add size for accumulator.
- * ppc-opc.c (powerpc_opcodes): Add cctpl, cctpm, cctph, db8cyc,
- db10cyc, db12cyc, db16cyc.
+ * i386-init.h: Regenerated.
+ * i386-tbl.h: Likewise.
-2007-04-19 Nathan Froyd <froydnj@codesourcery.com>
+2008-01-13 H.J. Lu <hongjiu.lu@intel.com>
+
+ * i386-opc.h (Byte): Fix a typo.
+
+2008-01-12 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR gas/5534
+ * i386-gen.c (operand_type_init): Add Dword to
+ OPERAND_TYPE_ACC32. Add Qword to OPERAND_TYPE_ACC64.
+ (opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
+ Qword and Xmmword.
+ (operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
+ Xmmword, Unspecified and Anysize.
+ (set_bitfield): Make Mmword an alias of Qword. Make Oword
+ an alias of Xmmword.
+
+ * i386-opc.h (CheckSize): Removed.
+ (Byte): Updated.
+ (Word): Likewise.
+ (Dword): Likewise.
+ (Qword): Likewise.
+ (Xmmword): Likewise.
+ (FWait): Updated.
+ (OTMax): Likewise.
+ (i386_opcode_modifier): Remove checksize, byte, word, dword,
+ qword and xmmword.
+ (Fword): New.
+ (TBYTE): Likewise.
+ (Unspecified): Likewise.
+ (Anysize): Likewise.
+ (i386_operand_type): Add byte, word, dword, fword, qword,
+ tbyte xmmword, unspecified and anysize.
- * ppc-opc.c (powerpc_opcodes): Recognize three-operand tlbsxe.
+ * i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
+ Tbyte, Xmmword, Unspecified and Anysize.
-2007-04-18 H.J. Lu <hongjiu.lu@intel.com>
+ * i386-reg.tbl: Add size for accumulator.
- * i386-dis.c (CRC32_Fixup): New.
- (PREGRP85, PREGRP86, PREGRP87, PREGRP88, PREGRP89, PREGRP90,
- PREGRP91): New.
- (threebyte_0x38_uses_DATA_prefix): Updated for SSE4.2.
- (threebyte_0x3a_uses_DATA_prefix): Likewise.
- (prefix_user_table): Add PREGRP85, PREGRP86, PREGRP87,
- PREGRP88, PREGRP89, PREGRP90 and PREGRP91.
- (three_byte_table): Likewise.
+ * i386-init.h: Regenerated.
+ * i386-tbl.h: Likewise.
- * i386-opc.c (i386_optab): Add SSE4.2 opcodes.
+2008-01-10 H.J. Lu <hongjiu.lu@intel.com>
- * i386-opc.h (CpuSSE4_2): New.
- (CpuSSE4): Likewise.
- (CpuUnknownFlags): Add CpuSSE4_2.
+ * i386-dis.c (REG_0F0E): Renamed to REG_0F0D.
+ (REG_0F18): Updated.
+ (reg_table): Updated.
+ (dis386_twobyte): Updated. Use "nopQ" on 0x19 to 0x1e.
+ (twobyte_has_modrm): Set 1 for 0x19 to 0x1e.
-2007-04-18 H.J. Lu <hongjiu.lu@intel.com>
+2008-01-08 H.J. Lu <hongjiu.lu@intel.com>
- * i386-dis.c (XMM_Fixup): New.
- (Edqb): New.
- (Edqd): New.
- (XMM0): New.
- (dqb_mode): New.
- (dqd_mode): New.
- (PREGRP39 ... PREGRP85): New.
- (threebyte_0x38_uses_DATA_prefix): Updated for SSE4.
- (threebyte_0x3a_uses_DATA_prefix): Likewise.
- (prefix_user_table): Add PREGRP39 ... PREGRP85.
- (three_byte_table): Likewise.
- (putop): Handle 'K'.
- (intel_operand_size): Handle dqb_mode, dqd_mode):
- (OP_E): Likewise.
- (OP_G): Likewise.
+ * i386-gen.c (set_bitfield): Use fail () on error.
- * i386-opc.c (i386_optab): Add SSE4.1 opcodes.
+2008-01-08 H.J. Lu <hongjiu.lu@intel.com>
- * i386-opc.h (CpuSSE4_1): New.
- (CpuUnknownFlags): Add CpuSSE4_1.
- (regKludge): Update comment.
+ * i386-gen.c (lineno): New.
+ (filename): Likewise.
+ (set_bitfield): Report filename and line numer on error.
+ (process_i386_opcodes): Set filename and update lineno.
+ (process_i386_registers): Likewise.
-2007-04-18 Matthias Klose <doko@ubuntu.com>
+2008-01-05 H.J. Lu <hongjiu.lu@intel.com>
- * Makefile.am (libopcodes_la_LDFLAGS): Use bfd soversion.
- * Makefile.in: Regenerate.
+ * i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
+ ATTSyntax.
-2007-04-14 Steve Ellcey <sje@cup.hp.com>
+ * i386-opc.h (IntelMnemonic): Renamed to ..
+ (ATTSyntax): This
+ (Opcode_Modifier_Max): Updated.
+ (i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
+ and intelsyntax.
- * Makefile.am: Add ACLOCAL_AMFLAGS.
- * Makefile.in: Regenerate.
+ * i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax
+ on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
+ * i386-tbl.h: Regenerated.
-2007-04-13 H.J. Lu <hongjiu.lu@intel.com>
+2008-01-04 H.J. Lu <hongjiu.lu@intel.com>
- * i386-dis.c: Remove trailing white spaces.
- * i386-opc.c: Likewise.
+ * i386-gen.c: Update copyright to 2008.
* i386-opc.h: Likewise.
+ * i386-opc.tbl: Likewise.
-2007-04-11 H.J. Lu <hongjiu.lu@intel.com>
-
- PR binutils/4333
- * i386-dis.c (GRP1a): New.
- (GRP1b ... GRPPADLCK2): Update index.
- (dis386): Use GRP1a for entry 0x8f.
- (mod, rm, reg): Removed. Replaced by ...
- (modrm): This.
- (grps): Add GRP1a.
-
-2007-04-09 Kazu Hirata <kazu@codesourcery.com>
-
- * m68k-dis.c (print_insn_m68k): Restore info->fprintf_func and
- info->print_address_func if longjmp is called.
-
-2007-03-29 DJ Delorie <dj@redhat.com>
-
- * m32c-desc.c: Regenerate.
- * m32c-dis.c: Regenerate.
- * m32c-opc.c: Regenerate.
-
-2007-03-28 H.J. Lu <hongjiu.lu@intel.com>
-
- * i386-opc.c (i386_optab): Change InvMem to RegMem for mov and
- movq. Remove InvMem from sldt, smsw and str.
-
- * i386-opc.h (InvMem): Renamed to ...
- (RegMem): Update comments.
- (AnyMem): Remove InvMem.
-
-2007-03-27 Paul Brook <paul@codesourcery.com>
-
- * arm-dis.c (thumb_opcodes): Add entry for undefined insns (0xbe??).
-
-2007-03-24 Paul Brook <paul@codesourcery.com>
-
- * arm-dis.c (coprocessor_opcodes): Remove superfluous 0x.
- (print_insn_coprocessor): Handle %<bitfield>x.
-
-2007-03-24 Paul Brook <paul@codesourcery.com>
- Mark Shinwell <shinwell@codesourcery.com>
-
- * arm-dis.c (arm_opcodes): Print SRS base register.
+ * i386-init.h: Regenerated.
+ * i386-tbl.h: Likewise.
-2007-03-23 H.J. Lu <hongjiu.lu@intel.com>
+2008-01-04 H.J. Lu <hongjiu.lu@intel.com>
- * i386-dis.c (prefix_name): Replace rex64XYZ with rex.WRXB.
+ * i386-opc.tbl: Add NoRex64 to extractps, movmskpd, movmskps,
+ pextrb, pextrw, pinsrb, pinsrw and pmovmskb.
+ * i386-tbl.h: Regenerated.
- * i386-opc.c (i386_optab): Add rex.wrxb.
+2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
-2007-03-21 H.J. Lu <hongjiu.lu@intel.com>
+ * i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and
+ CpuSSE4_2_Or_ABM.
+ (cpu_flags): Likewise.
- * i386-dis.c (REX_MODE64): Remove definition.
- (REX_EXTX): Likewise.
- (REX_EXTY): Likewise.
- (REX_EXTZ): Likewise.
- (USED_REX): Use REX_OPCODE instead of 0x40.
- Replace REX_MODE64, REX_EXTX, REX_EXTY and REX_EXTZ with REX_W,
- REX_R, REX_X and REX_B respectively.
+ * i386-opc.h (CpuSSE4_1_Or_5): Removed.
+ (CpuSSE4_2_Or_ABM): Likewise.
+ (CpuLM): Updated.
+ (i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm.
-2007-03-21 H.J. Lu <hongjiu.lu@intel.com>
+ * i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and
+ Cpu686|CpuPadLock with CpuSSE4_1|CpuSSE5, CpuABM|CpuSSE4_2
+ and CpuPadLock, respectively.
+ * i386-init.h: Regenerated.
+ * i386-tbl.h: Likewise.
- PR binutils/4218
- * i386-dis.c (PREGRP38): New.
- (dis386): Use PREGRP38 for 0x90.
- (prefix_user_table): Add PREGRP38.
- (print_insn): Set uses_REPZ_prefix to 1 for pause.
- (NOP_Fixup1): Properly handle REX bits.
- (NOP_Fixup2): Likewise.
+2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
- * i386-opc.c (i386_optab): Allow %eax with xchg in 64bit.
- Allow register with nop.
+ * i386-gen.c (opcode_modifiers): Remove No_xSuf.
-2007-03-20 DJ Delorie <dj@redhat.com>
+ * i386-opc.h (No_xSuf): Removed.
+ (CheckSize): Updated.
- * m32c-asm.c: Regenerate.
- * m32c-desc.c: Regenerate.
- * m32c-desc.h: Regenerate.
- * m32c-dis.h: Regenerate.
- * m32c-ibld.c: Regenerate.
- * m32c-opc.c: Regenerate.
- * m32c-opc.h: Regenerate.
+ * i386-tbl.h: Regenerated.
-2007-03-15 H.J. Lu <hongjiu.lu@intel.com>
+2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
- * i386-opc.c: Include "libiberty.h".
- (i386_regtab): Remove the last entry.
- (i386_regtab_size): New.
- (i386_float_regtab_size): Likewise.
+ * i386-gen.c (cpu_flag_init): Add CpuSSE4_2_Or_ABM to
+ CPU_AMDFAM10_FLAGS, CPU_SSE4_2_FLAGS, CpuABM and
+ CPU_SSE5_FLAGS.
+ (cpu_flags): Add CpuSSE4_2_Or_ABM.
- * i386-opc.h (i386_regtab_size): New.
- (i386_float_regtab_size): Likewise.
+ * i386-opc.h (CpuSSE4_2_Or_ABM): New.
+ (CpuLM): Updated.
+ (i386_cpu_flags): Add cpusse4_2_or_abm.
-2007-03-15 H.J. Lu <hongjiu.lu@intel.com>
+ * i386-opc.tbl: Use CpuSSE4_2_Or_ABM instead of
+ CpuABM|CpuSSE4_2 on popcnt.
+ * i386-init.h: Regenerated.
+ * i386-tbl.h: Likewise.
- * Makefile.am (CFILES): Add i386-opc.c.
- (ALL_MACHINES): Add i386-opc.lo.
- Run "make dep-am".
- * Makefile.in: Regenerated.
+2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
- * configure.in: Add i386-opc.lo for bfd_i386_arch.
- * configure: Regenerated.
+ * i386-opc.h: Update comments.
- * i386-dis.c: Include "opcode/i386.h".
- (MAXLEN): Renamed to MAX_MNEM_SIZE. Remove definition.
- (FWAIT_OPCODE): Remove definition.
- (UNIXWARE_COMPAT): Renamed to SYSV386_COMPAT. Remove definition.
- (MAX_OPERANDS): Remove definition.
+2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
- * i386-opc.c: New file.
+ * i386-gen.c (opcode_modifiers): Use Qword instead of QWord.
* i386-opc.h: Likewise.
+ * i386-opc.tbl: Likewise.
-2007-03-15 H.J. Lu <hongjiu.lu@intel.com>
-
- * Makefile.in: Regenerated.
-
-2007-03-09 H.J. Lu <hongjiu.lu@intel.com>
-
- * i386-dis.c (OP_Rd): Renamed to ...
- (OP_R): This.
- (Rd): Updated.
- (Rm): Likewise.
-
-2007-03-08 Alan Modra <amodra@bigpond.net.au>
-
- * fr30-asm.c: Regenerate.
- * frv-asm.c: Regenerate.
- * ip2k-asm.c: Regenerate.
- * iq2000-asm.c: Regenerate.
- * m32c-asm.c: Regenerate.
- * m32r-asm.c: Regenerate.
- * m32r-dis.c: Regenerate.
- * mt-asm.c: Regenerate.
- * mt-ibld.c: Regenerate.
- * mt-opc.c: Regenerate.
- * openrisc-asm.c: Regenerate.
- * xc16x-asm.c: Regenerate.
- * xstormy16-asm.c: Regenerate.
-
- * Makefile.am: Run "make dep-am".
- * Makefile.in: Regenerate.
- * po/POTFILES.in: Regenerate.
-
-2007-03-06 Andreas Krebbel <krebbel1@de.ibm.com>
-
- * opcodes/s390-opc.c (INSTR_RRE_FR, INSTR_RRF_F0FF2, INSTR_RRF_F0FR,
- INSTR_RRF_UUFF, INSTR_RRF_0UFF, INSTR_RRF_FFFU, INSTR_RRR_F0FF): New
- instruction formats added.
- (MASK_RRE_FR, MASK_RRF_F0FF2, MASK_RRF_F0FR, MASK_RRF_UUFF,
- MASK_RRF_0UFF, MASK_RRF_FFFU, MASK_RRR_F0FF): New instruction format
- masks added.
- * opcodes/s390-opc.txt (lpdfr - tgxt): Decimal floating point
- instructions added.
- * opcodes/s390-mkopc.c (s390_opcode_cpu_val): S390_OPCODE_Z9_EC added.
- (main): z9-ec cpu type option added.
- * include/opcode/s390.h (s390_opcode_cpu_val): S390_OPCODE_Z9_EC added.
-
-2007-02-22 DJ Delorie <dj@redhat.com>
-
- * s390-opc.c (INSTR_SS_L2RDRD): New.
- (MASK_SS_L2RDRD): New.
- * s390-opc.txt (pka): Use it.
-
-2007-02-20 Thiemo Seufer <ths@mips.com>
- Chao-Ying Fu <fu@mips.com>
-
- * mips-dis.c (mips_arch_choices): Add DSP R2 support.
- (print_insn_args): Add support for balign instruction.
- * mips-opc.c (D33): New shortcut for DSP R2 instructions.
- (mips_builtin_opcodes): Add DSP R2 instructions.
-
-2007-02-19 Andreas Krebbel <krebbel1@de.ibm.com>
-
- * s390-opc.c (INSTR_RRF_U0FR, MASK_RRF_U0FR): Removed.
- (INSTR_RRF_U0RF, MASK_RRF_U0RF): Added.
- * s390-opc.txt (cfxbr, cfdbr, cfebr, cgebr, cgdbr, cgxbr, cger, cgdr,
- cgxr, cfxr, cfdr, cfer): Instruction type set to INSTR_RRF_U0RF.
-
-2007-02-19 Andreas Krebbel <krebbel1@de.ibm.com>
-
- * s390-opc.txt ("efpc", "sfpc"): Set to RRE_RR_OPT instruction type.
- * s390-opc.c (s390_operands): Add RO_28 as optional gpr.
- (INSTR_RRE_RR_OPT, MASK_RRE_RR_OPT): New instruction type for efpc
- and sfpc.
-
-2007-02-16 Nick Clifton <nickc@redhat.com>
-
- PR binutils/4045
- * avr-dis.c (comment_start): New variable, contains the prefix to
- use when printing addresses in comments.
- (print_insn_avr): Set comment_start to an empty space if there is
- no symbol table available as the generic address printing code
- will prefix the numeric value of the address with 0x.
-
-2007-02-13 H.J. Lu <hongjiu.lu@intel.com>
-
- * i386-dis.c: Updated to use an array of MAX_OPERANDS operands
- in struct dis386.
-
-2007-02-05 Dave Brolley <brolley@redhat.com>
- Richard Sandiford <rsandifo@redhat.com>
- DJ Delorie <dj@redhat.com>
- Graydon Hoare <graydon@redhat.com>
- Frank Ch. Eigler <fche@redhat.com>
- Ben Elliston <bje@redhat.com>
-
- * Makefile.am (HFILES): Add mep-desc.h mep-opc.h.
- (CFILES): Add mep-*.c
- (ALL_MACHINES): Add mep-*.lo.
- (CLEANFILES): Add stamp-mep.
- (CGEN_CPUS): Add mep.
- (MEP_DEPS): New variable.
- (mep-*): New targets.
- * configure.in: Handle bfd_mep_arch.
- * disassemble.c (ARCH_mep): New macro.
- (disassembler): Handle bfd_arch_mep.
- (disassemble_init_for_target): Likewise.
- * mep-*: New files for Toshiba Media Processor (MeP).
- * Makefile.in: Regenerated.
- * configure: Regenerated.
-
-2007-02-05 H.J. Lu <hongjiu.lu@intel.com>
-
- * i386-dis.c (OP_J): Undo the last change. Properly handle 64K
- wrap around within the same segment in 16bit mode.
-
-2007-02-02 H.J. Lu <hongjiu.lu@intel.com>
-
- * i386-dis.c (OP_J): Mask to 16bit only if there is a data16
- prefix.
-
-2007-02-02 H.J. Lu <hongjiu.lu@intel.com>
-
- * avr-dis.c (avr_operand): Correct PR number in comment.
-
-2007-02-02 H.J. Lu <hongjiu.lu@intel.com>
-
- * disassemble.c (disassembler_usage): Call
- print_i386_disassembler_options for i386 disassembler.
-
- * i386-dis.c (print_i386_disassembler_options): New.
- (print_insn): Support the new addr64 option.
-
-2007-02-02 Hiroki Kaminaga <kaminaga@sm.sony.co.jp>
-
- * ppc-dis.c (powerpc_dialect): Handle ppc440.
- * ppc-dis.c (print_ppc_disassembler_options): Note the -M440 can
- be used.
-
-2007-02-02 Alan Modra <amodra@bigpond.net.au>
-
- * ppc-opc.c (insert_bdm): -Many comment.
- (valid_bo): Add "extract" param. Accept both powerpc and power4
- BO fields when disassembling with -Many.
- (insert_bo, extract_bo, insert_boe, extract_boe): Adjust valid_bo call.
-
-2007-01-08 Kazu Hirata <kazu@codesourcery.com>
-
- * m68k-opc.c (m68k_opcodes): Replace cpu32 with
- cpu32 | fido_a except on tbl instructions.
-
-2007-01-04 Paul Brook <paul@codesourcery.com>
-
- * arm-dis.c (arm_opcodes): Fix cpsie and cpsid entries.
-
-2007-01-04 Andreas Schwab <schwab@suse.de>
-
- * m68k-opc.c: Fix encoding of signed bit in the cpu32 tbls insns.
+2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR gas/5534
+ * i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
+ Byte, Word, Dword, QWord and Xmmword.
+
+ * i386-opc.h (No_xSuf): New.
+ (CheckSize): Likewise.
+ (Byte): Likewise.
+ (Word): Likewise.
+ (Dword): Likewise.
+ (QWord): Likewise.
+ (Xmmword): Likewise.
+ (FWait): Updated.
+ (i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
+ Dword, QWord and Xmmword.
+
+ * i386-opc.tbl: Add CheckSize|QWord to movq if IgnoreSize is
+ used.
+ * i386-tbl.h: Regenerated.
-2007-01-04 Julian Brown <julian@codesourcery.com>
+2008-01-02 Mark Kettenis <kettenis@gnu.org>
- * arm-dis.c (neon_opcode): Fix disassembly for vshl, vqshl, vrshl,
- vqrshl instructions.
+ * m88k-dis.c (instructions): Fix fcvt.* instructions.
+ From Miod Vallat.
-For older changes see ChangeLog-2006
+For older changes see ChangeLog-2007
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