-2011-02-13 Mike Frysinger <vapier@gentoo.org>
-
- * bfin-dis.c (decode_dsp32mult_0): Add 1 to dst for mac1. Output
- dregs only when P is set, and dregs_lo otherwise.
-
-2011-02-13 Mike Frysinger <vapier@gentoo.org>
-
- * bfin-dis.c (decode_dsp32alu_0): Delete BYTEOP2M code.
-
-2011-02-12 Mike Frysinger <vapier@gentoo.org>
-
- * bfin-dis.c (decode_pseudoDEBUG_0): Add space after PRNT.
-
-2011-02-12 Mike Frysinger <vapier@gentoo.org>
-
- * bfin-dis.c (machine_registers): Delete REG_GP.
- (reg_names): Delete "GP".
- (decode_allregs): Change REG_GP to REG_LASTREG.
-
-2011-02-12 Mike Frysinger <vapier@gentoo.org>
-
- * bfin.h (M_S2RND, M_T, M_W32, M_FU, M_TFU, M_IS, M_ISS2, M_IH,
- M_IU): Define.
- (is_macmod_pmove, is_macmod_hmove): New functions.
-
-2011-02-11 Mike Frysinger <vapier@gentoo.org>
-
- * bfin-dis.c (reg_names): Add const.
- (decode_dregs_lo, decode_dregs_hi, decode_dregs, decode_dregs_byte,
- decode_pregs, decode_iregs, decode_mregs, decode_dpregs, decode_gregs,
- decode_regs, decode_regs_lo, decode_regs_hi, decode_statbits,
- decode_counters, decode_allregs): Likewise.
-
-2011-02-09 Michael Snyder <msnyder@vmware.com>
-
- * i386-dis.c (OP_J): Parenthesize expression to prevent
- truncated addresses.
- (print_insn): Fix indentation off-by-one.
-
-2011-02-01 Nick Clifton <nickc@redhat.com>
-
- * po/da.po: Updated Danish translation.
-
-2011-01-21 Dave Murphy <davem@devkitpro.org>
-
- * ppc-opc.c (NON32, NO371): Remove PPC_OPCODE_PPCPS.
-
-2011-01-18 H.J. Lu <hongjiu.lu@intel.com>
-
- * i386-dis.c (sIbT): New.
- (b_T_mode): Likewise.
- (dis386): Replace sIb with sIbT on "pushT".
- (x86_64_table): Replace sIb with Ib on "aam" and "aad".
- (OP_sI): Handle b_T_mode. Properly sign-extend byte.
-
-2011-01-18 Jan Kratochvil <jan.kratochvil@redhat.com>
-
+2012-02-27 Alan Modra <amodra@gmail.com>
+
+ * v850-opc.c (extract_v8): Rearrange to make it obvious this
+ is the inverse of corresponding insert function.
+ (extract_d22, extract_u9, extract_r4): Likewise.
+ (extract_d9): Correct sign extension.
+ (extract_d16_15): Don't assume "long" is 32 bits, and don't
+ rely on implementation defined behaviour for shift right of
+ signed types.
+ (extract_d16_16, extract_d17_16, extract_i9): Likewise.
+ (extract_d23): Likewise, and correct mask.
+
+2012-02-27 Alan Modra <amodra@gmail.com>
+
+ * crx-dis.c (print_arg): Mask constant to 32 bits.
+ * crx-opc.c (cst4_map): Use int array.
+
+2012-02-27 Alan Modra <amodra@gmail.com>
+
+ * arc-dis.c (BITS): Don't use shifts to mask off bits.
+ (FIELDD): Sign extend with xor,sub.
+
+2012-02-25 Walter Lee <walt@tilera.com>
+
+ * tilegx-opc.c: Handle TILEGX_OPC_LD4S_TLS and TILEGX_OPC_LD_TLS.
+ * tilepro-opc.c: Handle TILEPRO_OPC_LW_TLS and
+ TILEPRO_OPC_LW_TLS_SN.
+
+2012-02-21 H.J. Lu <hongjiu.lu@intel.com>
+
+ * i386-opc.h (HLEPrefixNone): New.
+ (HLEPrefixLock): Likewise.
+ (HLEPrefixAny): Likewise.
+ (HLEPrefixRelease): Likewise.
+
+2012-02-08 H.J. Lu <hongjiu.lu@intel.com>
+
+ * i386-dis.c (HLE_Fixup1): New.
+ (HLE_Fixup2): Likewise.
+ (HLE_Fixup3): Likewise.
+ (Ebh1): Likewise.
+ (Evh1): Likewise.
+ (Ebh2): Likewise.
+ (Evh2): Likewise.
+ (Ebh3): Likewise.
+ (Evh3): Likewise.
+ (MOD_C6_REG_7): Likewise.
+ (MOD_C7_REG_7): Likewise.
+ (RM_C6_REG_7): Likewise.
+ (RM_C7_REG_7): Likewise.
+ (XACQUIRE_PREFIX): Likewise.
+ (XRELEASE_PREFIX): Likewise.
+ (dis386): Use Ebh1/Evh1 on add, adc, and, btc, btr, bts,
+ cmpxchg, dec, inc, neg, not, or, sbb, sub, xor and xadd. Use
+ Ebh2/Evh2 on xchg. Use Ebh3/Evh3 on mov.
+ (reg_table): Use Ebh1/Evh1 on add, adc, and, dec, inc, neg,
+ not, or, sbb, sub and xor. Use Ebh3/Evh3 on mov. Use
+ MOD_C6_REG_7 and MOD_C7_REG_7.
+ (mod_table): Add MOD_C6_REG_7 and MOD_C7_REG_7.
+ (rm_table): Add RM_C6_REG_7 and RM_C7_REG_7. Add xend and
+ xtest.
+ (prefix_name): Handle XACQUIRE_PREFIX and XRELEASE_PREFIX.
+ (CMPXCHG8B_Fixup): Handle HLE prefix on cmpxchg8b.
+
+ * i386-gen.c (cpu_flag_init): Add CPU_HLE_FLAGS and
+ CPU_RTM_FLAGS.
+ (cpu_flags): Add CpuHLE and CpuRTM.
+ (opcode_modifiers): Add HLEPrefixOk.
+
+ * i386-opc.h (CpuHLE): New.
+ (CpuRTM): Likewise.
+ (HLEPrefixOk): Likewise.
+ (i386_cpu_flags): Add cpuhle and cpurtm.
+ (i386_opcode_modifier): Add hleprefixok.
+
+ * i386-opc.tbl: Add HLEPrefixOk=3 to mov. Add HLEPrefixOk to
+ add, adc, and, btc, btr, bts, cmpxchg, dec, inc, neg, not, or,
+ sbb, sub, xor and xadd. Add HLEPrefixOk=2 to xchg with memory
+ operand. Add xacquire, xrelease, xabort, xbegin, xend and
+ xtest.
* i386-init.h: Regenerated.
- * i386-tbl.h: Regenerated
-
-2011-01-17 Quentin Neill <quentin.neill@amd.com>
-
- * i386-dis.c (REG_XOP_TBM_01): New.
- (REG_XOP_TBM_02): New.
- (reg_table): Add REG_XOP_TBM_01 and REG_XOP_TBM_02 tables.
- (xop_table): Redirect to REG_XOP_TBM_01 and REG_XOP_TBM_02
- entries, and add bextr instruction.
-
- * i386-gen.c (cpu_flag_init): Add CPU_TBM_FLAGS, CpuTBM.
- (cpu_flags): Add CpuTBM.
-
- * i386-opc.h (CpuTBM) New.
- (i386_cpu_flags): Add bit cputbm.
-
- * i386-opc.tbl: Add bextr, blcfill, blci, blcic, blcmsk,
- blcs, blsfill, blsic, t1mskc, and tzmsk.
-
-2011-01-12 DJ Delorie <dj@redhat.com>
-
- * rx-dis.c (print_insn_rx): Support RX_Operand_TwoReg.
+ * i386-tbl.h: Likewise.
-2011-01-11 Mingjie Xing <mingjie.xing@gmail.com>
+2012-01-24 DJ Delorie <dj@redhat.com>
- * mips-dis.c (print_insn_args): Adjust the value to print the real
- offset for "+c" argument.
+ * rl78-decode.opc (rl78_decode_opcode): Add NOT1.
+ * rl78-decode.c: Regenerate.
-2011-01-10 Nick Clifton <nickc@redhat.com>
+2012-01-17 James Murray <jsm@jsm-net.demon.co.uk>
- * po/da.po: Updated Danish translation.
+ PR binutils/10173
+ * cr16-dis.c (print_arg): Test symtab_size not num_symbols.
-2011-01-05 Nathan Sidwell <nathan@codesourcery.com>
+2012-01-17 Andreas Schwab <schwab@linux-m68k.org>
- * arm-dis.c (thumb32_opcodes): BLX must have bit zero clear.
+ * m68k-opc.c (m68k_opcodes): Fix entries for pmove with BADx/BACx
+ register and move them after pmove with PSR/PCSR register.
-2011-01-04 H.J. Lu <hongjiu.lu@intel.com>
+2012-01-13 H.J. Lu <hongjiu.lu@intel.com>
- * i386-dis.c (REG_VEX_38F3): New.
- (PREFIX_0FBC): Likewise.
- (PREFIX_VEX_38F2): Likewise.
- (PREFIX_VEX_38F3_REG_1): Likewise.
- (PREFIX_VEX_38F3_REG_2): Likewise.
- (PREFIX_VEX_38F3_REG_3): Likewise.
- (PREFIX_VEX_38F7): Likewise.
- (VEX_LEN_38F2_P_0): Likewise.
- (VEX_LEN_38F3_R_1_P_0): Likewise.
- (VEX_LEN_38F3_R_2_P_0): Likewise.
- (VEX_LEN_38F3_R_3_P_0): Likewise.
- (VEX_LEN_38F7_P_0): Likewise.
- (dis386_twobyte): Use PREFIX_0FBC.
- (reg_table): Add REG_VEX_38F3.
- (prefix_table): Add PREFIX_0FBC, PREFIX_VEX_38F2,
- PREFIX_VEX_38F3_REG_1, PREFIX_VEX_38F3_REG_2,
- PREFIX_VEX_38F3_REG_3 and PREFIX_VEX_38F7.
- (vex_table): Use PREFIX_VEX_38F2, REG_VEX_38F3 and
- PREFIX_VEX_38F7.
- (vex_len_table): Add VEX_LEN_38F2_P_0, VEX_LEN_38F3_R_1_P_0,
- VEX_LEN_38F3_R_2_P_0, VEX_LEN_38F3_R_3_P_0 and
- VEX_LEN_38F7_P_0.
+ * i386-dis.c (mod_table): Add vmfunc.
- * i386-gen.c (cpu_flag_init): Add CPU_BMI_FLAGS.
- (cpu_flags): Add CpuBMI.
+ * i386-gen.c (cpu_flag_init): Add CPU_VMFUNC_FLAGS.
+ (cpu_flags): CpuVMFUNC.
- * i386-opc.h (CpuBMI): New.
- (i386_cpu_flags): Add cpubmi.
+ * i386-opc.h (CpuVMFUNC): New.
+ (i386_cpu_flags): Add cpuvmfunc.
- * i386-opc.tbl: Add andn, bextr, blsi, blsmsk, blsr and tzcnt.
+ * i386-opc.tbl: Add vmfunc.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
-2011-01-04 H.J. Lu <hongjiu.lu@intel.com>
-
- * i386-dis.c (VexGdq): New.
- (OP_VEX): Handle dq_mode.
-
-2011-01-01 H.J. Lu <hongjiu.lu@intel.com>
-
- * i386-gen.c (process_copyright): Update copyright to 2011.
-
-For older changes see ChangeLog-2010
+For older changes see ChangeLog-2011
\f
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projects / deliverable / binutils-gdb.git / blobdiff