+2020-07-14 Jan Beulich <jbeulich@suse.com>
+
+ * i386-dis.c (PREFIX_EVEX_0F2C, PREFIX_EVEX_0F2D,
+ PREFIX_EVEX_0F2E, PREFIX_EVEX_0F2F): Delete.
+ (prefix_table): Add EXxEVexS operand to vcvttss2si, vcvttsd2si,
+ vcvtss2si, vcvtsd2si, vucomiss, and vucomisd table entries.
+ Retain X macro and PREFIX_OPCODE use from tjhe EVEX table for
+ the latter two.
+ * i386-dis-evex.h (evex_table): Reference VEX table for opcodes
+ 0F2C, 0F2D, 0F2E, and 0F2F.
+ * i386-dis-evex-prefix.h: Delete opcode 0F2C, 0F2D, 0F2E, and
+ 0F2F table entries.
+
+2020-07-14 Jan Beulich <jbeulich@suse.com>
+
+ * i386-dis.c (OP_VexR, VexScalarR): New.
+ (OP_EX_Vex, OP_XMM_Vex, EXdVexScalarS, EXqVexScalarS,
+ XMVexScalar, d_scalar_swap_mode, q_scalar_swap_mode,
+ need_vex_reg): Delete.
+ (prefix_table): Replace VexScalar by VexScalarR and
+ XMVexScalar by XMScalar for vmovss and vmovsd. Replace
+ EXdVexScalarS by EXdS and EXqVexScalarS by EXqS.
+ (vex_len_table): Replace EXqVexScalarS by EXqS.
+ (get_valid_dis386): Don't set need_vex_reg.
+ (print_insn): Don't initialize need_vex_reg.
+ (intel_operand_size, OP_E_memory): Drop d_scalar_swap_mode and
+ q_scalar_swap_mode cases.
+ (OP_EX): Don't check for d_scalar_swap_mode and
+ q_scalar_swap_mode.
+ (OP_VEX): Done check need_vex_reg.
+ * i386-dis-evex-w.h: Replace VexScalar by VexScalarR and
+ XMVexScalar by XMScalar for vmovss and vmovsd. Replace
+ EXdVexScalarS by EXdS and EXqVexScalarS by EXqS.
+
+2020-07-14 Jan Beulich <jbeulich@suse.com>
+
+ * i386-dis.c (Vex128, Vex256, vex128_mode, vex256_mode): Delete.
+ (VEX_W_0F381A_P_2_M_0, VEX_W_0F385A_P_2_M_0, VEX_W_0F3A06_P_2,
+ VEX_W_0F3A18_P_2, VEX_W_0F3A19_P_2, VEX_W_0F3A38_P_2,
+ VEX_W_0F3A39_P_2, VEX_W_0F3A46_P_2): Rename to ...
+ (VEX_W_0F381A_P_2_M_0_L_0, VEX_W_0F385A_P_2_M_0_L_0,
+ VEX_W_0F3A06_P_2_L_0, VEX_W_0F3A18_P_2_L_0,
+ VEX_W_0F3A19_P_2_L_0, VEX_W_0F3A38_P_2_L_0,
+ VEX_W_0F3A39_P_2_L_0, VEX_W_0F3A46_P_2_L_0): ... respectively.
+ (vex_table): Replace Vex128 by Vex.
+ (vex_len_table): Likewise. Adjust referenced enum names.
+ (vex_w_table): Replace Vex128 and Vex256 by Vex. Adjust
+ referenced enum names.
+ (OP_VEX): Drop vex128_mode and vex256_mode cases.
+ * i386-dis-evex-len.h (evex_len_table): Replace Vex128 by Vex.
+
+2020-07-14 Jan Beulich <jbeulich@suse.com>
+
+ * i386-dis.c (dis386): "LW" description now applies to "DQ".
+ (putop): Handle "DQ". Don't handle "LW" anymore.
+ (prefix_table, mod_table): Replace %LW by %DQ.
+ * i386-dis-evex-len.h, i386-dis-evex-prefix.h: Likewise.
+
+2020-07-14 Jan Beulich <jbeulich@suse.com>
+
+ * i386-dis.c (OP_E_memory): Move xmm_mw_mode, xmm_mb_mode,
+ dqd_mode, xmm_md_mode, d_mode, d_swap_mode, and
+ d_scalar_swap_mode case handling. Move shift adjsutment into
+ the case its applicable to.
+
+2020-07-14 Jan Beulich <jbeulich@suse.com>
+
+ * i386-dis.c (EVEX_W_0F3862_P_2, EVEX_W_0F3863_P_2): Delete.
+ (EXbScalar, EXwScalar): Fold to ...
+ (EXbwUnit): ... this.
+ (b_scalar_mode, w_scalar_mode): Fold to ...
+ (bw_unit_mode): ... this.
+ (intel_operand_size, OP_E_memory): Replace b_scalar_mode /
+ w_scalar_mode handling by bw_unit_mode one.
+ * i386-dis-evex-w.h: Move entries for opcodes 0F3862 and 0F3863
+ ...
+ * i386-dis-evex-prefix.h: ... here.
+
+2020-07-14 Jan Beulich <jbeulich@suse.com>
+
+ * i386-dis.c (PCMPESTR_Fixup): Delete.
+ (dis386): Adjust "LQ" description.
+ (prefix_table): Make %LQ apply to AT&T case only for cvtsi2ss,
+ cvtsi2sd, ptwrite, vcvtsi2ss, and vcvtsi2sd. Replace use of
+ PCMPESTR_Fixup by !%LQ and EXx for pcmpestrm, pcmpestri,
+ vpcmpestrm, and vpcmpestri.
+ (putop): Honor "cond" when handling LQ.
+ * i386-dis-evex-prefix.h: Make %LQ apply to AT&T case only for
+ vcvtsi2ss and vcvtusi2ss.
+ * i386-dis-evex-w.h: Make %LQ apply to AT&T case only for
+ vcvtsi2sd and vcvtusi2sd.
+
+2020-07-14 Jan Beulich <jbeulich@suse.com>
+
+ * i386-dis.c (VCMP_Fixup, VCMP): Delete.
+ (simd_cmp_op): Add const.
+ (vex_cmp_op): Move up and drop initial 8 entries. Add const.
+ (CMP_Fixup): Handle VEX case.
+ (prefix_table): Replace VCMP by CMP.
+ * i386-dis-evex-prefix.h, i386-dis-evex-w.h: Likewise.
+
+2020-07-14 Jan Beulich <jbeulich@suse.com>
+
+ * i386-dis.c (MOVBE_Fixup): Delete.
+ (Mv): Define.
+ (prefix_table): Use Mv for movbe entries.
+
+2020-07-14 Jan Beulich <jbeulich@suse.com>
+
+ * i386-dis.c (CRC32_Fixup): Delete.
+ (prefix_table): Use Eb/Ev for crc32 entries.
+
+2020-07-14 Jan Beulich <jbeulich@suse.com>
+
+ * i386-dis.c (OP_E_register, OP_G, OP_REG, CRC32_Fixup):
+ Conditionalize invocations of "USED_REX (0)".
+
+2020-07-14 Jan Beulich <jbeulich@suse.com>
+
+ * i386-dis.c (eBX, eCX, eDX, eSP, eBP, eSI, eDI, DL, BL, AH,
+ CH, DH, BH, AX, DX): Delete.
+ (OP_IMREG): Drop handling of eBX_reg, eCX_reg, eDX_reg, eSP_reg,
+ eBP_reg, eSI_reg, eDI_reg, dl_reg, bl_reg, ah_reg, ch_reg,
+ dh_reg, bh_reg, ax_reg, and dx_reg. Simplify what's left.
+
+2020-07-10 Lili Cui <lili.cui@intel.com>
+
+ * i386-dis.c (TMM): New.
+ (EXtmm): Likewise.
+ (VexTmm): Likewise.
+ (MVexSIBMEM): Likewise.
+ (tmm_mode): Likewise.
+ (vex_sibmem_mode): Likewise.
+ (REG_VEX_0F3849_X86_64_P_0_W_0_M_1): Likewise.
+ (MOD_VEX_0F3849_X86_64_P_0_W_0): Likewise.
+ (MOD_VEX_0F3849_X86_64_P_2_W_0): Likewise.
+ (MOD_VEX_0F3849_X86_64_P_3_W_0): Likewise.
+ (MOD_VEX_0F384B_X86_64_P_1_W_0): Likewise.
+ (MOD_VEX_0F384B_X86_64_P_2_W_0): Likewise.
+ (MOD_VEX_0F384B_X86_64_P_3_W_0): Likewise.
+ (MOD_VEX_0F385C_X86_64_P_1_W_0): Likewise.
+ (MOD_VEX_0F385E_X86_64_P_0_W_0): Likewise.
+ (MOD_VEX_0F385E_X86_64_P_1_W_0): Likewise.
+ (MOD_VEX_0F385E_X86_64_P_2_W_0): Likewise.
+ (MOD_VEX_0F385E_X86_64_P_3_W_0): Likewise.
+ (RM_VEX_0F3849_X86_64_P_0_W_0_M_1_R_0): Likewise.
+ (PREFIX_VEX_0F3849_X86_64): Likewise.
+ (PREFIX_VEX_0F384B_X86_64): Likewise.
+ (PREFIX_VEX_0F385C_X86_64): Likewise.
+ (PREFIX_VEX_0F385E_X86_64): Likewise.
+ (X86_64_VEX_0F3849): Likewise.
+ (X86_64_VEX_0F384B): Likewise.
+ (X86_64_VEX_0F385C): Likewise.
+ (X86_64_VEX_0F385E): Likewise.
+ (VEX_LEN_0F3849_X86_64_P_0_W_0_M_0): Likewise.
+ (VEX_LEN_0F3849_X86_64_P_0_W_0_M_1_REG_0_RM_0): Likewise.
+ (VEX_LEN_0F3849_X86_64_P_2_W_0_M_0): Likewise.
+ (VEX_LEN_0F3849_X86_64_P_3_W_0_M_0): Likewise.
+ (VEX_LEN_0F384B_X86_64_P_1_W_0_M_0): Likewise.
+ (VEX_LEN_0F384B_X86_64_P_2_W_0_M_0): Likewise.
+ (VEX_LEN_0F384B_X86_64_P_3_W_0_M_0): Likewise.
+ (VEX_LEN_0F385C_X86_64_P_1_W_0_M_0): Likewise.
+ (VEX_LEN_0F385E_X86_64_P_0_W_0_M_0): Likewise.
+ (VEX_LEN_0F385E_X86_64_P_1_W_0_M_0): Likewise.
+ (VEX_LEN_0F385E_X86_64_P_2_W_0_M_0): Likewise.
+ (VEX_LEN_0F385E_X86_64_P_3_W_0_M_0): Likewise.
+ (VEX_W_0F3849_X86_64_P_0): Likewise.
+ (VEX_W_0F3849_X86_64_P_2): Likewise.
+ (VEX_W_0F3849_X86_64_P_3): Likewise.
+ (VEX_W_0F384B_X86_64_P_1): Likewise.
+ (VEX_W_0F384B_X86_64_P_2): Likewise.
+ (VEX_W_0F384B_X86_64_P_3): Likewise.
+ (VEX_W_0F385C_X86_64_P_1): Likewise.
+ (VEX_W_0F385E_X86_64_P_0): Likewise.
+ (VEX_W_0F385E_X86_64_P_1): Likewise.
+ (VEX_W_0F385E_X86_64_P_2): Likewise.
+ (VEX_W_0F385E_X86_64_P_3): Likewise.
+ (names_tmm): Likewise.
+ (att_names_tmm): Likewise.
+ (intel_operand_size): Handle void_mode.
+ (OP_XMM): Handle tmm_mode.
+ (OP_EX): Likewise.
+ (OP_VEX): Likewise.
+ * i386-gen.c (cpu_flag_init): Add entries for CpuAMX_INT8,
+ CpuAMX_BF16 and CpuAMX_TILE.
+ (operand_type_shorthands): Add RegTMM.
+ (operand_type_init): Likewise.
+ (operand_types): Add Tmmword.
+ (cpu_flag_init): Add CPU_AMX_INT8, CpuAMX_BF16 and CpuAMX_TILE.
+ (cpu_flags): Add CpuAMX_INT8, CpuAMX_BF16 and CpuAMX_TILE.
+ * i386-opc.h (CpuAMX_INT8): New.
+ (CpuAMX_BF16): Likewise.
+ (CpuAMX_TILE): Likewise.
+ (SIBMEM): Likewise.
+ (Tmmword): Likewise.
+ (i386_cpu_flags): Add cpuamx_int8, cpuamx_bf16 and cpuamx_tile.
+ (i386_opcode_modifier): Extend width of fields vexvvvv and sib.
+ (i386_operand_type): Add tmmword.
+ * i386-opc.tbl: Add AMX instructions.
+ * i386-reg.tbl: Add AMX registers.
+ * i386-init.h: Regenerated.
+ * i386-tbl.h: Likewise.
+
+2020-07-08 Jan Beulich <jbeulich@suse.com>
+
+ * i386-dis.c (OP_LWPCB_E, OP_LWP_E): Delete.
+ (REG_XOP_LWPCB, REG_XOP_LWP, REG_XOP_TBM_01, REG_XOP_TBM_02):
+ Rename to ...
+ (REG_0FXOP_09_12_M_1_L_0, REG_0FXOP_0A_12_L_0,
+ REG_0FXOP_09_01_L_0, REG_0FXOP_09_02_L_0): ... these
+ respectively.
+ (MOD_VEX_0FXOP_09_12, VEX_LEN_0FXOP_08_85, VEX_LEN_0FXOP_08_86,
+ VEX_LEN_0FXOP_08_87, VEX_LEN_0FXOP_08_8E, VEX_LEN_0FXOP_08_8F,
+ VEX_LEN_0FXOP_08_95, VEX_LEN_0FXOP_08_96, VEX_LEN_0FXOP_08_97,
+ VEX_LEN_0FXOP_08_9E, VEX_LEN_0FXOP_08_9F, VEX_LEN_0FXOP_08_A3,
+ VEX_LEN_0FXOP_08_A6, VEX_LEN_0FXOP_08_B6, VEX_LEN_0FXOP_08_C0,
+ VEX_LEN_0FXOP_08_C1, VEX_LEN_0FXOP_08_C2, VEX_LEN_0FXOP_08_C3,
+ VEX_LEN_0FXOP_09_01, VEX_LEN_0FXOP_09_02, VEX_LEN_0FXOP_09_12_M_1,
+ VEX_LEN_0FXOP_09_90, VEX_LEN_0FXOP_09_91, VEX_LEN_0FXOP_09_92,
+ VEX_LEN_0FXOP_09_93, VEX_LEN_0FXOP_09_94, VEX_LEN_0FXOP_09_95,
+ VEX_LEN_0FXOP_09_96, VEX_LEN_0FXOP_09_97, VEX_LEN_0FXOP_09_98,
+ VEX_LEN_0FXOP_09_99, VEX_LEN_0FXOP_09_9A, VEX_LEN_0FXOP_09_9B,
+ VEX_LEN_0FXOP_09_C1, VEX_LEN_0FXOP_09_C2, VEX_LEN_0FXOP_09_C3,
+ VEX_LEN_0FXOP_09_C6, VEX_LEN_0FXOP_09_C7, VEX_LEN_0FXOP_09_CB,
+ VEX_LEN_0FXOP_09_D1, VEX_LEN_0FXOP_09_D2, VEX_LEN_0FXOP_09_D3,
+ VEX_LEN_0FXOP_09_D6, VEX_LEN_0FXOP_09_D7, VEX_LEN_0FXOP_09_DB,
+ VEX_LEN_0FXOP_09_E1, VEX_LEN_0FXOP_09_E2, VEX_LEN_0FXOP_09_E3,
+ VEX_LEN_0FXOP_0A_12, VEX_W_0FXOP_08_85_L_0,
+ VEX_W_0FXOP_08_86_L_0, VEX_W_0FXOP_08_87_L_0,
+ VEX_W_0FXOP_08_8E_L_0, VEX_W_0FXOP_08_8F_L_0,
+ VEX_W_0FXOP_08_95_L_0, VEX_W_0FXOP_08_96_L_0,
+ VEX_W_0FXOP_08_97_L_0, VEX_W_0FXOP_08_9E_L_0,
+ VEX_W_0FXOP_08_9F_L_0, VEX_W_0FXOP_08_A6_L_0,
+ VEX_W_0FXOP_08_B6_L_0, VEX_W_0FXOP_08_C0_L_0,
+ VEX_W_0FXOP_08_C1_L_0, VEX_W_0FXOP_08_C2_L_0,
+ VEX_W_0FXOP_08_C3_L_0, VEX_W_0FXOP_08_CC_L_0,
+ VEX_W_0FXOP_08_CD_L_0, VEX_W_0FXOP_08_CE_L_0,
+ VEX_W_0FXOP_08_CF_L_0, VEX_W_0FXOP_08_EC_L_0,
+ VEX_W_0FXOP_08_ED_L_0, VEX_W_0FXOP_08_EE_L_0,
+ VEX_W_0FXOP_08_EF_L_0, VEX_W_0FXOP_09_C1_L_0,
+ VEX_W_0FXOP_09_C2_L_0, VEX_W_0FXOP_09_C3_L_0,
+ VEX_W_0FXOP_09_C6_L_0, VEX_W_0FXOP_09_C7_L_0,
+ VEX_W_0FXOP_09_CB_L_0, VEX_W_0FXOP_09_D1_L_0,
+ VEX_W_0FXOP_09_D2_L_0, VEX_W_0FXOP_09_D3_L_0,
+ VEX_W_0FXOP_09_D6_L_0, VEX_W_0FXOP_09_D7_L_0,
+ VEX_W_0FXOP_09_DB_L_0, VEX_W_0FXOP_09_E1_L_0,
+ VEX_W_0FXOP_09_E2_L_0, VEX_W_0FXOP_09_E3_L_0): New enumerators.
+ (reg_table): Re-order XOP entries. Adjust their operands.
+ (xop_table): Replace 08_85, 08_86, 08_87, 08_8E, 08_8F, 08_95,
+ 08_96, 08_97, 08_9E, 08_9F, 08_A3, 08_A6, 08_B6, 08_C0, 08_C1,
+ 08_C2, 08_C3, 09_01, 09_02, 09_12, 09_90, 09_91, 09_92, 09_93,
+ 09_94, 09_95, 09_96, 09_97, 09_98, 09_99, 09_9A, 09_9B, 09_C1,
+ 09_C2, 09_C3, 09_C6, 09_C7, 09_CB, 09_D1, 09_D2, 09_D3, 09_D6,
+ 09_D7, 09_DB, 09_E1, 09_E2, 09_E3, and VEX_LEN_0FXOP_0A_12
+ entries by references ...
+ (vex_len_table): ... to resepctive new entries here. For several
+ new and existing entries reference ...
+ (vex_w_table): ... new entries here.
+ (mod_table): New MOD_VEX_0FXOP_09_12 entry.
+
+2020-07-08 Jan Beulich <jbeulich@suse.com>
+
+ * i386-dis.c (XMVexScalarI4): Define.
+ (VEX_LEN_0F3A6A_P_2, VEX_LEN_0F3A6B_P_2, VEX_LEN_0F3A6E_P_2,
+ VEX_LEN_0F3A6F_P_2, VEX_LEN_0F3A7A_P_2, VEX_LEN_0F3A7B_P_2,
+ VEX_LEN_0F3A7E_P_2, VEX_LEN_0F3A7F_P_2): Delete.
+ (vex_len_table): Move scalar FMA4 entries ...
+ (prefix_table): ... here.
+ (OP_REG_VexI4): Handle scalar_mode.
+ * i386-opc.tbl: Use VexLIG for scalar FMA4 insns.
+ * i386-tbl.h: Re-generate.
+
+2020-07-08 Jan Beulich <jbeulich@suse.com>
+
+ * i386-dis.c (OP_Vex_2src_1, OP_Vex_2src_2, Vex_2src_1,
+ Vex_2src_2): Delete.
+ (OP_VexW, VexW): New.
+ (xop_table): Use EXx for rotates by immediate. Use EXx and VexW
+ for shifts and rotates by register.
+
+2020-07-08 Jan Beulich <jbeulich@suse.com>
+
+ * i386-dis.c (OP_EX_VexImmW, OP_XMM_VexW, EXVexImmW, XMVexW,
+ VEX_W_0F3A48_P_2, VEX_W_0F3A49_P_2, vex_w_done, get_vex_imm8,
+ OP_EX_VexReg): Delete.
+ (OP_VexI4, VexI4): New.
+ (vex_w_table): Move vpermil2ps and vpermil2pd entries ...
+ (prefix_table): ... here.
+ (print_insn): Drop setting of vex_w_done.
+
+2020-07-08 Jan Beulich <jbeulich@suse.com>
+
+ * i386-dis.c (OP_EX_VexW, EXVexW, EXdVexW, EXqVexW): Delete.
+ (prefix_table, vex_len_table): Replace operands for FMA4 insns.
+ (xop_table): Replace operands of 4-operand insns.
+ (OP_REG_VexI4): Move VEX.W based operand swaping here.
+
+2020-07-07 Claudiu Zissulescu <claziss@synopsys.com>
+
+ * arc-opc.c (insert_rbd): New function.
+ (RBD): Define.
+ (RBDdup): Likewise.
+ * arc-tbl.h (vadd2, vadd4h, vmac2h, vmpy2h, vsub4h): Update
+ instructions.
+
+2020-07-07 Jan Beulich <jbeulich@suse.com>
+
+ * i386-dis.c (EVEX_W_0F3826_P_1, EVEX_W_0F3826_P_2,
+ EVEX_W_0F3828_P_1, EVEX_W_0F3829_P_1, EVEX_W_0F3854_P_2,
+ EVEX_W_0F3866_P_2, EVEX_W_0F3875_P_2, EVEX_W_0F387D_P_2,
+ EVEX_W_0F388D_P_2, EVEX_W_0F3A3E_P_2, EVEX_W_0F3A3F_P_2):
+ Delete.
+ (putop): Handle "BW".
+ * i386-dis-evex-w.h: Move entries for opcodes 0F3826, 0F3826,
+ 0F3828, 0F3829, 0F3854, 0F3866, 0F3875, 0F387D, 0F388D, 0F3A3E,
+ and 0F3A3F ...
+ * i386-dis-evex-prefix.h: ... here.
+
+2020-07-06 Jan Beulich <jbeulich@suse.com>
+
+ * i386-dis.c (VEX_LEN_0FXOP_09_80, VEX_LEN_0FXOP_09_81): Delete.
+ (VEX_LEN_0FXOP_09_82_W_0, VEX_LEN_0FXOP_09_83_W_0,
+ VEX_W_0FXOP_09_80, VEX_W_0FXOP_09_81, VEX_W_0FXOP_09_82,
+ VEX_W_0FXOP_09_83): New enumerators.
+ (xop_table): Reference the above.
+ (vex_len_table): Replace vfrczp* entries by vfrczs* ones.
+ (vex_w_table): New VEX_W_0FXOP_09_80, VEX_W_0FXOP_09_81,
+ VEX_W_0FXOP_09_82, and VEX_W_0FXOP_09_83 entries.
+ (get_valid_dis386): Return bad_opcode for XOP.PP != 0.
+
+2020-07-06 Jan Beulich <jbeulich@suse.com>
+
+ * i386-dis.c (EVEX_W_0F3838_P_1,
+ EVEX_W_0F3839_P_1, EVEX_W_0F3840_P_2, EVEX_W_0F3855_P_2,
+ EVEX_W_0F3868_P_3, EVEX_W_0F3871_P_2, EVEX_W_0F3873_P_2,
+ EVEX_W_0F3A50_P_2, EVEX_W_0F3A51_P_2, EVEX_W_0F3A56_P_2,
+ EVEX_W_0F3A57_P_2, EVEX_W_0F3A66_P_2, EVEX_W_0F3A67_P_2,
+ EVEX_W_0F3A71_P_2, EVEX_W_0F3A73_P_2): Delete.
+ (putop): Centralize management of last[]. Delete SAVE_LAST.
+ * i386-dis-evex-w.h: Move entries for opcodes 0F3838, 0F3839,
+ 0F3840, 0F3855, 0F3868, 0F3871, 0F3873, 0F3A50, 0F3A51, 0F3A56,
+ 0F3A57, 0F3A66, 0F3A67, 0F3A71, and 0F3A73 ...
+ * i386-dis-evex-prefix.h: here.
+
+2020-07-06 Jan Beulich <jbeulich@suse.com>
+
+ * i386-dis.c (MOD_EVEX_0F381A_P_2_W_0, MOD_EVEX_0F381A_P_2_W_1,
+ MOD_EVEX_0F381B_P_2_W_0, MOD_EVEX_0F381B_P_2_W_1,
+ MOD_EVEX_0F385A_P_2_W_0, MOD_EVEX_0F385A_P_2_W_1,
+ MOD_EVEX_0F385B_P_2_W_0, MOD_EVEX_0F385B_P_2_W_1): New
+ enumerators.
+ (EVEX_LEN_0F381A_P_2_W_0, EVEX_LEN_0F381A_P_2_W_1,
+ EVEX_LEN_0F381B_P_2_W_0, EVEX_LEN_0F381B_P_2_W_1,
+ EVEX_LEN_0F385A_P_2_W_0, EVEX_LEN_0F385A_P_2_W_1,
+ EVEX_LEN_0F385B_P_2_W_0, EVEX_LEN_0F385B_P_2_W_1): Rename to ...
+ (EVEX_LEN_0F381A_P_2_W_0_M_0, EVEX_LEN_0F381A_P_2_W_1_M_0,
+ EVEX_LEN_0F381B_P_2_W_0_M_0, EVEX_LEN_0F381B_P_2_W_1_M_0,
+ EVEX_LEN_0F385A_P_2_W_0_M_0, EVEX_LEN_0F385A_P_2_W_1_M_0,
+ EVEX_LEN_0F385B_P_2_W_0_M_0, EVEX_LEN_0F385B_P_2_W_1_M_0): ...
+ these, respectively.
+ * i386-dis-evex-len.h: Adjust comments.
+ * i386-dis-evex-mod.h: New MOD_EVEX_0F381A_P_2_W_0,
+ MOD_EVEX_0F381A_P_2_W_1, MOD_EVEX_0F381B_P_2_W_0,
+ MOD_EVEX_0F381B_P_2_W_1, MOD_EVEX_0F385A_P_2_W_0,
+ MOD_EVEX_0F385A_P_2_W_1, MOD_EVEX_0F385B_P_2_W_0, and
+ MOD_EVEX_0F385B_P_2_W_1 table entries.
+ * i386-dis-evex-w.h: Reference mod_table[] for
+ EVEX_W_0F381A_P_2, EVEX_W_0F381B_P_2, EVEX_W_0F385A_P_2, and
+ EVEX_W_0F385B_P_2.
+
+2020-07-06 Jan Beulich <jbeulich@suse.com>
+
+ * i386-dis-evex-len.h (vbroadcastf32x8, vbroadcasti32x8,
+ vinsertf32x8, vinsertf64x4, vextractf32x8, vextractf64x4): Use
+ EXymm.
+ (vinserti32x8, vinserti64x4, vextracti32x8, vextracti64x4):
+ Likewise. Mark 256-bit entries invalid.
+
+2020-07-06 Jan Beulich <jbeulich@suse.com>
+
+ * i386-dis.c (PREFIX_EVEX_0F62, PREFIX_EVEX_0F6A,
+ PREFIX_EVEX_0F6B, PREFIX_EVEX_0F6C, PREFIX_EVEX_0F6D,
+ PREFIX_EVEX_0FD2, PREFIX_EVEX_0FD3, PREFIX_EVEX_0FD4,
+ PREFIX_EVEX_0FF2, PREFIX_EVEX_0FF3, PREFIX_EVEX_0FF4,
+ PREFIX_EVEX_0FFA, PREFIX_EVEX_0FFB, PREFIX_EVEX_0FFE,
+ PREFIX_EVEX_0F382B): Delete.
+ (EVEX_W_0F62_P_2, EVEX_W_0F6A_P_2, EVEX_W_0F6B_P_2,
+ EVEX_W_0F6C_P_2, EVEX_W_0F6D_P_2, EVEX_W_0FD2_P_2,
+ EVEX_W_0FD3_P_2, EVEX_W_0FD4_P_2, EVEX_W_0FF2_P_2,
+ EVEX_W_0FF3_P_2, EVEX_W_0FF4_P_2, EVEX_W_0FFA_P_2,
+ EVEX_W_0FFB_P_2, EVEX_W_0FFE_P_2, EVEX_W_0F382B_P_2): Rename
+ to ...
+ (EVEX_W_0F62, EVEX_W_0F6A, EVEX_W_0F6B, EVEX_W_0F6C,
+ EVEX_W_0F6D, EVEX_W_0FD2, EVEX_W_0FD3, EVEX_W_0FD4,
+ EVEX_W_0FF2, EVEX_W_0FF3, EVEX_W_0FF4, EVEX_W_0FFA,
+ EVEX_W_0FFB, EVEX_W_0FFE, EVEX_W_0F382B): ... these
+ respectively.
+ * i386-dis-evex.h (evex_table): Reference VEX_W table entries
+ for opcodes 0F62, 0F6A, 0F6B, 0F6C, 0F6D, 0FD2, 0FD3, 0FD4,
+ 0FF2, 0FF3, 0FF4, 0FFA, 0FFB, 0FFE, 0F382B.
+ * i386-dis-evex-prefix.h (PREFIX_EVEX_0F62, PREFIX_EVEX_0F6A,
+ PREFIX_EVEX_0F6B, PREFIX_EVEX_0F6C, PREFIX_EVEX_0F6D,
+ PREFIX_EVEX_0FD2, PREFIX_EVEX_0FD3, PREFIX_EVEX_0FD4,
+ PREFIX_EVEX_0FF2, PREFIX_EVEX_0FF3, PREFIX_EVEX_0FF4,
+ PREFIX_EVEX_0FFA, PREFIX_EVEX_0FFB, PREFIX_EVEX_0FFE,
+ PREFIX_EVEX_0F382B): Remove table entries.
+ * i386-dis-evex-w.h: Reference VEX table entries for opcodes
+ 0F62, 0F6A, 0F6B, 0F6C, 0F6D, 0FD2, 0FD3, 0FD4, 0FF2, 0FF3,
+ 0FF4, 0FFA, 0FFB, 0FFE, 0F382B.
+
2020-07-06 Jan Beulich <jbeulich@suse.com>
* i386-dis.c (EVEX_LEN_0F3816_P_2, EVEX_LEN_0F3836_P_2,
projects / deliverable / binutils-gdb.git / blobdiff