+2005-02-07 Jim Blandy <jimb@redhat.com>
+
+ * Makefile.am (CGEN): Load guile.scm before calling the main
+ application script.
+ * Makefile.in: Regenerated.
+ * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
+ Simply pass the cgen-opc.scm path to ${cgen} as its first
+ argument; ${cgen} itself now contains the '-s', or whatever is
+ appropriate for the Scheme being used.
+
+2005-01-31 Andrew Cagney <cagney@gnu.org>
+
+ * configure: Regenerate to track ../gettext.m4.
+
+2005-01-31 Jan Beulich <jbeulich@novell.com>
+
+ * ia64-gen.c (NELEMS): Define.
+ (shrink): Generate alias with missing second predicate register when
+ opcode has two outputs and these are both predicates.
+ * ia64-opc-i.c (FULL17): Define.
+ (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
+ here to generate output template.
+ (TBITCM, TNATCM): Undefine after use.
+ * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
+ first input. Add ld16 aliases without ar.csd as second output. Add
+ st16 aliases without ar.csd as second input. Add cmpxchg aliases
+ without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
+ ar.ccv as third/fourth inputs. Consolidate through...
+ (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
+ CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
+ * ia64-asmtab.c: Regenerate.
+
+2005-01-27 Andrew Cagney <cagney@gnu.org>
+
+ * configure: Regenerate to track ../gettext.m4 change.
+
+2005-01-25 Alexandre Oliva <aoliva@redhat.com>
+
+ 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
+ * frv-asm.c: Rebuilt.
+ * frv-desc.c: Rebuilt.
+ * frv-desc.h: Rebuilt.
+ * frv-dis.c: Rebuilt.
+ * frv-ibld.c: Rebuilt.
+ * frv-opc.c: Rebuilt.
+ * frv-opc.h: Rebuilt.
+
+2005-01-24 Andrew Cagney <cagney@gnu.org>
+
+ * configure: Regenerate, ../gettext.m4 was updated.
+
+2005-01-21 Fred Fish <fnf@specifixinc.com>
+
+ * mips-opc.c: Change INSN_ALIAS to INSN2_ALIAS.
+ Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
+ Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
+ * mips-dis.c: Ditto.
+
+2005-01-20 Alan Modra <amodra@bigpond.net.au>
+
+ * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
+
+2005-01-19 Fred Fish <fnf@specifixinc.com>
+
+ * mips-dis.c (no_aliases): New disassembly option flag.
+ (set_default_mips_dis_options): Init no_aliases to zero.
+ (parse_mips_dis_option): Handle no-aliases option.
+ (print_insn_mips): Ignore table entries that are aliases
+ if no_aliases is set.
+ (print_insn_mips16): Ditto.
+ * mips-opc.c (mips_builtin_opcodes): Add initializer column for
+ new pinfo2 member and add INSN_ALIAS initializers as needed. Also
+ move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
+ * mips16-opc.c (mips16_opcodes): Ditto.
+
+2005-01-17 Andrew Stubbs <andrew.stubbs@st.com>
+
+ * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
+ (inheritance diagram): Add missing edge.
+ (arch_sh1_up): Rename arch_sh_up to match external name to make life
+ easier for the testsuite.
+ (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
+ (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
+ (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
+ arch_sh2a_or_sh4_up child.
+ (sh_table): Do renaming as above.
+ Correct comment for ldc.l for gas testsuite to read.
+ Remove rogue mul.l from sh1 (duplicate of the one for sh2).
+ Correct comments for movy.w and movy.l for gas testsuite to read.
+ Correct comments for fmov.d and fmov.s for gas testsuite to read.
+
+2005-01-12 H.J. Lu <hongjiu.lu@intel.com>
+
+ * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
+
+2005-01-12 H.J. Lu <hongjiu.lu@intel.com>
+
+ * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
+
+2005-01-10 Andreas Schwab <schwab@suse.de>
+
+ * disassemble.c (disassemble_init_for_target) <case
+ bfd_arch_ia64>: Set skip_zeroes to 16.
+ <case bfd_arch_tic4x>: Set skip_zeroes to 32.
+
+2004-12-23 Tomer Levi <Tomer.Levi@nsc.com>
+
+ * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
+
+2004-12-14 Svein E. Seldal <Svein.Seldal@solidas.com>
+
+ * avr-dis.c: Prettyprint. Added printing of symbol names in all
+ memory references. Convert avr_operand() to C90 formatting.
+
+2004-12-05 Tomer Levi <Tomer.Levi@nsc.com>
+
+ * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
+
+2004-11-29 Tomer Levi <Tomer.Levi@nsc.com>
+
+ * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
+ (no_op_insn): Initialize array with instructions that have no
+ operands.
+ * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
+
+2004-11-29 Richard Earnshaw <rearnsha@arm.com>
+
+ * arm-dis.c: Correct top-level comment.
+
+2004-11-27 Richard Earnshaw <rearnsha@arm.com>
+
+ * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
+ architecuture defining the insn.
+ (arm_opcodes, thumb_opcodes): Delete. Move to ...
+ * arm-dis.c (arm_opcodes, thumb_opcodes): Here. Add architecutre
+ field.
+ Also include opcode/arm.h.
+ * Makefile.am (arm-dis.lo): Update dependency list.
+ * Makefile.in: Regenerate.
+
+2004-11-22 Ravi Ramaseshan <ravi.ramaseshan@codito.com>
+
+ * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
+ reflect the change to the short immediate syntax.
+
+2004-11-19 Alan Modra <amodra@bigpond.net.au>
+
+ * or32-opc.c (debug): Warning fix.
+ * po/POTFILES.in: Regenerate.
+
+ * maxq-dis.c: Formatting.
+ (print_insn): Warning fix.
+
+2004-11-17 Daniel Jacobowitz <dan@codesourcery.com>
+
+ * arm-dis.c (WORD_ADDRESS): Define.
+ (print_insn): Use it. Correct big-endian end-of-section handling.
+
+2004-11-08 Inderpreet Singh <inderpreetb@nioda.hcltech.com>
+ Vineet Sharma <vineets@noida.hcltech.com>
+
+ * maxq-dis.c: New file.
+ * disassemble.c (ARCH_maxq): Define.
+ (disassembler): Add 'print_insn_maxq_little' for handling maxq
+ instructions..
+ * configure.in: Add case for bfd_maxq_arch.
+ * configure: Regenerate.
+ * Makefile.am: Add support for maxq-dis.c
+ * Makefile.in: Regenerate.
+ * aclocal.m4: Regenerate.
+
+2004-11-05 Tomer Levi <Tomer.Levi@nsc.com>
+
+ * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
+ mode.
+ * crx-dis.c: Likewise.
+
2004-11-04 Hans-Peter Nilsson <hp@axis.com>
Generally, handle CRISv32.
projects / deliverable / binutils-gdb.git / blobdiff