+2009-03-01 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
+
+ * configure: Regenerate.
+
+2009-02-27 H.J. Lu <hongjiu.lu@intel.com>
+
+ * i386-dis.c (OP_EX): Call OP_E_memory instead of OP_E.
+
+2009-02-26 Peter Bergner <bergner@vnet.ibm.com>
+
+ * ppc-dis.c (powerpc_init_dialect): Extend -Mpower7 to disassemble
+ the power7 and the isel instructions.
+ * ppc-opc.c (insert_xc6, extract_xc6): New static functions.
+ (insert_dm, extract_dm): Likewise.
+ (XB6): Update comment to include XX2 form.
+ (WC, XC6, SHW, DMEX, UIM, XX2, XX3RC, XX4, XX2_MASK, XX2UIM_MASK,
+ XX2BF_MASK, XX3BF_MASK, XX3SHW_MASK, XX4_MASK, XWC_MASK, POWER7): New.
+ (RemoveXX3DM): Delete.
+ (powerpc_opcodes): <"lfdp", "lfdpx", "mcrxr", "mftb", "mffgpr",
+ "mftgpr">: Deprecate for POWER7.
+ <"fres", "fres.", "frsqrtes", "frsqrtes.", "fre", "fre.", "frsqrte",
+ "frsqrte.">: Deprecate the three operand form and enable the two
+ operand form for POWER7 and later.
+ <"wait">: Extend to accept optional parameter. Enable for POWER7.
+ <"waitsrv", "waitimpl">: Add extended opcodes.
+ <"ldbrx", "stdbrx">: Enable for POWER7.
+ <"cdtbcd", "cbcdtd", "addg6s">: Add POWER6 opcodes.
+ <"bpermd", "dcbtstt", "dcbtt", "dcffix.", "dcffix", "divde.", "divde",
+ "divdeo.", "divdeo", "divdeu.", "divdeu", "divdeuo.", "divdeuo",
+ "divwe.", "divwe", "divweo.", "divweo", "divweu.", "divweu", "divweuo.",
+ "divweuo", "fcfids.", "fcfids", "fcfidu.", "fcfidu", "fcfidus.",
+ "fcfidus", "fctidu.", "fctidu", "fctiduz.", "fctiduz", "fctiwu.",
+ "fctiwu", "fctiwuz.", "fctiwuz", "ftdiv", "ftsqrt", "lbarx", "lfiwzx",
+ "lharx", "popcntd", "popcntw", "stbcx.", "sthcx.">: Add POWER7 opcodes.
+ <"lxsdux", "lxsdx", "lxvdsx", "lxvw4ux", "lxvw4x", "stxsdux", "stxsdx",
+ "stxvw4ux", "stxvw4x", "xsabsdp", "xsadddp", "xscmpodp", "xscmpudp",
+ "xscpsgndp", "xscvdpsp", "xscvdpsxds", "xscvdpsxws", "xscvdpuxds",
+ "xscvdpuxws", "xscvspdp", "xscvsxddp", "xscvuxddp", "xsdivdp",
+ "xsmaddadp", "xsmaddmdp", "xsmaxdp", "xsmindp", "xsmsubadp",
+ "xsmsubmdp", "xsmuldp", "xsnabsdp", "xsnegdp", "xsnmaddadp",
+ "xsnmaddmdp", "xsnmsubadp", "xsnmsubmdp", "xsrdpi", "xsrdpic",
+ "xsrdpim", "xsrdpip", "xsrdpiz", "xsredp", "xsrsqrtedp", "xssqrtdp",
+ "xssubdp", "xstdivdp", "xstsqrtdp", "xvabsdp", "xvabssp", "xvadddp",
+ "xvaddsp", "xvcmpeqdp.", "xvcmpeqdp", "xvcmpeqsp.", "xvcmpeqsp",
+ "xvcmpgedp.", "xvcmpgedp", "xvcmpgesp.", "xvcmpgesp", "xvcmpgtdp.",
+ "xvcmpgtdp", "xvcmpgtsp.", "xvcmpgtsp", "xvcpsgnsp", "xvcvdpsp",
+ "xvcvdpsxds", "xvcvdpsxws", "xvcvdpuxds", "xvcvdpuxws", "xvcvspdp",
+ "xvcvspsxds", "xvcvspsxws", "xvcvspuxds", "xvcvspuxws", "xvcvsxddp",
+ "xvcvsxdsp", "xvcvsxwdp", "xvcvsxwsp", "xvcvuxddp", "xvcvuxdsp",
+ "xvcvuxwdp", "xvcvuxwsp", "xvdivdp", "xvdivsp", "xvmaddadp",
+ "xvmaddasp", "xvmaddmdp", "xvmaddmsp", "xvmaxdp", "xvmaxsp",
+ "xvmindp", "xvminsp", "xvmovsp", "xvmsubadp", "xvmsubasp", "xvmsubmdp",
+ "xvmsubmsp", "xvmuldp", "xvmulsp", "xvnabsdp", "xvnabssp", "xvnegdp",
+ "xvnegsp", "xvnmaddadp", "xvnmaddasp", "xvnmaddmdp", "xvnmaddmsp",
+ "xvnmsubadp", "xvnmsubasp", "xvnmsubmdp", "xvnmsubmsp", "xvrdpi",
+ "xvrdpic", "xvrdpim", "xvrdpip", "xvrdpiz", "xvredp", "xvresp",
+ "xvrspi", "xvrspic", "xvrspim", "xvrspip", "xvrspiz", "xvrsqrtedp",
+ "xvrsqrtesp", "xvsqrtdp", "xvsqrtsp", "xvsubdp", "xvsubsp", "xvtdivdp",
+ "xvtdivsp", "xvtsqrtdp", "xvtsqrtsp", "xxland", "xxlandc", "xxlnor",
+ "xxlor", "xxlxor", "xxmrghw", "xxmrglw", "xxsel", "xxsldwi", "xxspltd",
+ "xxspltw", "xxswapd">: Add VSX opcodes.
+
+2009-02-23 H.J. Lu <hongjiu.lu@intel.com>
+
+ * i386-gen.c (operand_type_init): Remove OPERAND_TYPE_VEX_IMM4.
+ (operand_types): Remove Vex_Imm4.
+
+ * i386-opc.h (Vex_Imm4): Removed.
+ (OTMax): Updated.
+ (i386_operand_type): Remove vex_imm4.
+
+ * i386-opc.tbl: Remove Vex_Imm4 comments.
+ * i386-init.h: Regenerated.
+ * i386-tbl.h: Likewise.
+
+2009-02-23 Richard Earnshaw <rearnsha@arm.com>
+
+ * arm-dis.c (neon_opcodes): Correct bit-mask and patterns for
+ vq{r}shr{u}n.s64 insnstructions.
+
+2009-02-19 Peter Bergner <bergner@vnet.ibm.com>
+
+ * ppc-opc.c (powerpc_opcodes) <"lfdepx", "stfdepx">: Fix the first
+ operand to be a float point register (FRT/FRS).
+
+2009-02-18 Adam Nemet <anemet@caviumnetworks.com>
+
+ * mips-opc.c (mips_builtin_opcodes): Move the Octeon-specific
+ dmfc2 and dmtc2 before the architecture-level variants.
+
+2009-02-18 Pierre Muller <muller@ics.u-strasbg.fr>
+
+ * fr30-opc.c: Regenerate.
+ * frv-opc.c: Regenerate.
+ * ip2k-opc.c: Regenerate.
+ * iq2000-opc.c: Regenerate.
+ * lm32-opc.c: Regenerate.
+ * m32c-opc.c: Regenerate.
+ * m32r-opc.c: Regenerate.
+ * mep-opc.c: Regenerate.
+ * mt-opc.c: Regenerate.
+ * xc16x-opc.c: Regenerate.
+ * xstormy16-opc.c: Regenerate.
+ * tic54x-dis.c (print_instruction): Avoid compiler warning on
+ sprintf call.
+
+2009-02-12 Nathan Sidwell <nathan@codesourcery.com>
+
+ * m68k-opc.c (m68k_opcodes): Add stldsr instruction.
+
2009-02-05 Peter Bergner <bergner@vnet.ibm.com>
* ppc-opc.c: Update copyright year.
projects / deliverable / binutils-gdb.git / blobdiff