2009-11-17 Quentin Neill <quentin.neill@amd.com>

[deliverable/binutils-gdb.git] / opcodes / ChangeLog

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 63ad8de0977d13549d6b9408712afe382e5dff97..82c6e01d6d3493267218896e9576292526b4e863 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,97 @@
+2009-11-17  Quentin Neill  <quentin.neill@amd.com>
+           Sebastian Pop  <sebastian.pop@amd.com>
+
+       * i386-dis.c (get_vex_imm8): Increase bytes_before_imm when
+       decoding the second source operand from the immediate byte.
+       (OP_EX_VexW): Pass an extra integer to identify the second
+       and third source arguments.
+
+2009-11-19  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * i386-opc.tbl: Add IsLockable to cmpxch16b.
+       * i386-tbl.h: Regenerated.
+
+2009-11-19  Nick Clifton  <nickc@redhat.com>
+
+       PR binutils/10924
+       * arm-dis.c (print_insn_arm): Do not print an offset of zero when
+       decoding Immediaate Offset addressing.
+
+2009-11-18  Sebastian Pop  <sebastian.pop@amd.com>
+
+       PR binutils/10973
+       * i386-dis.c (get_vex_imm8): Do not increment codep.
+       Avoid incrementing bytes_before_imm when OP_E_memory
+       has already forwarded the codep pointer.
+       (OP_EX_VexW): Increment codep to skip mod/rm byte.
+
+2009-11-18  Sebastian Pop  <sebastian.pop@amd.com>
+
+       * i386-dis.c (VEX_LEN_XOP_08_A0): Removed.
+       (VEX_LEN_XOP_08_A1): Removed.
+       (xop_table): Remove entries for VEX_LEN_XOP_08_A0 and
+       VEX_LEN_XOP_08_A1.
+       (vex_len_table): Same.
+       * i386-gen.c (CPU_CVT16_FLAGS): Removed.
+       (cpu_flags): Remove field for CpuCVT16.
+       * i386-opc.h (CpuCVT16): Removed.
+       (i386_cpu_flags): Remove bitfield cpucvt16.
+       (i386-opc.tbl): Remove CVT16 instructions.
+       * i386-init.h: Regenerated.
+       * i386-tbl.h: Regenerated.
+
+2009-11-17  Sebastian Pop  <sebastian.pop@amd.com>
+           Quentin Neill  <quentin.neill@amd.com>
+
+       * i386-dis.c (OP_Vex_2src_1): New.
+       (OP_Vex_2src_2): New.
+       (Vex_2src_1): New.
+       (Vex_2src_2): New.
+       (XOP_08): Added.
+       (VEX_LEN_XOP_08_A0): Added.
+       (VEX_LEN_XOP_08_A1): Added.
+       (VEX_LEN_XOP_09_80): Added.
+       (VEX_LEN_XOP_09_81): Added.
+       (xop_table): Added an entry for XOP_08.  Handle xop instructions.
+       (vex_len_table): Added entries for VEX_LEN_XOP_08_A0,
+       VEX_LEN_XOP_08_A1, VEX_LEN_XOP_09_80, VEX_LEN_XOP_09_81.
+       (get_valid_dis386): Handle XOP_08.
+       (OP_Vex_2src): New.
+       * i386-gen.c (cpu_flag_init): Add CPU_XOP_FLAGS and CPU_CVT16_FLAGS.
+       (cpu_flags): Add CpuXOP and CpuCVT16.
+       (opcode_modifiers): Add XOP08, Vex2Sources.
+       * i386-opc.h (CpuXOP): Added.
+       (CpuCVT16): Added.
+       (i386_cpu_flags): Add cpuxop and cpucvt16.
+       (XOP08): Added.
+       (Vex2Sources): Added.
+       (i386_opcode_modifier): Add xop08, vex2sources.
+       * i386-opc.tbl: Add entries for XOP and CVT16 instructions.
+       * i386-init.h: Regenerated.
+       * i386-tbl.h: Regenerated.
+
+2009-11-17  Nick Clifton  <nickc@redhat.com>
+
+       PR binutils/10924
+       * arm-dis.c (arm_opcodes): Add patterns to match undefined LDRB
+       instruction variants.  Add pattern for MRS variant that was being
+       confused with CMP.
+       (arm_decode_shift): Place error message in a comment.
+       (print_insn_arm): Note that writing back to the PC is
+       unpredictable.
+       Only print 'p' variants of cmp/cmn/teq/tst instructions if
+       decoding for pre-V6 architectures.
+
+2009-11-17  Edward Nevill <edward.nevill@arm.com>
+
+       * arm-dis.c (print_insn_thumb32): Handle undefined instruction.
+
+2009-11-14  Doug Evans  <dje@sebabeach.org>
+
+       * Makefile.am (stamp-xc16x): Use ../cpu/xc16x.cpu instead of
+       ../cgen/cpu.
+       * Makefile.in: Regenerate.
+
 2009-11-13  H.J. Lu  <hongjiu.lu@intel.com>
 
        * i386-dis.c (OP_E_extended): Removed.