+2009-11-17 Quentin Neill <quentin.neill@amd.com>
+ Sebastian Pop <sebastian.pop@amd.com>
+
+ * i386-dis.c (get_vex_imm8): Increase bytes_before_imm when
+ decoding the second source operand from the immediate byte.
+ (OP_EX_VexW): Pass an extra integer to identify the second
+ and third source arguments.
+
+2009-11-19 H.J. Lu <hongjiu.lu@intel.com>
+
+ * i386-opc.tbl: Add IsLockable to cmpxch16b.
+ * i386-tbl.h: Regenerated.
+
+2009-11-19 Nick Clifton <nickc@redhat.com>
+
+ PR binutils/10924
+ * arm-dis.c (print_insn_arm): Do not print an offset of zero when
+ decoding Immediaate Offset addressing.
+
+2009-11-18 Sebastian Pop <sebastian.pop@amd.com>
+
+ PR binutils/10973
+ * i386-dis.c (get_vex_imm8): Do not increment codep.
+ Avoid incrementing bytes_before_imm when OP_E_memory
+ has already forwarded the codep pointer.
+ (OP_EX_VexW): Increment codep to skip mod/rm byte.
+
+2009-11-18 Sebastian Pop <sebastian.pop@amd.com>
+
+ * i386-dis.c (VEX_LEN_XOP_08_A0): Removed.
+ (VEX_LEN_XOP_08_A1): Removed.
+ (xop_table): Remove entries for VEX_LEN_XOP_08_A0 and
+ VEX_LEN_XOP_08_A1.
+ (vex_len_table): Same.
+ * i386-gen.c (CPU_CVT16_FLAGS): Removed.
+ (cpu_flags): Remove field for CpuCVT16.
+ * i386-opc.h (CpuCVT16): Removed.
+ (i386_cpu_flags): Remove bitfield cpucvt16.
+ (i386-opc.tbl): Remove CVT16 instructions.
+ * i386-init.h: Regenerated.
+ * i386-tbl.h: Regenerated.
+
+2009-11-17 Sebastian Pop <sebastian.pop@amd.com>
+ Quentin Neill <quentin.neill@amd.com>
+
+ * i386-dis.c (OP_Vex_2src_1): New.
+ (OP_Vex_2src_2): New.
+ (Vex_2src_1): New.
+ (Vex_2src_2): New.
+ (XOP_08): Added.
+ (VEX_LEN_XOP_08_A0): Added.
+ (VEX_LEN_XOP_08_A1): Added.
+ (VEX_LEN_XOP_09_80): Added.
+ (VEX_LEN_XOP_09_81): Added.
+ (xop_table): Added an entry for XOP_08. Handle xop instructions.
+ (vex_len_table): Added entries for VEX_LEN_XOP_08_A0,
+ VEX_LEN_XOP_08_A1, VEX_LEN_XOP_09_80, VEX_LEN_XOP_09_81.
+ (get_valid_dis386): Handle XOP_08.
+ (OP_Vex_2src): New.
+ * i386-gen.c (cpu_flag_init): Add CPU_XOP_FLAGS and CPU_CVT16_FLAGS.
+ (cpu_flags): Add CpuXOP and CpuCVT16.
+ (opcode_modifiers): Add XOP08, Vex2Sources.
+ * i386-opc.h (CpuXOP): Added.
+ (CpuCVT16): Added.
+ (i386_cpu_flags): Add cpuxop and cpucvt16.
+ (XOP08): Added.
+ (Vex2Sources): Added.
+ (i386_opcode_modifier): Add xop08, vex2sources.
+ * i386-opc.tbl: Add entries for XOP and CVT16 instructions.
+ * i386-init.h: Regenerated.
+ * i386-tbl.h: Regenerated.
+
+2009-11-17 Nick Clifton <nickc@redhat.com>
+
+ PR binutils/10924
+ * arm-dis.c (arm_opcodes): Add patterns to match undefined LDRB
+ instruction variants. Add pattern for MRS variant that was being
+ confused with CMP.
+ (arm_decode_shift): Place error message in a comment.
+ (print_insn_arm): Note that writing back to the PC is
+ unpredictable.
+ Only print 'p' variants of cmp/cmn/teq/tst instructions if
+ decoding for pre-V6 architectures.
+
+2009-11-17 Edward Nevill <edward.nevill@arm.com>
+
+ * arm-dis.c (print_insn_thumb32): Handle undefined instruction.
+
+2009-11-14 Doug Evans <dje@sebabeach.org>
+
+ * Makefile.am (stamp-xc16x): Use ../cpu/xc16x.cpu instead of
+ ../cgen/cpu.
+ * Makefile.in: Regenerate.
+
+2009-11-13 H.J. Lu <hongjiu.lu@intel.com>
+
+ * i386-dis.c (OP_E_extended): Removed.
+
+2009-11-13 H.J. Lu <hongjiu.lu@intel.com>
+
+ * i386-dis.c (print_insn): Check rex_ignored.
+
+2009-11-13 H.J. Lu <hongjiu.lu@intel.com>
+
+ * i386-dis.c (ckprefix): Updated to return 0 if number of
+ prefixes > 14 and record the last position for each prefix.
+ (lock_prefix): Removed.
+ (data_prefix): Likewise.
+ (addr_prefix): Likewise.
+ (repz_prefix): Likewise.
+ (repnz_prefix): Likewise.
+ (last_lock_prefix): New.
+ (last_repz_prefix): Likewise.
+ (last_repnz_prefix): Likewise.
+ (last_data_prefix): Likewise.
+ (last_addr_prefix): Likewise.
+ (last_rex_prefix): Likewise.
+ (last_seg_prefix): Likewise.
+ (MAX_CODE_LENGTH): Likewise.
+ (ADDR16_PREFIX): Likewise.
+ (ADDR32_PREFIX): Likewise.
+ (DATA16_PREFIX): Likewise.
+ (DATA32_PREFIX): Likewise.
+ (REP_PREFIX): Likewise.
+ (seg_prefix): Likewise.
+ (all_prefixes): Change size to MAX_CODE_LENGTH - 1.
+ (prefix_name): Handle ADDR16_PREFIX, ADDR32_PREFIX,
+ DATA16_PREFIX, DATA32_PREFIX and REP_PREFIX.
+ (get_valid_dis386): Updated.
+ (OP_C): Likewise.
+ (OP_Monitor): Likewise.
+ (REP_Fixup): Likewise.
+ (print_insn): Display all prefixes.
+ (putop): Set PREFIX_DATA on used_prefixes only if it is used.
+ (intel_operand_size): Likewise.
+ (OP_E_register): Likewise.
+ (OP_G): Likewise.
+ (OP_REG): Likewise.
+ (OP_IMREG): Likewise.
+ (OP_I): Likewise.
+ (OP_I64): Likewise.
+ (OP_sI): Likewise.
+ (CRC32_Fixup): Likewise.
+ (MOVBE_Fixup): Likewise.
+ (OP_E_memory): Set REFIX_DATA on used_prefixes when it is used
+ in 16bit mode.
+ (OP_J): Set REX_W used if it is used. Set PREFIX_DATA on
+ used_prefixes only if it is used.
+
+2009-11-12 H.J. Lu <hongjiu.lu@intel.com>
+
+ * i386-opc.tbl: Remove IsLockable from add, adc, and, dec, inc,
+ or, sbb, sub, xor and xchg with register only operands.
+ * i386-tbl.h: Regenerated.
+
+2009-11-12 H.J. Lu <hongjiu.lu@intel.com>
+
+ * i386-gen.c (opcode_modifiers): Add IsLockable.
+
+ * i386-opc.h (IsLockable): New.
+ (i386_opcode_modifier): Add islockable.
+
+ * i386-opc.tbl: Add IsLockable to add, adc, and, btc, btr,
+ bts, cmpxchg, cmpxch8b, dec, inc, neg, not, or, sbb, sub,
+ xor, xadd and xchg.
+ * i386-tbl.h: Regenerated.
+
+2009-11-12 Daniel Jacobowitz <dan@codesourcery.com>
+
+ * arm-dis.c (coprocessor_opcodes): Use %A instead of %C. Remove
+ generic coprocessor instructions for FPA loads and stores.
+ (print_insn_coprocessor): Remove %C support. Display address for
+ PC-relative offsets in %A.
+
+2009-11-11 H.J. Lu <hongjiu.lu@intel.com>
+
+ * i386-dis.c (all_prefixes): New.
+ (ckprefix): Set all_prefixes.
+ (print_insn): Print all_prefixes instead of lock_prefix,
+ repz_prefix, repnz_prefix, addr_prefix and data_prefix.
+
+2009-11-11 Nick Clifton <nickc@redhat.com>
+
+ PR binutils/10924
+ * arm-dis.c (UNPREDICTABLE_INSTRUCTION): New macro.
+ (print_insn_arm): Extend %s format control code to check for
+ unpredictable addressing modes. Add support for %S format control
+ code which suppresses this check.
+ (W_BIT, I_BIT, U_BIT, P_BIT): New macros.
+ (WRITEBACK_BIT_SET, IMMEDIATE_BIT_SET, NEGATIVE_BIT_SET,
+ PRE_BIT_SET): New macros.
+ (print_insn_coprocessor): Use the new macros instead of magic
+ constants.
+ (print_arm_address): Likewise.
+ (pirnt_insn_arm): Likewise.
+ (print_insn_thumb32): Likewise.
+
2009-11-11 Nick Clifton <nickc@redhat.com>
* po/id.po: Updated Indonesian translation.
projects / deliverable / binutils-gdb.git / blobdiff