+2003-07-09 Alexandre Oliva <aoliva@redhat.com>
+
+ 2000-05-25 Alexandre Oliva <aoliva@cygnus.com>
+ * m10300-dis.c (disassemble): Negate negative accumulator's shift.
+ 2000-05-24 Alexandre Oliva <aoliva@cygnus.com>
+ * m10300-dis.c (disassemble, case FSREG, FDREG): Don't assume
+ 32-bit longs when sign-extending operands.
+ 2000-04-20 Alexandre Oliva <aoliva@cygnus.com>
+ * m10300-opc.c: Remove MN10300_OPERAND_RELAX from all FSREGs.
+ * m10300-dis.c (HAVE_AM33_2): Define.
+ (disassemble): Use it.
+ (HAVE_AM33): Redefine.
+ (print_insn_mn10300): Fix mask for 5-byte extended insns.
+ 2000-04-01 Alexandre Oliva <aoliva@cygnus.com>
+ * m10300-opc.c: Renamed AM332 to AM33_2.
+ 2000-03-31 Alexandre Oliva <aoliva@cygnus.com>
+ * m10300-opc.c: Defined AM33 2.0 register operands. Added support
+ for AM33 2.0 `imm8,(abs16)' addressing mode for btst, bset and
+ bclr. Implemented `fbCC', `flCC', `dcpf' and all FP insns.
+ * m10300-dis.c (print_insn_mn10300): Recognize 5byte extended
+ insn code of AM33 2.0.
+ (disassemble): Recognize FMT_D3. Print out FP register names.
+
+2003-07-09 Chris Demetriou <cgd@broadcom.com>
+
+ * mips-dis.c (set_default_mips_dis_options): Get BFD from
+ the disassembler_info's section, rather than from the
+ disassembler_info's symbols pointer.
+
+2003-07-07 Alan Modra <amodra@bigpond.net.au>
+
+ * ppc-opc.c: Remove NULL pointer checks. Formatting. Remove
+ extraneous ATTRIBUTE_UNUSED.
+ * ppc-dis.c (print_insn_powerpc): Always pass a valid address to
+ operand->extract.
+
+2003-07-04 Alan Modra <amodra@bigpond.net.au>
+
+ * ppc-opc.c: Convert to C90, removing unnecessary prototypes and
+ casts. Formatting.
+
+ * ppc-opc.c: Remove PARAMS from prototypes.
+ (FXM4): Define.
+ (insert_fxm): New function, used by both FXM and FXM4.
+ (extract_fxm): Likewise.
+ (XFXFXM_MASK): Remove 1 << 20 term.
+ (powerpc_opcodes): Add Power4 version of "mfcr". Simplify "mtcr" mask.
+
+2003-07-01 Martin Schwidefsky <schwidefsky@de.ibm.com>
+
+ * s390-dis.c (s390_extract_operand): Add support for long displacements.
+ * s390-mkopc.c (s390_opcode_cpu_val): Add support for cpu type z990.
+ * s390-opc.c (D20_20): Add define for 20 bit displacements.
+ (INSTR_RRF_R0RR, INSTR_RSL_R0RD, INSTR_RSY_RRRD, INSTR_RSY_RURD,
+ INSTR_RSY_AARD, INSTR_RXY_RRRD, INSTR_RXY_FRRD, INSTR_SIY_URD): Add
+ new instruction formats.
+ (MASK_RRF_R0RR, MASK_RSL_R0RD, MASK_RSY_RRRD, MASK_RSY_RURD,
+ MASK_RSY_AARD, MASK_RXY_RRRD, MASK_RXY_FRRD, MASK_SIY_URD): Likewise.
+ (s390_opformats): Likewise.
+ * s390-opc.txt: Add new instructions for cpu type z990. Add missing
+ hfp instructions. Add missing instructions pgin, pgout and xsch.
+
+2003-06-23 H.J. Lu <hongjiu.lu@intel.com>
+
+ * i386-dis.c (PNI_Fixup): New. Fix up "mwait" and "monitor" in
+ Intel Precott New Instructions.
+ (PREGRP27): New. Added for "addsubpd" and "addsubps".
+ (PREGRP28): New. Added for "haddpd" and "haddps".
+ (PREGRP29): New. Added for "hsubpd" and "hsubps".
+ (PREGRP30): New. Added for "movsldup" and "movddup".
+ (PREGRP31): New. Added for "movshdup" and "movhpd".
+ (PREGRP32): New. Added for "lddqu".
+ (dis386_twobyte): Use PREGRP30 to replace the "movlpX" entry.
+ Use PREGRP31 to replace the "movhpX" entry. Use PREGRP28 for
+ entry 0x7c. Use PREGRP29 for entry 0x7d. Use PREGRP27 for
+ entry 0xd0. Use PREGRP32 for entry 0xf0.
+ (twobyte_has_modrm): Updated.
+ (twobyte_uses_SSE_prefix): Likewise.
+ (grps): Use PNI_Fixup in the "sidtQ" entry.
+ (prefix_user_table): Add PREGRP27, PREGRP28, PREGRP29, PREGRP30,
+ PREGRP31 and PREGRP32.
+ (float_mem): Use "fisttp{l||l|}" in entry 1 in opcode 0xdb.
+ Use "fisttpll" in entry 1 in opcode 0xdd.
+ Use "fisttp" in entry 1 in opcode 0xdf.
+
+2003-06-19 Christian Groessler <chris@groessler.org>
+
+ * z8k-dis.c (instr_data_s): Change tabl_index from long to int.
+ (print_insn_z8k): Correctly check return value from
+ z8k_lookup_instr call.
+ (unparse_instr): Handle CLASS_IRO case.
+ * z8kgen.c: Fix function definitions. Fix formatting.
+ (opt): Add brk opcode alias for non-simulator breakpoint. Add
+ missing and fix existing in/out and sin/sout opcode definitions.
+ (args): "@ri", "@ro" - add CLASS_IRO register usage for in/out
+ opcodes.
+ (internal): Check p->flags for non-zero before dereferencing it.
+ (gas): Add CLASS_IRO line. Insert new OPC_xxx lines for the added
+ opcodes and renumber the remaining lines repectively.
+ (main): Remove "-d" command line switch.
+ * z8k-opc.h: Regenerate with new z8kgen.c.
+
+2003-06-11 H.J. Lu <hongjiu.lu@intel.com>
+
+ * po/Make-in (DESTDIR): New.
+ (install-data-yes): Support $(DESTDIR).
+ (uninstall): Likewise.
+
+2003-06-11 Alan Modra <amodra@bigpond.net.au>
+
+ * Makefile.am: Run "make dep-am".
+ * Makefile.in: Regenerate.
+ * po/POTFILES.in: Regenerate.
+
+2003-06-10 Doug Evans <dje@sebabeach.org>
+
+ * cgen-asm.in (@arch@_cgen_assemble_insn): CGEN_INSN_RELAX renamed to
+ CGEN_INSN_RELAXED.
+ * fr30-asm.c,fr30-desc.c,fr30-desc.h: Regenerate.
+ * frv-asm.c,frv-desc.c,frv-desc.h: Regenerate.
+ * ip2k-asm.c,ip2k-desc.c,ip2k-desc.h: Regenerate.
+ * iq2000-asm.c,iq2000-desc.c,iq2000-desc.h: Regenerate.
+ * m32r-asm.c,m32r-desc.c,m32r-desc.h,m32r-opc.c: Regenerate.
+ * openrisc-asm.c,openrisc-desc.c,openrisc-desc.h: Regenerate.
+ * xstormy16-asm.c,xstormy16-desc.c,xstormy16-desc.h: Regenerate.
+
2003-06-10 Gary Hade <garyhade@us.ibm.com>
Alan Modra <amodra@bigpond.net.au>
2002-11-06 Aldy Hernandez <aldyh@redhat.com>
- * opcodes/ppc-opc.c: Change RD to RS for evmerge*.
+ * ppc-opc.c: Change RD to RS for evmerge*.
2002-10-07 Nathan Tallent <eraxxon@alumni.rice.edu>
* Makefile.am: Run "make dep-am".
* Makefile.in: Regenerate.
- * opcodes/po/POTFILES.in: Regenerate.
+ * po/POTFILES.in: Regenerate.
2002-01-19 Richard Earnshaw <rearnsha@arm.com>
2001-08-23 Martin Schwidefsky <schwidefsky@de.ibm.com>
- * opcodes/s390-opc.c: Add "low or high" and "not low or high"
+ * s390-opc.c: Add "low or high" and "not low or high"
branch instructions for gcc 3.0.
- * opcodes/s390-opc.txt: Likewise.
+ * s390-opc.txt: Likewise.
2001-08-21 Andreas Jaeger <aj@suse.de>
projects / deliverable / binutils-gdb.git / blobdiff