MIPS: Fix XPA base and Virtualization ASE instruction handling

[deliverable/binutils-gdb.git] / opcodes / ChangeLog

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 325cd8461eaa21b892bac22a4356fce427ccda05..8e6a052e6b968219e6549cbd85191fc0a486e258 100644 (file)
--- a/opcodes/ChangeLog
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@@ -1,3 +1,22 @@
+2017-06-30  Maciej W. Rozycki  <macro@imgtec.com>
+           Andrew Bennett  <andrew.bennett@imgtec.com>
+
+       * mips-dis.c (mips_calculate_combination_ases): Handle the
+       ASE_XPA_VIRT flag.
+       (parse_mips_ase_option): New function.
+       (parse_mips_dis_option): Factor out ASE option handling to the
+       new function.  Call `mips_calculate_combination_ases'.
+       * mips-opc.c (XPAVZ): New macro.
+       (mips_builtin_opcodes): Correct ISA and ASE flags for "mfhc0",
+       "mfhgc0", "mthc0" and "mthgc0".
+
+2017-06-29  Maciej W. Rozycki  <macro@imgtec.com>
+
+       * mips-dis.c (mips_calculate_combination_ases): New function.
+       (mips_convert_abiflags_ases): Factor out ASE_MIPS16E2_MT
+       calculation to the new function.
+       (set_default_mips_dis_options): Call the new function.
+
 2017-06-29  Anton Kolesov  <Anton.Kolesov@synopsys.com>
 
        * arc-dis.c (parse_disassembler_options): Use