Adds a space between the operands of the RL78's MOV instruction for consistency with...

[deliverable/binutils-gdb.git] / opcodes / ChangeLog

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 3fdbc711d180f4604188dad93f94b588ab7e1fa7..90b4eaf860e88649f74ddfabd582f252536be275 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,27 +1,60 @@
-2014-01-30  Michael Zolotukhin  <michael.v.zolotukhin@gmail.com>
-           Jan Beulich  <jbeulich@suse.com>
+2015-02-23  Vinay  <Vinay.G@kpit.com>
 
-       PR binutils/16490
-       * i386-dis.c (OP_E_memory): Fix shift computation for
-       vex_vsib_q_w_dq_mode.
+       * rl78-decode.opc (MOV): Added space between two operands for
+       'mov' instruction in index addressing mode.
+       * rl78-decode.c: Regenerate.
 
-2014-01-09  Bradley Nelson  <bradnelson@google.com>
-           Roland McGrath  <mcgrathr@google.com>
+2015-02-19  Pedro Alves  <palves@redhat.com>
 
-       * i386-dis.c (print_insn): Do not touch all_prefixes[-1] when
-       last_rex_prefix is -1.
+       * microblaze-dis.h [__cplusplus]: Wrap in extern "C".
 
-2014-01-08  H.J. Lu  <hongjiu.lu@intel.com>
+2015-02-10  Pedro Alves  <palves@redhat.com>
+           Tom Tromey  <tromey@redhat.com>
 
-       * i386-gen.c (process_copyright): Update copyright year to 2014.
+       * microblaze-opcm.h (or, and, xor): Rename to microblaze_or,
+       microblaze_and, microblaze_xor.
+       * microblaze-opc.h (opcodes): Adjust.
 
-2014-01-03  Maciej W. Rozycki  <macro@codesourcery.com>
+2015-01-28  James Bowman  <james.bowman@ftdichip.com>
 
-       * nds32-asm.c (parse_operand): Fix out-of-range integer constant.
+       * Makefile.am: Add FT32 files.
+       * configure.ac: Handle FT32.
+       * disassemble.c (disassembler): Call print_insn_ft32.
+       * ft32-dis.c: New file.
+       * ft32-opc.c: New file.
+       * Makefile.in: Regenerate.
+       * configure: Regenerate.
+       * po/POTFILES.in: Regenerate.
 
-For older changes see ChangeLog-2013
+2015-01-28 Kuan-Lin Chen <kuanlinchentw@gmail.com>
+
+       * nds32-asm.c (keyword_sr): Add new system registers.
+
+2015-01-16  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>
+
+       * s390-dis.c (s390_extract_operand): Support vector register
+       operands.
+       (s390_print_insn_with_opcode): Support new operands types and add
+       new handling of optional operands.
+       * s390-mkopc.c (s390_opcode_mode_val, s390_opcode_cpu_val): Remove
+       and include opcode/s390.h instead.
+       (struct op_struct): New field `flags'.
+       (insertOpcode, insertExpandedMnemonic): New parameter `flags'.
+       (dumpTable): Dump flags.
+       (main): Parse flags from the s390-opc.txt file.  Add z13 as cpu
+       string.
+       * s390-opc.c: Add new operands types, instruction formats, and
+       instruction masks.
+       (s390_opformats): Add new formats for .insn.
+       * s390-opc.txt: Add new instructions.
+
+2015-01-01  Alan Modra  <amodra@gmail.com>
+
+       Update year range in copyright notice of all files.
+
+For older changes see ChangeLog-2014
 \f
-Copyright (C) 2014 Free Software Foundation, Inc.
+Copyright (C) 2015 Free Software Foundation, Inc.
 
 Copying and distribution of this file, with or without modification,
 are permitted in any medium without royalty provided the copyright