-2014-04-22 Christian Svensson <blue@cmd.nu>
-
- * Makefile.am: Remove openrisc and or32 support. Add support for or1k.
- * configure.in: Likewise.
- * disassemble.c: Likewise.
- * or1k-asm.c: New file.
- * or1k-desc.c: New file.
- * or1k-desc.h: New file.
- * or1k-dis.c: New file.
- * or1k-ibld.c: New file.
- * or1k-opc.c: New file.
- * or1k-opc.h: New file.
- * or1k-opinst.c: New file.
- * Makefile.in: Regenerate.
- * configure: Regenerate.
- * openrisc-asm.c: Delete.
- * openrisc-desc.c: Delete.
- * openrisc-desc.h: Delete.
- * openrisc-dis.c: Delete.
- * openrisc-ibld.c: Delete.
- * openrisc-opc.c: Delete.
- * openrisc-opc.h: Delete.
- * or32-dis.c: Delete.
- * or32-opc.c: Delete.
-
-2014-04-04 Ilya Tocar <ilya.tocar@intel.com>
-
- * i386-dis.c (rm_table): Add encls, enclu.
- * i386-gen.c (cpu_flag_init): Add CPU_SE1_FLAGS,
- (cpu_flags): Add CpuSE1.
- * i386-opc.h (enum): Add CpuSE1.
- (i386_cpu_flags): Add cpuse1.
- * i386-opc.tbl: Add encls, enclu.
- * i386-init.h: Regenerated.
- * i386-tbl.h: Likewise.
-
-2014-04-02 Anthony Green <green@moxielogic.com>
+2015-02-23 Vinay <Vinay.G@kpit.com>
- * moxie-opc.c (moxie_form1_opc_info): Add sign-extension
- instructions, sex.b and sex.s.
+ * rl78-decode.opc (MOV): Added space between two operands for
+ 'mov' instruction in index addressing mode.
+ * rl78-decode.c: Regenerate.
-2014-03-26 Jiong Wang <jiong.wang@arm.com>
+2015-02-19 Pedro Alves <palves@redhat.com>
- * aarch64-dis.c (aarch64_ext_ldst_elemlist): Check H/S undefined
- instructions.
+ * microblaze-dis.h [__cplusplus]: Wrap in extern "C".
-2014-03-20 Ilya Tocar <ilya.tocar@intel.com>
+2015-02-10 Pedro Alves <palves@redhat.com>
+ Tom Tromey <tromey@redhat.com>
- * i386-opc.tbl: Change memory size for vgatherpf0qps, vgatherpf1qps,
- vscatterpf0qps, vscatterpf1qps, vgatherqps, vpgatherqd, vpscatterqd,
- vscatterqps.
- * i386-tbl.h: Regenerate.
+ * microblaze-opcm.h (or, and, xor): Rename to microblaze_or,
+ microblaze_and, microblaze_xor.
+ * microblaze-opc.h (opcodes): Adjust.
-2014-03-19 Jose E. Marchesi <jose.marchesi@oracle.com>
-
- * sparc-dis.c (v9_hpriv_reg_names): Names for %hstick_offset and
- %hstick_enable added.
-
-2014-03-19 Nick Clifton <nickc@redhat.com>
-
- * rx-decode.opc (bwl): Allow for bogus instructions with a size
- field of 3.
- (sbwl, ubwl, SCALE): Likewise.
- * rx-decode.c: Regenerate.
-
-2014-03-12 Alan Modra <amodra@gmail.com>
+2015-01-28 James Bowman <james.bowman@ftdichip.com>
+ * Makefile.am: Add FT32 files.
+ * configure.ac: Handle FT32.
+ * disassemble.c (disassembler): Call print_insn_ft32.
+ * ft32-dis.c: New file.
+ * ft32-opc.c: New file.
* Makefile.in: Regenerate.
-
-2014-03-05 Alan Modra <amodra@gmail.com>
-
- Update copyright years.
-
-2014-03-04 Heiher <r@hev.cc>
-
- * mips-dis.c (mips_arch_choices): Usee ISA_MIPS64R2 for Loongson-3A.
-
-2014-03-04 Richard Sandiford <rdsandiford@googlemail.com>
-
- * mips-opc.c (mips_builtin_opcodes): Move the udi* instructions
- so that they come after the Loongson extensions.
-
-2014-03-03 Alan Modra <amodra@gmail.com>
-
- * i386-gen.c (process_copyright): Emit copyright notice on one line.
-
-2014-02-28 Alan Modra <amodra@gmail.com>
-
- * msp430-decode.c: Regenerate.
-
-2014-02-27 Jiong Wang <jiong.wang@arm.com>
-
- * aarch64-tbl.h (aarch64_opcode_table): Replace IMM0 with
- FPIMM0 for fcmeq, fcmgt, fcmge, fcmlt and fcmle.
-
-2014-02-27 Yufeng Zhang <yufeng.zhang@arm.com>
-
- * aarch64-opc.c (print_register_offset_address): Call
- get_int_reg_name to prepare the register name.
-
-2014-02-25 Ilya Tocar <ilya.tocar@intel.com>
-
- * i386-opc.tbl: Remove wrong variant of vcvtps2ph
- * i386-tbl.h: Regenerate.
-
-2014-02-20 Ilya Tocar <ilya.tocar@intel.com>
-
- * i386-gen.c (cpu_flag_init): Add CPU_PREFETCHWT1_FLAGS/
- (cpu_flags): Add CpuPREFETCHWT1.
- * i386-init.h: Regenerate.
- * i386-opc.h (CpuPREFETCHWT1): New.
- (i386_cpu_flags): Add cpuprefetchwt1.
- * i386-opc.tbl: Cahnge CPU of prefetchwt1 from CpuAVX512PF to CpuPREFETCHWT1.
- * i386-tbl.h: Regenerate.
-
-2014-02-20 Ilya Tocar <ilya.tocar@intel.com>
-
- * i386-opc.tbl: Change CPU of vptestnmq, vptestnmd from CpuAVX512CD,
- to CpuAVX512F.
- * i386-tbl.h: Regenerate.
-
-2014-02-19 H.J. Lu <hongjiu.lu@intel.com>
-
- * i386-gen.c (output_cpu_flags): Don't output trailing space.
- (output_opcode_modifier): Likewise.
- (output_operand_type): Likewise.
- * i386-init.h: Regenerated.
- * i386-tbl.h: Likewise.
-
-2014-02-12 Ilya Tocar <ilya.tocar@intel.com>
-
- * i386-dis.c (MOD enum): Add MOD_0FC7_REG_3, MOD_0FC7_REG_4,
- MOD_0FC7_REG_5.
- (PREFIX enum): Add PREFIX_0FAE_REG_7.
- (reg_table): Add MOD_0FC7_REG_3, MOD_0FC7_REG_4 MOD_0FC7_REG_5.
- (prefix_table): Add clflusopt.
- (mod_table): Add xrstors, xsavec, xsaves.
- * i386-gen.c (cpu_flag_init): Add CPU_CLFLUSHOPT_FLAGS,
- CPU_XSAVES_FLAGS, CPU_XSAVEC_FLAGS.
- (cpu_flags): Add CpuClflushOpt, CpuXSAVES, CpuXSAVEC.
- * i386-init.h: Regenerate.
- * i386-opc.tbl: Add clflushopt, xrstors, xrstors64, xsaves,
- xsaves64, xsavec, xsavec64.
- * i386-tbl.h: Regenerate.
-
-2014-02-10 Alan Modra <amodra@gmail.com>
-
+ * configure: Regenerate.
* po/POTFILES.in: Regenerate.
- * po/opcodes.pot: Regenerate.
-
-2014-01-30 Michael Zolotukhin <michael.v.zolotukhin@gmail.com>
- Jan Beulich <jbeulich@suse.com>
-
- PR binutils/16490
- * i386-dis.c (OP_E_memory): Fix shift computation for
- vex_vsib_q_w_dq_mode.
-2014-01-09 Bradley Nelson <bradnelson@google.com>
- Roland McGrath <mcgrathr@google.com>
+2015-01-28 Kuan-Lin Chen <kuanlinchentw@gmail.com>
- * i386-dis.c (print_insn): Do not touch all_prefixes[-1] when
- last_rex_prefix is -1.
+ * nds32-asm.c (keyword_sr): Add new system registers.
-2014-01-08 H.J. Lu <hongjiu.lu@intel.com>
+2015-01-16 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
- * i386-gen.c (process_copyright): Update copyright year to 2014.
+ * s390-dis.c (s390_extract_operand): Support vector register
+ operands.
+ (s390_print_insn_with_opcode): Support new operands types and add
+ new handling of optional operands.
+ * s390-mkopc.c (s390_opcode_mode_val, s390_opcode_cpu_val): Remove
+ and include opcode/s390.h instead.
+ (struct op_struct): New field `flags'.
+ (insertOpcode, insertExpandedMnemonic): New parameter `flags'.
+ (dumpTable): Dump flags.
+ (main): Parse flags from the s390-opc.txt file. Add z13 as cpu
+ string.
+ * s390-opc.c: Add new operands types, instruction formats, and
+ instruction masks.
+ (s390_opformats): Add new formats for .insn.
+ * s390-opc.txt: Add new instructions.
-2014-01-03 Maciej W. Rozycki <macro@codesourcery.com>
+2015-01-01 Alan Modra <amodra@gmail.com>
- * nds32-asm.c (parse_operand): Fix out-of-range integer constant.
+ Update year range in copyright notice of all files.
-For older changes see ChangeLog-2013
+For older changes see ChangeLog-2014
\f
-Copyright (C) 2014 Free Software Foundation, Inc.
+Copyright (C) 2015 Free Software Foundation, Inc.
Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
projects / deliverable / binutils-gdb.git / blobdiff