+2002-01-23 Nick Clifton <nickc@cambridge.redhat.com>
+
+ * po/da.po: New file: Spanish translation.
+ * configure.in (ALL_LINGUAS): Add da.
+ * configure: Regenerate.
+
+2002-01-22 Graydon Hoare <graydon@redhat.com>
+
+ * fr30-asm.c: Regenerate.
+ * fr30-desc.c: Likewise.
+ * fr30-desc.h: Likewise.
+ * fr30-dis.c: Likewise.
+ * fr30-ibld.c: Likewise.
+ * fr30-opc.c: Likewise.
+ * fr30-opc.h: Likewise.
+ * m32r-asm.c: Likewise.
+ * m32r-desc.c: Likewise.
+ * m32r-desc.h: Likewise.
+ * m32r-dis.c: Likewise.
+ * m32r-ibld.c: Likewise.
+ * m32r-opc.c: Likewise.
+ * m32r-opc.h: Likewise.
+ * m32r-opinst.c: Likewise.
+ * openrisc-asm.c: Likewise.
+ * openrisc-desc.c: Likewise.
+ * openrisc-desc.h: Likewise.
+ * openrisc-dis.c: Likewise.
+ * openrisc-ibld.c: Likewise.
+ * openrisc-opc.c: Likewise.
+ * openrisc-opc.h: Likewise.
+ * xstormy16-desc.c: Likewise.
+
+2002-01-22 Richard Henderson <rth@redhat.com>
+
+ * alpha-dis.c (print_insn_alpha): Also mask the base opcode for
+ comparison.
+
+2002-01-19 Richard Earnshaw <rearnsha@arm.com>
+
+ * arm-opc.h (arm_opcodes): Use generic rule %5?hb instead of %h.
+ * arm-dis.c (print_insn_arm): Don't handle 'h' case.
+
+2002-01-18 Keith Walker <keith.walker@arm.com>
+
+ * arm-opc.h (arm_opcodes): Add bxj instruction.
+
+2002-01-17 Nick Clifton <nickc@cambridge.redhat.com>
+
+ * po/opcodes.pot: Regenerate.
+ * po/fr.po: Regenerate.
+ * po/sv.po: Regenerate.
+ * po/tr.po: Regenerate.
+
+2002-01-16 Nick Clifton <nickc@cambridge.redhat.com>
+
+ * po/tr.po: Import new version.
+
+2002-01-15 Richard Earnshaw <rearnsha@arm.com>
+
+ * arm-opc.h (arm_opcodes): Add patterns for VFP instructions.
+ * arm-dis.c (print_insn_arm): Support new disassembly qualifiers for
+ VFP bitfields.
+
+2002-01-10 matthew green <mrg@redhat.com>
+
+ * xstormy16-asm.c: Regenerate.
+ * xstormy16-desc.c: Likewise.
+ * xstormy16-desc.h: Likewise.
+ * xstormy16-dis.c: Likewise.
+ * xstormy16-opc.c: Likewise.
+ * xstormy16-opc.h: Likewise.
+
+2002-01-07 Nick Clifton <nickc@cambridge.redhat.com>
+
+ * po/es.po: New file: Spanish translation.
+ * configure.in (ALL_LINGUAS): Add es.
+ * configure: Regenerate.
+
+2001-12-31 Jeffrey A Law (law@redhat.com)
+
+ * hppa-dis.c (print_insn_hppa): Handle new 'c' mode completers,
+ 'X', 'M', and 'A'. No longer emit a space after 'x' or 's'.
+ Always emit a space after 'H'.
+
+2001-12-18 matthew green <mrg@redhat.com>
+
+ * ppc-opc.c (PPCVEC): Include PPC_OPCODE_ANY.
+
+2001-12-17 Richard Henderson <rth@redhat.com>
+
+ * alpha-opc.c (unop): Encode with RB as $sp.
+
+2001-12-07 Geoffrey Keating <geoffk@redhat.com>
+
+ * Makefile.am: Add support for xstormy16.
+ * Makefile.in: Regenerate.
+ * configure.in: Add support for xstormy16.
+ * configure: Regenerate.
+ * disassemble.c: Add support for xstormy16.
+ * xstormy16-asm.c: New generated file.
+ * xstormy16-desc.c: New generated file.
+ * xstormy16-desc.h: New generated file.
+ * xstormy16-dis.c: New generated file.
+ * xstormy16-ibld.c: New generated file.
+ * xstormy16-opc.c: New generated file.
+ * xstormy16-opc.h: New generated file.
+
+2001-12-06 Richard Henderson <rth@redhat.com>
+
+ * alpha-opc.c (alpha_opcodes): Add wh64en.
+
+2001-12-04 Alexandre Oliva <aoliva@redhat.com>
+
+ * d10v-opc.c (d10v_predefined_registers): Remove warnings
+ introduced in Nov 29's patch.
+
+ * d10v-dis.c (print_operand): Apply REGISTER_MASK to `num' of
+ unmatched register.
+
+ * d10v-dis.c (print_operand): Disregard OPERAND_SP in register
+ predefined value.
+
+ * d10v-opc.c (RSRC_NOSP): New macro.
+ (d10v_operands): Add it.
+ (d10v_opcodes): Use RSRC_NOSP in post-decrement "st" and "st2w".
+
+2001-11-29 Alexandre Oliva <aoliva@redhat.com>
+
+ * d10v-opc.c (d10v_predefined_registers): Mark `sp' as OPERAND_SP.
+ (RSRC_SP): New macro.
+ (d10v_operands): Add it.
+ (d10v_opcodes): Adjust "st" and "st2w" to use RSRC_SP.
+
+2001-11-23 Lars Brinkhoff <lars@nocrew.org>
+
+ * pdp11-dis.c (print_insn_pdp11): Handle illegal instructions.
+ Also, break out of the loop as soon as an instruction has been
+ printed.
+
+2001-11-17 matthew green <mrg@redhat.com>
+
+ * ppc-opc.c (mfvrsave, mtvrsave): New instructions.
+
+2001-11-15 Alan Modra <amodra@bigpond.net.au>
+
+ * po/POTFILES.in: Regenerate.
+
+ * ppc-opc.c (PPC64): Revert 2001-10-12. Do include PPC_OPCODE_PPC.
+ (insert_bat, extract_bat, insert_bba, extract_bba,
+ insert_bd, extract_bd, insert_bdm, extract_bdm,
+ insert_bdp, extract_bdp, valid_bo,
+ insert_bo, extract_bo, insert_boe, extract_boe,
+ insert_ds, extract_ds, insert_de, extract_de,
+ insert_des, extract_des, insert_li, extract_li,
+ insert_mbe, extract_mbe, insert_mb6, extract_mb6,
+ insert_nb, extract_nb, insert_nsi, extract_nsi,
+ insert_ral, insert_ram, insert_ras,
+ insert_rbs, extract_rbs, insert_sh6, extract_sh6,
+ insert_spr, extract_spr, insert_tbr, extract_tbr): Add dialect param.
+ (extract_bd, extract_bdm, extract_bdp,
+ extract_ds, extract_des,
+ extract_li, extract_nsi): Implement sign extension without conditional.
+ (insert_bdm, extract_bdm,
+ insert_bdp, extract_bdp, valid_bo): Handle 64 bit branch hints.
+ (extract_bdm, extract_bdp): Correct 32 bit validation.
+ (AT1_MASK, AT2_MASK): Define.
+ (BBOAT_MASK): Define.
+ (BBOATCB_MASK, BBOAT2CB_MASK, BBOATBI_MASK): Define.
+ (BOFM64, BOFP64, BOTM64, BOTP64): Define.
+ (BODNZM64, BODNZP64, BODZM64, BODZP64): Define.
+ (PPCCOM32, PPCCOM64): Define.
+ (powerpc_opcodes): Modify existing 32 bit insns with branch hints
+ and add new patterns to implement 64 bit branches with hints. Move
+ booke instructions so they match before ppc64.
+
+ * ppc-dis.c (powerpc_dialect): Set PPC_OPCODE_64 in dialect for
+ 64 bit default targets, and parse "32" and "64" in options.
+ Formatting fixes.
+ (print_insn_powerpc): Pass dialect to operand->extract.
+
+2001-11-14 Dave Brolley <brolley@redhat.com>
+
+ * cgen-dis.c (count_decodable_bits): New function.
+ (add_insn_to_hash_chain): New function.
+ (hash_insn_array): Call add_insn_to_hash_chain.
+ (hash_insn_list): Call add_insn_to_hash_chain.
+ * m32r-dis.c: Regenerated.
+ * fr30-dis.c: Regenerated.
+
+2001-11-14 Andreas Jaeger <aj@suse.de>
+
+ * i386-dis.c (print_insn): Use x86-64 as option.
+
+2001-11-14 Alan Modra <amodra@bigpond.net.au>
+
+ * disassemble.c (disassembler): Call print_insn_i386.
+ * i386-dis.c (SUFFIX_ALWAYS): Define.
+ (struct dis_private): Add orig_sizeflag.
+ (print_insn_i386): Make it a wrapper, calling..
+ (print_insn): ..The old body of print_insn_i386. Avoid longjmp
+ warning without using volatile by moving orig_sizeflag to priv,
+ and removing inbuf. Parse disassembler_options.
+ (print_insn_i386_att, print_insn_i386_intel): Move initialisation
+ code to print_insn.
+ (putop): Remove #ifdef SUFFIX_ALWAYS.
+
+2001-11-11 Timothy Wall <twall@alum.mit.edu>
+
+ * tic54x-dis.c: Use revised opcode structure. Export opcode
+ template lookup.
+ (has_lkaddr): Don't forget about Lmem insns.
+ * tic54x-opc.c: Add emulation trap. Parallel table now uses
+ standard opcode templates.
+
+2001-11-13 Zack Weinberg <zack@codesourcery.com>
+
+ * i386-dis.c (grps): Change "sldt", "str", and "smsw" entries
+ to "sldtQ", "strQ", "smswQ" respectively; all with Ev operand
+ category instead of Ew.
+
+2001-11-12 Niraj Gupta <ngupta@zumanetworks.com>
+
+ * m68k-opc.c: Fix definitions of wddata[bwl].
+
+2001-11-09 Richard Sandiford <rsandifo@redhat.com>
+
+ * cgen-asm.c (cgen_parse_keyword): If the keyword is too big to
+ fit in the buffer, try to match the empty keyword.
+
+2001-11-09 Nick Clifton <nickc@cambridge.redhat.com>
+
+ * cgen-ibld.in (extract_1): Fix badly placed #if 0.
+ * fr30-ibld.c: Regenerate.
+ * m32r-ibld.c: Regenerate.
+ * openrisc-ibld.c: Regenerate.
+
+2001-11-04 Chris Demetriou <cgd@broadcom.com>
+
+ * mips-dis.c (print_insn_mips): Remove spaces at end of line.
+
+2001-11-02 Nick Clifton <nickc@cambridge.redhat.com>
+
+ * configure.in (ALL_LINGUAS): Add "fr", "sv" and "tr".
+ * configure: Regernate.
+ * po/fr.po: New file.
+ * po/sv.po: New file.
+ * po/tr.po: New file.
+
+2001-11-01 Stephane Carrez <Stephane.Carrez@worldnet.fr>
+
+ * m68hc11-dis.c (print_insn): Fix disassembly of movb with a
+ constant as source.
+
+2001-10-30 Hans-Peter Nilsson <hp@bitrange.com>
+
+ * Makefile.am (CFILES): Add mmix-dis.c and mmix-opc.c. Regenerate
+ dependencies.
+ * Makefile.in: Regenerate.
+ * mmix-dis.c, mmix-opc.c: New files.
+
+2001-10-29 Kazu Hirata <kazu@hxi.com>
+
+ * d30v-dis.c: Fix a comment typo.
+
+2001-10-23 Chris Demetriou <cgd@broadcom.com>
+
+ * mips-opc.c (mips_builtin_opcodes): Mark "bgezall" and
+ "bltzall" as writing GPR 31 (since they do).
+
+ * mips-dis.c (print_insn_arg): Calculate info->target
+ where appropriate.
+ (print_insn_mips): Fill in instruction info.
+ (print_mips16_insn_arg): Remove unneded variable 'val'.
+ Removed duplicated instruction target calculations,
+ calculate once and print that result. Use same idiom for
+ masking the jump segment bits as is used in print_insn_arg.
+
+2001-10-20 Alan Modra <amodra@bigpond.net.au>
+
+ * ppc-opc.c (CT): Make it an optional operand.
+
+2001-10-17 Chris Demetriou <cgd@broadcom.com>
+
+ * mips-dis.c (mips_isa_type): Make the ISA used to disassemble
+ SB-1 binaries include instructions specific to the SB-1.
+ * mips-opc.c (SB1): New definition.
+ (mips_builtin_opcodes): Add SB-1 extension opcodes "div.ps",
+ "recip.ps", "rsqrt.ps", and "sqrt.ps".
+
+2001-10-17 matthew green <mrg@redhat.com>
+
+ * ppc-opc.c (STRM): New AltiVec operand.
+ (XDSS): New AltiVec instruction form.
+ (mtvscr): Correct operand list.
+ (dst, dstt, dstst, dststt, dss, dssall): AltiVec instructions.
+
+2001-10-17 Alan Modra <amodra@bigpond.net.au>
+
+ * po/POTFILES.in: Regenerate.
+
+2001-10-13 matthew green <mrg@redhat.com>
+
+ * ppc-opc.c (MO): New macro for MO field of mbar instruction.
+ (powerpc_opcodes): Add rfci, wrtee, wrteei, mfdcrx, mfdcr,
+ mtdcrx, mtdcr, msync, dcba and mbar as BookE instructions.
+
+2001-10-13 Nick Clifton <nickc@cambridge.redhat.com>
+
+ * cgen-ibld.in: Include safe-ctype.h in preference to
+ ctype.h.
+ * cgen-asm.in: Include safe-ctype.h in preference to
+ ctype.h. Fix formatting. Use ISSPACE instead of isspace and
+ TOLOWER instead of tolower.
+ (@arch@_cgen_build_insn_regex): Remove duplication of syntax
+ string elements in constructed regular expression.
+ * fr30-asm.c: Regenerate.
+ * fr30-desc.c: Regenerate.
+ * fr30-ibld.c: Regenerate.
+ * m32r-asm.c: Regenerate.
+ * m32r-desc.c: Regenerate.
+ * m32r-ibld.c: Regenerate.
+ * openrisc-asm.c: Regenerate.
+ * openrisc-desc.c: Regenerate.
+ * openrisc-ibld.c: Regenerate.
+ * po/opcodes.pot: Regenerate.
+
+2001-10-12 matthew green <mrg@redhat.com>
+
+ * ppc-opc.c (insert_de, extract_de, insert_des, extract_des): New
+ instruction field instruction/extraction functions for new BookE
+ DE form instructions.
+ (CT): New macro for CT field in an X form instruction.
+ (DE, DES, DEO, DE_MASK): New macros for DE/DES fields in DE form
+ instructions.
+ (PPC64): Don't include PPC_OPCODE_PPC.
+ (403): New opcode macro for PPC403 processors.
+ (BOOKE): New opcode macro for BookE processors.
+ (bce, bcel, bcea, bcela, bclre, bclrel: New BookE instructions.
+ (bcctre, bcctrel, be, bel, bea, bela, icbt, icbte, lwzxe): Likewise.
+ (dcbste, lwzuxe, luxe, dcbfe, lbzxe, lwarxe, lbzuxe): Likewise.
+ (stwcxe, stwxe, stxe, stwuxe, stuxe, stbxe, dcbtste, stbuxe): Likewise.
+ (mfapidi, dcbte, lhzxe, lhzuxe, lhaxe, lhauxe, subfe64): Likewise.
+ (subfeo64, adde64, addeo64, sthxe, sthuxe, subfze64): Likewise.
+ (subfzeo64, addze64, addzeo64, dcbie, subfme64, subfmeo64): Likewise.
+ (addme64, addmeo64, stdcxe., mcrxr64, lwbrxe, lfsxe, lfsuxe): Likewise.
+ (lfdxe, lfduxe, stwbrxe, stfsxe, stfsuxe, stfdxe, dcbae): Likewise.
+ (stfduxe, tlbivax, tlbivaxe, lhbrxe, ldxe, lduxe, tlbsx): Likewise.
+ (tlbsxe, sthbrxe, stdxe, stduxe, icbie, stfiwxe, dcbze, lbze): Likewise.
+ (lbzue, ldue, lhze, lhzue, lhae, lhaue, lwze, lwzue): Likewise.
+ (stbe, stbue, sthe, sthue, stwe, stwue, lfse, lfsue, lfde): Likewise.
+ (lfdue, stde, stdue, stfse, stfsue, stfde, stfdue): Likewise.
+
+ * ppc-dis.c (print_insn_big_powerpc, print_insn_little_powerpc): Look
+ for a disassembler option of `booke', `booke32' or `booke64' to enable
+ BookE support in the disassembler.
+
+2001-10-12 John Healy <jhealy@redhat.com>
+
+ * cgen-dis.in (print_insn): Use min (cd->base_insn_bitsize, buflen*8)
+ for the length when extracting the base part of the insn.
+
+2001-10-09 Bruno Haible <haible@clisp.cons.org>
+
+ * cgen-asm.in (*_cgen_build_insn_regex): Generate a case sensitive
+ regular expression. Fix some formatting problems.
+ * fr30-asm.c: Regenerate.
+ * openrisc-asm.c: Regenerate.
+ * m32r-asm.c: Regenerate.
+
+2001-10-09 Christian Groessler <cpg@aladdin.de>
+
+ * z8k-dis.c (unparse_instr): Fixed formatting. Change disassembly
+ of indirect register memory accesses to be same format the
+ assembler accepts.
+
+2001-10-09 Nick Clifton <nickc@cambridge.redhat.com>
+
+ * sh-opc.h: Fix encoding of least significant nibble of the
+ DSP single data transfer instructions.
+
+ * sh-dis.c (print_insn_shx): Fix decoding of As opcode in DSP
+ instructions.
+
+2001-10-08 Nick Clifton <nickc@cambridge.redhat.com>
+
+ * cgen-asm.in: Fix compile time warning messages in generated
+ C files.
+ * cgen-dis.in: The same.
+ * cgen-ibld.in: The same.
+ * fr30-asm.c: Regenerate.
+ * fr30-desc.c: Regenerate.
+ * fr30-dis.c: Regenerate.
+ * fr30-ibld.c: Regenerate.
+ * fr30-opc.c: Regenerate.
+ * m32r-asm.c: Regenerate.
+ * m32r-desc.c: Regenerate.
+ * m32r-dis.c: Regenerate.
+ * m32r-ibld.c: Regenerate.
+ * m32r-opc.c: Regenerate.
+ * m32r-opinst.c Regenerate.
+ * openrisc-asm.c: Regenerate.
+ * openrisc-desc.c: Regenerate.
+ * openrisc-dis.c: Regenerate.
+ * openrisc-ibld.c: Regenerate.
+ * openrisc-opc.c: Regenerate.
+ * openrisc-opc.h: Regenerate.
+ * Makefile.in: Regenerate.
+ * po/POTFILES.in: Regenerate.
+ * po/opcodes.pot: Regenerate.
+
+2001-10-08 Aldy Hernandez <aldyh@redhat.com>
+
+ * arm-opc.h (arm_opcodes): Add cirrus insns.
+
+ * arm-dis.c (print_insn_arm): Add 'I' case.
+
2001-10-03 Alan Modra <amodra@bigpond.net.au>
* po/POTFILES.in: Regenerate.