Arm64: correct address index operands for LD1RO{H,W,D}

[deliverable/binutils-gdb.git] / opcodes / ChangeLog

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 23a0d7fd291029737bd554d829363ca32e776bd0..fb9f9e0929e334833ee7ba9f09ded58d28ee906a 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,76 +1,36 @@
-2019-01-25  Sudakshina Das  <sudi.das@arm.com>
-           Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
+2020-01-03  Jan Beulich  <jbeulich@suse.com>
 
-       * aarch64-asm.c (aarch64_ins_addr_simple_2): Remove.
-       * aarch64-asm.h (ins_addr_simple_2): Likeiwse.
-       * aarch64-dis.c (aarch64_ext_addr_simple_2): Likewise.
-       * aarch64-dis.h (ext_addr_simple_2): Likewise.
-       * aarch64-opc.c (operand_general_constraint_met_p): Remove
-       case for ldstgv_indexed.
-       (aarch64_print_operand): Remove case for AARCH64_OPND_ADDR_SIMPLE_2.
-       * aarch64-tbl.h (struct aarch64_opcode): Remove ldgv and stgv.
-       (AARCH64_OPERANDS): Remove ADDR_SIMPLE_2.
-       * aarch64-asm-2.c: Regenerated.
-       * aarch64-dis-2.c: Regenerated.
-       * aarch64-opc-2.c: Regenerated.
+       * aarch64-tbl.h (aarch64_opcode_table): Use
+       SVE_ADDR_RX_LSL{1,2,3} for LD1RO{H,W,D}.
 
-2019-01-23  Nick Clifton  <nickc@redhat.com>
+2020-01-03  Jan Beulich  <jbeulich@suse.com>
 
-       * po/pt_BR.po: Updated Brazilian Portuguese translation.
+       * aarch64-tbl.h (aarch64_opcode_table): Correct SIMD
+       forms of SUDOT and USDOT.
 
-2019-01-21  Nick Clifton  <nickc@redhat.com>
+2020-01-03  Jan Beulich  <jbeulich@suse.com>
 
-       * po/de.po: Updated German translation.
-       * po/uk.po: Updated Ukranian translation.
+       * aarch64-tbl.h (aarch64_opcode_table): Drop 'i' from
+       uzip{1,2}.
+       * opcodes/aarch64-dis-2.c: Re-generate.
 
-2019-01-20  Chenghua Xu  <paul.hua.gm@gmail.com>
-       * mips-dis.c (mips_arch_choices): Fix typo in
-       gs464, gs464e and gs264e descriptors.
+2020-01-03  Jan Beulich  <jbeulich@suse.com>
 
-2019-01-19  Nick Clifton  <nickc@redhat.com>
+       * aarch64-tbl.h (aarch64_opcode_table): Correct 64-bit
+       FMMLA encoding.
+       * opcodes/aarch64-dis-2.c: Re-generate.
 
-       * configure: Regenerate.
-       * po/opcodes.pot: Regenerate.
+2020-01-02  Sergey Belyashov  <sergey.belyashov@gmail.com>
 
-2018-06-24  Nick Clifton  <nickc@redhat.com>
+       * z80-dis.c: Add support for eZ80 and Z80 instructions.
 
-       2.32 branch created.
-
-2019-01-09  John Darrington <john@darrington.wattle.id.au>
-
-       * s12z-dis.c (print_insn_s12z):  Do not dereference an operand
-       if it is null.
-       -dis.c (opr_emit_disassembly): Do not omit an index if it is
-       zero.
-
-2019-01-09  Andrew Paprocki  <andrew@ishiboo.com>
-
-       * configure: Regenerate.
-
-2019-01-07  Alan Modra  <amodra@gmail.com>
-
-       * configure: Regenerate.
-       * po/POTFILES.in: Regenerate.
-
-2019-01-03  John Darrington <john@darrington.wattle.id.au>
-
-       * s12z-opc.c: New file.
-       * s12z-opc.h: New file.
-       * s12z-dis.c: Removed all code not directly related to display
-       of instructions.  Used the interface provided by the new files
-       instead.
-       * Makefile.am (TARGET_LIBOPCODES_CFILES) Add s12z-opc.c.
-       * Makefile.in: Regenerate.
-       * configure.ac (bfd_s12z_arch): Correct the dependencies.
-       * configure: Regenerate.
-
-2019-01-01  Alan Modra  <amodra@gmail.com>
+2020-01-01  Alan Modra  <amodra@gmail.com>
 
        Update year range in copyright notice of all files.
 
-For older changes see ChangeLog-2018
+For older changes see ChangeLog-2019
 \f
-Copyright (C) 2019 Free Software Foundation, Inc.
+Copyright (C) 2020 Free Software Foundation, Inc.
 
 Copying and distribution of this file, with or without modification,
 are permitted in any medium without royalty provided the copyright