Add Intel MCU support to opcodes

[deliverable/binutils-gdb.git] / opcodes / ChangeLog

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index b46c861032592c03baf2bf4e96222063c0487b2f..99c7a93000283b65836d2c18aaad3a46417c0af2 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,77 @@
+2015-05-11  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * configure.ac: Support bfd_iamcu_arch.
+       * disassemble.c (disassembler): Support bfd_iamcu_arch.
+       * i386-gen.c (cpu_flag_init): Add CPU_IAMCU_FLAGS and
+       CPU_IAMCU_COMPAT_FLAGS.
+       (cpu_flags): Add CpuIAMCU.
+       * i386-opc.h (CpuIAMCU): New.
+       (i386_cpu_flags): Add cpuiamcu.
+       * configure: Regenerated.
+       * i386-init.h: Likewise.
+       * i386-tbl.h: Likewise.
+
+2015-04-30  DJ Delorie  <dj@redhat.com>
+
+       * disassemble.c (disassembler): Choose suitable disassembler based
+       on E_ABI.
+       * rl78-decode.opc (rl78_decode_opcode): Take ISA parameter.  Use
+       it to decode mul/div insns.
+       * rl78-decode.c: Regenerate.
+       * rl78-dis.c (print_insn_rl78): Rename to...
+       (print_insn_rl78_common): ...this, take ISA parameter.
+       (print_insn_rl78): New.
+       (print_insn_rl78_g10): New.
+       (print_insn_rl78_g13): New.
+       (print_insn_rl78_g14): New.
+       (rl78_get_disassembler): New.
+
+2015-04-29  Nick Clifton  <nickc@redhat.com>
+
+       * po/fr.po: Updated French translation.
+
+2015-04-27  Peter Bergner  <bergner@vnet.ibm.com>
+
+       * ppc-opc.c (DCBT_EO): New define.
+       (powerpc_opcodes) <lbarx>: Enable for POWER8 and later.
+       <lharx>: Likewise.
+       <stbcx.>: Likewise.
+       <sthcx.>: Likewise.
+       <waitrsv>: Do not enable for POWER7 and later.
+       <waitimpl>: Likewise.
+       <dcbt>: Default to the two operand form of the instruction for all
+       "old" cpus.  For "new" cpus, use the operand ordering that matches
+       whether the cpu is server or embedded.
+       <dcbtst>: Likewise.
+
+2015-04-27  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>
+
+       * s390-opc.c: New instruction type VV0UU2.
+       * s390-opc.txt: Fix instruction types for VFCE, VLDE, VFSQ, WFK,
+       and WFC.
+
+2015-04-23  Jan Beulich  <jbeulich@suse.com>
+
+       * i386-dis.c (putop): Extend "XY" handling to AVX512. Handle "XZ".
+       * i386-dis-evex.h.c (vcvtpd2ps, vcvtqq2ps, vcvttpd2udq,
+       vcvtpd2udq, vcvtuqq2ps, vcvttpd2dq, vcvtpd2dq): Add %XY.
+       (vfpclasspd, vfpclassps): Add %XZ.
+
+2015-04-15  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * i386-dis.c (PREFIX_UD_SHIFT): Removed.
+       (PREFIX_UD_REPZ): Likewise.
+       (PREFIX_UD_REPNZ): Likewise.
+       (PREFIX_UD_DATA): Likewise.
+       (PREFIX_UD_ADDR): Likewise.
+       (PREFIX_UD_LOCK): Likewise.
+
+2015-04-15  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * i386-dis.c (prefix_requirement): Removed.
+       (print_insn): Don't set prefix_requirement.  Check
+       dp->prefix_requirement instead of prefix_requirement.
+
 2015-04-15  H.J. Lu  <hongjiu.lu@intel.com>
 
        PR binutils/17898