+Tue Nov 10 15:26:27 1998 Nick Clifton <nickc@cygnus.com>
+
+start-sanitize-fr30
+ * disassemble.c (disassembler): Add support for FR30 target.
+end-sanitize-fr30
+
+Tue Nov 10 11:00:04 1998 Doug Evans <devans@canuck.cygnus.com>
+
+start-sanitize-cygnus
+ * cgen-dis.in (print_normal): CGEN_OPERAND_FAKE renamed to
+ CGEN_OPERAND_SEM_ONLY.
+end-sanitize-cygnus
+ * m32r-dis.c,m32r-opc.c,m32r-opc.h: Rebuild.
+start-sanitize-fr30
+ * fr30-dis.c,fr30-opc.c,fr30-opc.h: Rebuild.
+
+Mon Nov 9 18:22:55 1998 Dave Brolley <brolley@cygnus.com>
+
+ * po/opcodes.pot: Regenerate.
+ * po/POTFILES.in: Regenerate.
+ * fr30-opc.c: Regenerate.
+ * fr30-opc.h: Regenerate.
+end-sanitize-fr30
+Fri Nov 6 17:21:38 1998 Doug Evans <devans@canuck.cygnus.com>
+
+ * m32r-asm.c: Regenerate.
+
+start-sanitize-fr30
+Wed Nov 4 18:46:47 1998 Dave Brolley <brolley@cygnus.com>
+
+ * configure.in: Added case for bfd_fr30_arch.
+ * Makefile.am (CFILES): Added fr30-asm.c, fr30-dis.c, fr30-opc.c.
+ (ALL_MACHINES): Added fr30-asm.lo, fr30-dis.lo, fr30-opc.lo.
+ (CLEANFILES): Added stamp-fr30.
+ (FR30_DEPS): Added.
+ * fr30-asm.c: New file.
+ * fr30-dis.c: New file.
+ * fr30-opc.c: New file.
+ * fr30-opc.h: New file.
+ * po/POTFILES.in: Regenerated
+ * po/opcodes.pot: Regenerated
+
+end-sanitize-fr30
+start-sanitize-m32rx
+Mon Nov 2 20:08:03 1998 Doug Evans <devans@canuck.cygnus.com>
+
+ * m32r-opc.c (m32r_cgen_insn_table_entries): Add FILL_SLOT attribute
+ to bcl8,bncl8 entries.
+ (macro_insn_table_entries): Add FILL_SLOT attribute
+ to bcl8r,bncl8r entries.
+
+end-sanitize-m32rx
+Mon Nov 2 15:05:33 1998 Geoffrey Noer <noer@cygnus.com>
+
+ * configure.in: detect cygwin* instead of cygwin32*
+ * configure: regenerate
+
+Tue Oct 27 08:58:37 1998 Gavin Romig-Koch <gavin@cygnus.com>
+
+ * mips-opc.c (IS_M): Added.
+
+start-sanitize-r5900
+Fri Oct 23 12:06:00 EDT 1998 Frank Ch. Eigler <fche@cygnus.com>
+
+ * mips-opc.c (vrget, vclipw, vrnext): Correct COP2 opcodes
+ and masks.
+
+end-sanitize-r5900
+Mon Oct 19 13:03:19 1998 Doug Evans <devans@seba.cygnus.com>
+
+start-sanitize-cygnus
+ * cgen-asm.in (insert_1): New function.
+ (insert_normal): Progress on handling ! CGEN_INT_INSN_P.
+ (insert_insn_normal): Update handling of CGEN_INT_INSN_P.
+ (@arch@_cgen_assemble_insn): Update type of `buf' arg.
+ * cgen-dis.in (extract_1): New function.
+ (extract_normal): buf_ctrl renamed to ex_info, update type.
+ Progress on handling of CGEN_INT_INSN_P.
+ (extract_insn_normal): buf_ctrl renamed to ex_info, update type.
+ Update handling of CGEN_INT_INSN_P. Handle errors from
+ @arch@_cgen_extract_operand.
+ (print_insn): Renamed from print_int_insn. Handle ! CGEN_INT_INSN_P.
+ (default_print_insn): Renamed from print_insn.
+ Handle ! CGEN_INT_INSN_P.
+ (print_insn_@arch@): Handle error returns from print_insn.
+ * cgen-opc.in (cgen_get_insn_value, cgen_put_insn_value): New fns.
+ (@arch@_cgen_lookup_insn): Update handling of CGEN_INT_INSN_P.
+ (@arch@_cgen_lookup_get_insn_operands): Ditto.
+end-sanitize-cygnus
+ * m32r-opc.c,m32r-opc.h,m32r-asm.c,m32r-dis.c: Regenerate.
+
+start-sanitize-am33
+Wed Oct 14 12:12:25 1998 Jeffrey A Law (law@cygnus.com)
+
+ * m10300-opc.c: Allow autoincrement stores using the same register
+ for source and destination operands.
+
+Mon Oct 12 10:43:51 1998 Jeffrey A Law (law@cygnus.com)
+
+ * m10300-opc.c: DSP instrutions which only write to one general
+ register have no restrictions on matching operands.
+
+ * m10300-opc.c (lsr_add): Fix typo for "lsr_add imm,reg,reg,reg" case.
+
+end-sanitize-am33
+Fri Oct 9 14:01:56 1998 Doug Evans <devans@seba.cygnus.com>
+
+ * m32r-opc.h,m32r-opc.c: Regenerate.
+
+start-sanitize-am33
+Thu Oct 8 06:04:38 1998 Jeffrey A Law (law@cygnus.com)
+
+ * m10300-opc.c (asr, lsr, asl): Fix am33 single bit shift opcode.
+
+end-sanitize-am33
+Sun Oct 4 21:01:44 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
+
+ * i386-dis.c (OP_3DNowSuffix): New static function.
+ (OPSUF): Define.
+ (GRP14): Define.
+ (dis386_twobyte): Add GRP14, femms, and 3DNow entries.
+ (twobyte_has_modrm): Set entries corresponding to GRP14, 3DNow.
+ (insn_codep): New static variable.
+ (print_insn_x86): Init insn_codep after prefixes.
+ (grps): Add GRP14 entries for prefetch, prefetchw.
+ (OP_REG): Reformat.
+
+ From Jeff B Epler <jepler@usgs.gov>
+ * i386-dis.c (Suffix3DNow): New table.
+
+Wed Sep 30 10:17:50 1998 Nick Clifton <nickc@cygnus.com>
+
+ * d10v-opc.c: Treat TRAP as if it were a branch type instruction.
+
+Mon Sep 28 14:35:43 1998 Martin M. Hunt <hunt@cygnus.com>
+
+ * d10v-dis.c (print_operand): If num is nonzero, then
+ add OPERAND_ACC1, not OPERAND_ACC0.
+
+Thu Sep 24 09:20:03 1998 Nick Clifton <nickc@cygnus.com>
+
+ * d30v-opc.c: Add FLAG_JSR attribute to DBT, REIT, RTD, and TRAP
+ insns.
+
+Tue Sep 22 17:55:14 1998 Nick Clifton <nickc@cygnus.com>
+
+ * d30v-opc.c: Add use of EITHER_BUT_PREFER_MU execution unit
+ class.
+
+start-sanitize-sky
+Fri Sep 18 16:23:32 1998 Doug Evans <devans@canuck.cygnus.com>
+
+ * dvp-opc.c (gif_opcodes): Support EOP on gifimage.
+
+end-sanitize-sky
+Tue Sep 15 15:14:45 1998 Doug Evans <devans@canuck.cygnus.com>
+
+ * m32r-opc.h,m32r-opc.c: Add bbpc,bbpsw support.
+
+start-sanitize-nortel-ppc750
+1998-09-09 Michael Meissner <meissner@cygnus.com>
+
+ * ppc-opc.c (powerpc_opcodes): Add support for PowerPC 750 move
+ to/from SPRs.
+
+end-sanitize-nortel-ppc750
+Fri Sep 4 19:42:59 1998 Nick Clifton <nickc@cygnus.com>
+
+ * arm-dis.c (print_insn_big_arm): Detect Thumb symbols in elf
+ object files.
+ (print_insn_little_arm): Detect Thumb symbols in elf object
+ files.
+
+Sat Aug 29 22:24:09 1998 Richard Henderson <rth@cygnus.com>
+
+ * alpha-dis.c (print_insn_alpha): Use the machine type to
+ decide which PALcode set to include.
+
+Sun Aug 23 02:16:18 1998 Richard Henderson <rth@cygnus.com>
+
+ * sparc-opc.c (FBRX): Fix typo in ",a,pn %fcc3" case.
+
+Fri Aug 21 16:07:52 1998 Nick Clifton <nickc@cygnus.com>
+
+ * d30v-opc.c (d30v_opcode_table): Add FLAG_MUL32 to MAC, MACS,
+ MSUB and MSUBS instructions.
+
+start-sanitize-r5900
+Tue Aug 18 16:48:52 1998 Ian Lance Taylor <ian@cygnus.com>
+
+ * mips-opc.c: Insert contents of vu0.h, rather than including it.
+ * vu0.h: Remove.
+ * Makefile.am: Rebuild dependencies.
+ * Makefile: Rebuild.
+
+end-sanitize-r5900
+Thu Aug 13 16:23:04 1998 Ian Lance Taylor <ian@cygnus.com>
+
+ * ppc-opc.c (powerpc_operands): Omit parens around additions in
+ operand name macros.
+
+Wed Aug 12 14:00:38 1998 Ian Lance Taylor <ian@cygnus.com>
+
+start-sanitize-coldfire
+ * m68k-opc.c: Correct divsl, divul, remsl, and remul for
+ ColdFire, as below for mulsl and mulul.
+
+end-sanitize-coldfire
+ From Peter Jeremy <peter.jeremy@auss2.alcatel.com.au>:
+ * m68k-opc.c: Correct mulsl and mulul to use q rather than D, a,
+ +, -, and d for ColdFire.
+
+ From Peter Thiemann <thiemann@informatik.uni-tuebingen.de>:
+ * ppc-opc.c (insert_mbe): Handle wrapping bitmasks.
+ (extract_mbe): Likewise.
+
+Wed Aug 12 11:11:34 1998 Jeffrey A Law (law@cygnus.com)
+
+ * m10300-opc.c: Fix typo in udf20 .. udf25 instruction opcodes.
+
+ * m10300-opc.c: First cut at UDF instructions.
+
+Mon Aug 10 14:08:22 1998 Doug Evans <devans@canuck.cygnus.com>
+
+ * m32r-opc.c: Regenerate (remove semantic descriptions).
+
+Mon Aug 10 12:51:12 1998 Catherine Moore <clm@cygnus.com>
+
+ * arm-dis.c (print_insn_big_arm): Fix indentation.
+ (print_insn_little_arm): Likewise.
+
+Sun Aug 9 20:17:28 1998 Catherine Moore <clm@cygnus.com>
+
+ * arm-dis.c (print_insn_big_arm): Check for thumb symbol
+ attributes.
+ (print_insn_little_arm): Likewise.
+
+Mon Aug 3 12:43:16 1998 Doug Evans <devans@seba.cygnus.com>
+
+ Move all global state data into opcode table struct, and treat
+ opcode table as something that is "opened/closed".
+ * cgen-asm.c (all fns): New first arg of opcode table descriptor.
+ (cgen_asm_init): Delete.
+ (cgen_set_parse_operand_fn): New function.
+ * cgen-dis.c (all fns): New first arg of opcode table descriptor.
+ (cgen_dis_init): Delete.
+ * cgen-opc.c (all fns): New first arg of opcode table descriptor.
+ (cgen_current_{opcode_table_mach,endian}): Delete.
+start-sanitize-cygnus
+ * cgen-asm.in (all fns): New first arg of opcode table descriptor.
+ * cgen-dis.in (all fns): Ditto.
+ * cgen-opc.in (all fns): Ditto.
+end-sanitize-cygnus
+ * m32r-asm.c,m32r-dis.c,m32r-opc.c,m32r-opc.h: Regenerate.
+
+start-sanitize-cygnus
+ * cgen-asm.in (parse_insn_normal): Ignore case in mnemonics.
+
+ * cgen-dis.in (print_normal): Split into two.
+ (print_address): New function.
+ (extract_insn_normal): Clarify insn_value arg.
+ (print_int_insn): Renamed from print_insn.
+ (print_insn): New arg.
+ (print_insn_@arch@): Open opcode table if not already done so.
+ Move reading of insn into print_insn.
+
+end-sanitize-cygnus
+Thu Jul 30 21:41:10 1998 Frank Ch. Eigler <fche@cygnus.com>
+
+ * d30v-opc.c (d30v_opcode_table): Add new "LKR" flag to some
+ instructions.
+
+start-sanitize-m32rx
+Tue Jul 28 13:15:39 1998 Doug Evans <devans@canuck.cygnus.com>
+
+ Add support for new versions of mulwhi,mulwlo,macwhi,macwlo that
+ accept an accumulator choice.
+ * m32r-opc.c,m32r-opc.h: Regenerate.
+
+end-sanitize-m32rx
Tue Jul 28 11:00:09 1998 Jeffrey A Law (law@cygnus.com)
* m10300-opc.c: Add entries for "no_match_operands" field in
(sqrt.s): Likewise.
end-sanitize-r5900
-start-sanitize-vr5400
+start-sanitize-cygnus
Thu May 28 08:46:09 1998 Catherine Moore <clm@cygnus.com>
* mips-opc.c (macc, maccu, macchi, macchiu, msac, msacu, msachi, msachiu):
Change pinfo to use WR_HILO.
-end-sanitize-vr5400
+end-sanitize-cygnus
Wed May 27 15:29:13 1998 Nick Clifton <nickc@cygnus.com>
* d30v-opc.c: Add new operand: Ra3. Change SHORT_B3, SHORT_B3b,
sh-opc.h (sh_table): Remove ftst/nan.
-start-sanitize-vr5400
+start-sanitize-cygnus
Mon Nov 3 13:23:15 1997 Ken Raeburn <raeburn@cygnus.com>
* mips-opc.c (dror32, dror, rzu.ob): Fix bugs in encoding.
last.
* mips-dis.c (print_insn_arg): Handle VR5400 operand types.
-end-sanitize-vr5400
+end-sanitize-cygnus
start-sanitize-tx49
Wed Oct 29 15:10:56 1997 Gavin Koch <gavin@cygnus.com>
Mon Oct 27 22:34:03 1997 Ken Raeburn <raeburn@cygnus.com>
* mips-opc.c: Fix bug in mask for "not" pseudo-instruction.
-start-sanitize-vr5400
+start-sanitize-cygnus
Added VR5400 instructions.
(N5): New cpu-id macro.
-end-sanitize-vr5400
+end-sanitize-cygnus
(WR_HILO, RD_HILO, MOD_HILO): New macros.
Mon Oct 27 22:34:03 1997 Ken Raeburn <raeburn@cygnus.com>
projects / deliverable / binutils-gdb.git / blobdiff