Fix spelling mistakes in comments in configure scripts
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
index 6a92b75728f6fb6f0d6616ac436c09e9c6816675..a839a68114a1a626c9c0ea3a32338fa47d90c25b 100644 (file)
@@ -1,3 +1,53 @@
+2016-11-22  Ambrogino Modigliani  <ambrogino.modigliani@gmail.com>
+
+        * configure: Regenerate.
+
+2016-11-22  Jose E. Marchesi  <jose.marchesi@oracle.com>
+
+       * sparc-opc.c (HWS_V8): Definition moved from
+       gas/config/tc-sparc.c.
+       (HWS_V9): Likewise.
+       (HWS_VA): Likewise.
+       (HWS_VB): Likewise.
+       (HWS_VC): Likewise.
+       (HWS_VD): Likewise.
+       (HWS_VE): Likewise.
+       (HWS_VV): Likewise.
+       (HWS_VM): Likewise.
+       (HWS2_VM): Likewise.
+       (sparc_opcode_archs): Initialize hwcaps and hwcaps2 fields of
+       existing entries.
+
+2016-11-22  Claudiu Zissulescu  <claziss@synopsys.com>
+
+       * arc-tbl.h: Reorder conditional flags with delay flags for 'b'
+       instructions.
+
+2016-11-18  Szabolcs Nagy  <szabolcs.nagy@arm.com>
+
+       * aarch64-tbl.h (QL_V3SAMEHSD_ROT, QL_ELEMENT_ROT): Define.
+       (aarch64_feature_simd_v8_3, SIMD_V8_3): Define.
+       (aarch64_opcode_table): Add fcmla and fcadd.
+       (AARCH64_OPERANDS): Add IMM_ROT{1,2,3}.
+       * aarch64-asm.h (aarch64_ins_imm_rotate): Declare.
+       * aarch64-asm.c (aarch64_ins_imm_rotate): Define.
+       * aarch64-dis.h (aarch64_ext_imm_rotate): Declare.
+       * aarch64-dis.c (aarch64_ext_imm_rotate): Define.
+       * aarch64-opc.h (enum aarch64_field_kind): Add FLD_rotate{1,2,3}.
+       * aarch64-opc.c (fields): Add FLD_rotate{1,2,3}.
+       (operand_general_constraint_met_p): Rotate and index range check.
+       (aarch64_print_operand): Handle rotate operand.
+       * aarch64-asm-2.c: Regenerate.
+       * aarch64-dis-2.c: Likewise.
+       * aarch64-opc-2.c: Likewise.
+
+2016-11-18  Szabolcs Nagy  <szabolcs.nagy@arm.com>
+
+       * aarch64-tbl.h (arch64_opcode_table): Add ldaprb, ldaprh, ldapr.
+       * aarch64-asm-2.c: Regenerate.
+       * aarch64-dis-2.c: Regenerate.
+       * aarch64-opc-2.c: Regenerate.
+
 2016-11-18  Szabolcs Nagy  <szabolcs.nagy@arm.com>
 
        * aarch64-tbl.h (arch64_opcode_table): Add fjcvtzs.
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