Thu Jan 30 12:28:18 1997 Alan Modra <alan@spri.levels.unisa.edu.au>

[deliverable/binutils-gdb.git] / opcodes / ChangeLog

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index d26deb8e8fa034d7970e16caaa7345ff97f2b252..a855cc542a392ae8e5d488074074abe43086a278 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,40 @@
+Wed Jan 29 09:39:17 1997  Jeffrey A Law  (law@cygnus.com)
+
+       * mn10200-opc.c (mn10200_operands): Make 8 and 16 bit pc-relative
+       branchs relaxable.
+
+Tue Jan 28 15:57:34 1997  Ian Lance Taylor  <ian@cygnus.com>
+
+       * mips-dis.c (print_insn_mips16): Set insn_info information.
+       (print_mips16_insn_arg): Likewise.
+
+       * mips-dis.c (print_insn_mips16): Better handling of an extend
+       opcode followed by an instruction which can not be extended.
+
+Fri Jan 24 12:08:21 1997  J.T. Conklin  <jtc@cygnus.com>
+
+       * m68k-opc.c (m68k_opcodes): Changed operand specifier for the
+       coldfire moveb instruction to not allow an address register as
+       destination.  Although the documentation does not indicate that
+       this is invalid, experiments uncovered unexpected behavior.  
+       Added a comment explaining the situation.  Thanks to Andreas
+       Schwab for pointing this out to me.
+
+start-sanitize-tic80
+Wed Jan 22 20:13:51 1997  Fred Fish  <fnf@cygnus.com>
+
+       * tic80-opc.c (tic80_opcodes): Expand comment to note that the
+       entries are presorted so that entries with the same mnemonic are
+       adjacent to each other in the table.  Sort the entries for each
+       instruction so that this is true.
+       
+end-sanitize-tic80
+Mon Jan 20 12:48:57 1997  Andreas Schwab  <schwab@issan.informatik.uni-dortmund.de>
+
+       * m68k-dis.c: Include <libiberty.h>.
+       (print_insn_m68k): Sort the opcode table on the most significant
+       nibble of the opcode.
+
 start-sanitize-tic80
 Sat Jan 18 15:15:05 1997  Fred Fish  <fnf@cygnus.com>