+2015-08-12 Simon Dardis <simon.dardis@imgtec.com>
+
+ * micromips-opc.c (micromips_opcodes): Re-order table so that move
+ based on 'or' is first.
+ * mips-opc.c (mips_builtin_opcodes): Ditto.
+
+2015-08-11 Nick Clifton <nickc@redhat.com>
+
+ PR 18800
+ * aarch64-tbl.h (aarch64_opcode_table): Fix mask for SIMD EXT
+ instruction.
+
+2015-08-10 Robert Suchanek <robert.suchanek@imgtec.com>
+
+ * mips-opc.c (mips_builtin_opcodes): Add "sigrie".
+
+2015-08-07 Amit Pawar <Amit.Pawar@amd.com>
+
+ * i386-gen.c: Remove CpuFMA4 from CPU_ZNVER1_FLAGS.
+ * i386-init.h: Regenerated.
+
+2015-07-30 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR binutils/13571
+ * i386-dis.c (MOD_0FC3): New.
+ (PREFIX_0FC3): Renamed to ...
+ (PREFIX_MOD_0_0FC3): This.
+ (dis386_twobyte): Replace PREFIX_0FC3 with MOD_0FC3.
+ (prefix_table): Replace Ma with Ev on movntiS.
+ (mod_table): Add MOD_0FC3.
+
+2015-07-27 H.J. Lu <hongjiu.lu@intel.com>
+
+ * configure: Regenerated.
+
+2015-07-23 Alan Modra <amodra@gmail.com>
+
+ PR 18708
+ * i386-dis.c (get64): Avoid signed integer overflow.
+
+2015-07-22 Alexander Fomin <alexander.fomin@intel.com>
+
+ PR binutils/18631
+ * i386-dis-evex.h (EVEX_W_0F78_P_2): Replace "EXxmmq" with
+ "EXEvexHalfBcstXmmq" for the second operand.
+ (EVEX_W_0F79_P_2): Likewise.
+ (EVEX_W_0F7A_P_2): Likewise.
+ (EVEX_W_0F7B_P_2): Likewise.
+
+2015-07-16 Alessandro Marzocchi <alessandro.marzocchi@gmail.com>
+
+ * arm-dis.c (print_insn_coprocessor): Added support for quarter
+ float bitfield format.
+ (coprocessor_opcodes): Changed VFP vmov reg,immediate to use new
+ quarter float bitfield format.
+
+2015-07-14 H.J. Lu <hongjiu.lu@intel.com>
+
+ * configure: Regenerated.
+
+2015-07-03 Alan Modra <amodra@gmail.com>
+
+ * ppc-opc.c (PPC750, PPC7450, PPC860): Define using PPC_OPCODE_*.
+ * ppc-dis.c (ppc_opts): Add 821, 850 and 860 entries. Add
+ PPC_OPCODE_7450 to 7450 entry. Add PPC_OPCODE_750 to 750cl entry.
+
+2015-07-01 Sandra Loosemore <sandra@codesourcery.com>
+ Cesar Philippidis <cesar@codesourcery.com>
+
+ * nios2-dis.c (nios2_extract_opcode): New.
+ (nios2_disassembler_state): New.
+ (nios2_find_opcode_hash): Use mach parameter to select correct
+ disassembler state.
+ (nios2_print_insn_arg): Extend to support new R2 argument letters
+ and formats.
+ (print_insn_nios2): Check for 16-bit instruction at end of memory.
+ * nios2-opc.c (nios2_builtin_regs): Add R2 register attributes.
+ (NIOS2_NUM_OPCODES): Rename to...
+ (NIOS2_NUM_R1_OPCODES): This.
+ (nios2_r2_opcodes): New.
+ (NIOS2_NUM_R2_OPCODES): New.
+ (nios2_num_r2_opcodes): New.
+ (nios2_r2_asi_n_mappings, nios2_num_r2_asi_n_mappings): New.
+ (nios2_r2_shi_n_mappings, nios2_num_r2_shi_n_mappings): New.
+ (nios2_r2_andi_n_mappings, nios2_num_r2_andi_n_mappings): New.
+ (nios2_r2_reg3_mappings, nios2_num_r2_reg3_mappings): New.
+ (nios2_r2_reg_range_mappings, nios2_num_r2_reg_range_mappings): New.
+
+2015-06-30 Amit Pawar <Amit.Pawar@amd.com>
+
+ * i386-dis.c (OP_Mwaitx): New.
+ (rm_table): Add monitorx/mwaitx.
+ * i386-gen.c (cpu_flag_init): Add CpuMWAITX to CPU_BDVER4_FLAGS
+ and CPU_ZNVER1_FLAGS. Add CPU_MWAITX_FLAGS.
+ (operand_type_init): Add CpuMWAITX.
+ * i386-opc.h (CpuMWAITX): New.
+ (i386_cpu_flags): Add cpumwaitx.
+ * i386-opc.tbl: Add monitorx and mwaitx.
+ * i386-init.h: Regenerated.
+ * i386-tbl.h: Likewise.
+
+2015-06-22 Peter Bergner <bergner@vnet.ibm.com>
+
+ * ppc-opc.c (insert_ls): Test for invalid LS operands.
+ (insert_esync): New function.
+ (LS, WC): Use insert_ls.
+ (ESYNC): Use insert_esync.
+
+2015-06-22 Nick Clifton <nickc@redhat.com>
+
+ * dis-buf.c (buffer_read_memory): Fail is stop_vma is set and the
+ requested region lies beyond it.
+ * bfin-dis.c (print_insn_bfin): Ignore sysop instructions when
+ looking for 32-bit insns.
+ * mcore-dis.c (print_insn_mcore): Disable stop_vma when reading
+ data.
+ * sh-dis.c (print_insn_sh): Likewise.
+ * tic6x-dis.c (print_insn_tic6x): Disable stop_vma when reading
+ blocks of instructions.
+ * vax-dis.c (print_insn_vax): Check that the requested address
+ does not clash with the stop_vma.
+
+2015-06-19 Peter Bergner <bergner@vnet.ibm.com>
+
+ * ppc-dis.h (skip_optional_operands): Use ppc_optional_operand_value.
+ * ppc-opc.c (FXM4): Add non-zero optional value.
+ (TBR): Likewise.
+ (SXL): Likewise.
+ (insert_fxm): Handle new default operand value.
+ (extract_fxm): Likewise.
+ (insert_tbr): Likewise.
+ (extract_tbr): Likewise.
+
+2015-06-16 Matthew Wahab <matthew.wahab@arm.com>
+
+ * arch64-opc.c (aarch64_sys_regs): Add "id_mmfr4_el1".
+
+2015-06-16 Szabolcs Nagy <szabolcs.nagy@arm.com>
+
+ * arm-dis.c (print_insn_coprocessor): Avoid negative shift.
+
+2015-06-12 Peter Bergner <bergner@vnet.ibm.com>
+
+ * ppc-opc.c: Add comment accidentally removed by old commit.
+ (MTMSRD_L): Delete.
+
+2015-06-04 Peter Bergner <bergner@vnet.ibm.com>
+
+ * ppc-opc.c: (powerpc_opcodes) <hwsync>: New extended mnemonic.
+
2015-06-04 Nick Clifton <nickc@redhat.com>
PR 18474
projects / deliverable / binutils-gdb.git / blobdiff