+2000-11-24 Nick Clifton <nickc@redhat.com>
+
+ * arm-opc.h: Add new opcode formatting parameter 'B'.
+ (arm_opcodes): Add XScale, v5, and v5te instructions.
+ (thumb_opcodes): Add v5t instructions.
+
+ * arm-dis.c (print_insn_arm): Handle new 'B' format
+ parameter.
+ (print_insn_thumb): Decode BLX(1) instruction.
+
+2000-11-21 Chris Demetriou <cgd@sibyte.com>
+
+ * mips-opc.c: Fix file header comment.
+
+2000-11-14 Hans-Peter Nilsson <hp@axis.com>
+
+ * cris-dis.c (cris_get_disassembler): If abfd is NULL, return
+ print_insn_cris_with_register_prefix.
+
+2000-11-11 Alexandre Oliva <aoliva@redhat.com>
+
+ * sh-opc.h: The operand of `mov.w r0, (<disp>,GBR)' is IMM1, not 0.
+
+2000-11-07 Matthew Green <mrg@redhat.com>
+
+ * cgen-dis.in (print_insn): All insns which can fit into insn_value
+ must be loaded there in their entirety.
+
+2000-10-20 Jakub Jelinek <jakub@redhat.com>
+
+ * sparc-dis.c (v9a_asr_reg_names): Add v9b ASRs.
+ (compute_arch_mask): Add v8plusb and v9b machines.
+ (print_insn_sparc): siam mode decoding, accept ASRs up to 25.
+ * opcodes/sparc-opc.c: Support for Cheetah instruction set.
+ (prefetch_table): Add #invalidate.
+
+2000-10-16 Nick Clifton <nickc@redhat.com>
+
+ * mcore-dis.c (imsk): Change mask for OC to 0xFE00.
+
+2000-10-06 Dave Brolley <brolley@redhat.com>
+
+ * fr30-desc.h: Regenerate.
+ * m32r-desc.h: Regenerate.
+ * m32r-ibld.c: Regenerate.
+
+2000-10-05 Jim Wilson <wilson@cygnus.com>
+
+ * ia64-ic.tbl: Update from Intel.
+ * ia64-asmtab.c: Regenerate.
+
+2000-10-04 Kazu Hirata <kazu@hxi.com>
+
+ * ia64-gen.c: Convert C++-style comments to C-style comments.
+ * tic54x-dis.c: Likewise.
+
+2000-09-29 Hans-Peter Nilsson <hp@axis.com>
+
+ Changes to add dollar prefix to registers for files where user symbols
+ don't have a leading underscore. Fix formatting.
+ * cris-dis.c (REGISTER_PREFIX_CHAR): New.
+ (format_reg): Add parameter with_reg_prefix. All callers changed.
+ (print_with_operands): Ditto.
+ (print_insn_cris_generic): Renamed from print_insn_cris, add
+ parameter with_reg_prefix.
+ (print_insn_cris_with_register_prefix,
+ print_insn_cris_without_register_prefix, cris_get_disassembler):
+ New.
+ * disassemble.c (disassembler) [ARCH_cris]: Call cris_get_disassembler.
+
+2000-09-22 Jim Wilson <wilson@cygnus.com>
+
+ * ia64-opc-f.c (ia64_opcodes_f): Add fpcmp pseudo-ops for
+ gt, ge, ngt, and nge.
+ * ia64-asmtab.c: Regenerate.
+
+ * ia64-dis.c (print_insn_ia64): Revert Aug 7 byte skip count change.
+ * ia64-gen.c (parse_semantics): Handle IA64_DVS_STOP.
+ (lookup_specifier): Handle "PR%, 1 to 15" and "PR%, 16 to 62".
+ * ia64-ic.tbl, ia64-raw.tbl, ia64-war.tbl, ia64-waw.tbl: Update.
+ * ia64-asmtab.c: Regnerate.
+
+2000-09-13 Anders Norlander <anorland@acc.umu.se>
+
+ * mips-opc.c (mips_builtin_opcodes): Support cache instruction on 4K cores.
+ Add mfc0 and mtc0 with sub-selection values.
+ Add clo and clz opcodes.
+ Add msub and msubu instructions for MIPS32.
+ Add madd/maddu aliases for mad/madu for MIPS32.
+ Support wait, deret, eret, movn, pref for MIPS32.
+ Support tlbp, tlbr, tlbwi, tlbwr.
+ (P4): New define.
+
+ * mips-dis.c (print_insn_arg): Print sdbbp 'm' args.
+ (print_insn_arg): Handle 'H' args.
+ (set_mips_isa_type): Recognize 4K.
+ Use CPU_* defines instead of hardcoded numbers.
+
+2000-09-11 Catherine Moore <clm@redhat.com>
+
+ * d30v-opc.c (d30v_operand_t): New operand type Rb2.
+ (d30v_format_tab): Use Rb2 for modinc and moddec.
+
+2000-09-07 Catherine Moore <clm@redhat.com>
+
+ * d30v-opc.c (d30v_format_tab): Use format Ra for
+ modinc and moddec.
+
+2000-09-06 Alexandre Oliva <aoliva@redhat.com>
+
+ * configure: Rebuilt with new libtool.m4.
+
+2000-09-05 Nick Clifton <nickc@redhat.com>
+
+ * configure: Regenerate.
+ * po/opcodes.pot: Regenerate.
+
+2000-08-31 Alexandre Oliva <aoliva@redhat.com>
+
+ * acinclude.m4: Include libtool and gettext macros from the
+ top level.
+ * aclocal.m4, configure: Rebuilt.
+
+2000-08-30 Kazu Hirata <kazu@hxi.com>
+
+ * tic80-dis.c: Fix formatting.
+
2000-08-29 Kazu Hirata <kazu@hxi.com>
* w65-dis.c: Fix formatting.
+2000-08-28 Mark Hatle <mhatle@mvista.com>
+
+ * ppc-opc.c: Add XTLB macro for a few PPC 4xx extended mnemonics.
+ (powerpc_opcodes): Add table entries for PPC 405 instructions.
+ Changed rfci, icbt, mfdcr, dccci, mtdcr, iccci from PPC to PPC403
+ instructions. Added extended mnemonic mftbl as defined in the
+ 405GP manual for all PPCs.
+
2000-08-28 Jim Wilson <wilson@cygnus.com>
* ia64-dis.c (print_insn_ia64): Add failed label after ia64_free_opcode
* ia64-dis.c (print_insn_ia64): Get byte skip count correct
for MLI templates. Handle IA64_OPND_TGT64.
+2000-08-04 Ben Elliston <bje@redhat.com>
+
+ * cgen-dis.in, cgen-asm.in, cgen-ibld.in: New files.
+ * cgen.sh: Likewise.
+
+2000-08-02 Jim Wilson <wilson@cygnus.com>
+
+ * ia64-dis.c (print_insn_ia64): Call ia64_free_opcode at end.
+
2000-07-29 Marek Michalkiewicz <marekm@linux.org.pl>
* avr-dis.c (avr_operand): Use PARAMS macro in declaration.
as ld/st. Check avr_operand () return value, handle invalid
combinations of operands like unknown opcodes.
-2000-08-04 Ben Elliston <bje@redhat.com>
-
- * cgen-dis.in, cgen-asm.in, cgen-ibld.in: New files.
- * cgen.sh: Likewise.
-
-2000-08-02 Jim Wilson <wilson@cygnus.com>
-
- * ia64-dis.c (print_insn_ia64): Call ia64_free_opcode at end.
-
2000-07-28 Ben Elliston <bje@redhat.com>
* Makefile.am (CGEN, CGENDEPS, CGENDIR, CGENFLAGS): New.
(print_insn_little_powerpc): Likewise.
(print_insn_powerpc): Prepend 'v' when printing vector registers.
+Mon Apr 24 15:21:35 2000 Clinton Popetz <cpopetz@cygnus.com>
+
+ * configure.in: Add bfd_powerpc_64_arch.
+ * disassemble.c (disassembler): Use print_insn_big_powerpc for
+ 64 bit code.
+
+2000-04-24 Nick Clifton <nickc@cygnus.com>
+
+ * fr30-desc.c (fr30_cgen_cpu_open): Initialise signed_overflow
+ field.
+
Sun Apr 23 17:54:14 2000 Denis Chertykov <denisc@overta.ru>
* avr-dis.c (reg_fmul_d): New. Extract destination register from
(print_insn_avr): Handle MOVW, MULS, MULSU, FMUL, FMULS, FMULSU,
EICALL, EIJMP, LPM r,Z, ELPM r,Z, SPM, ESPM instructions.
-Mon Apr 24 15:21:35 2000 Clinton Popetz <cpopetz@cygnus.com>
-
- * configure.in: Add bfd_powerpc_64_arch.
- * disassemble.c (disassembler): Use print_insn_big_powerpc for
- 64 bit code.
-
-2000-04-24 Nick Clifton <nickc@cygnus.com>
-
- * fr30-desc.c (fr30_cgen_cpu_open): Initialise signed_overflow
- field.
-
2000-04-22 Timothy Wall <twall@cygnus.com>
* ia64-gen.c (general): Add an ordered table of primary