+2001-05-15 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
+
+ * mips-dis.c (INSNLEN): Rename MAXLEN.
+ (std_reg_names): Replace by mips32_reg_names and mips64_reg_names.
+ (print_insn_arg): Remove $ prefix of register names.
+ (set_mips_isa_type): Remove.
+ (imps_isa_type): New function.
+ (get_mips_isa): New Function.
+ (print_insn_mips): Rename _print_insn_mips.
+ (_print_insn_mips): New function, contains code which was
+ duplicated in print_insn_big_mips and print_insn_little_mips.
+ (print_insn_big_mips): Moved code to _print_insn_mips.
+ (print_insn_little_mips): Likewise.
+ (print_mips16_insn_arg): Remove $ prefix of register names.
+ Print error message before abort.
+
+2001-05-14 J.T. Conklin <jtc@redback.com>
+
+ * ppc-opc.c (powerpc_opcodes): Fixed extended opcode field of
+ simplified mnemonics used for setting PPC750-specific special
+ purpose registers.
+
+2001-05-12 H.J. Lu <hjl@gnu.org>
+
+ * i386-dis.c (print_insn_i386): Always set `mod', `reg' and
+ `rm'.
+
+2001-05-12 Peter Targett <peter.targett@arccores.com>
+
+ * arc-opc.c (arc_reg_names): Correct attribute for lp_count
+ register to r/w. Formatting fixes throughout file.
+
+2001-05-12 Alan Modra <amodra@one.net.au>
+
+ * i386-dis.c (prefix_user_table): Correct movq2dq, movdq2q, and
+ movq operands.
+ (twobyte_has_modrm): Update table.
+ (need_modrm): Give it file scope.
+ (MODRM_CHECK): Define.
+ (dofloat): Use MODRM_CHECK.
+ (OP_E): Likewise.
+ (OP_EM): Likewise.
+ (OP_EX): Likewise.
+
+2001-05-07 Frank Ch. Eigler <fche@redhat.com>
+
+ * cgen-dis.in (default_print_insn): Tolerate min<base instructions
+ even at end of a section.
+ * cgen-ibld.in (extract_normal): Tolerate min!=base!=max instructions
+ by ignoring precariously-unpacked insn_value in favor of raw buffer.
+
+2001-05-03 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
+
+ * disassemble.c (disassembler_usage): Remove unused attribute.
+
+2001-05-04 Frank Ch. Eigler <fche@redhat.com>
+
+ * m32r-dis.c, -asm.c, -ibld.c: Regenerated with disassembler fixes.
+
+2001-05-04 Frank Ch. Eigler <fche@redhat.com>
+
+ * cgen-dis.in (print_insn): Remove call to read_insn. Instead,
+ assume incoming buffer already has the base insn loaded. Handle
+ smaller-than-base instructions for variable-length case.
+
+2001-05-04 Alan Modra <amodra@one.net.au>
+
+ * i386-dis.c (Ev, Ed): Remove duplicate define.
+ (Gd): Define.
+ (XS): Define.
+ (OP_XS): New function.
+ (dis386_twobyte_att): Correct pinsrw, pextrw, pmovmskb, and
+ movmskp operands.
+ (dis386_twobyte_intel): Likewise.
+ (prefix_user_table): Use MS for maskmovq operand.
+
+2001-04-27 Johan Rydberg <jrydberg@opencores.org>
+
+ * Makefile.am: Add OpenRISC target.
+ * Makefile.in: Regenerated.
+
+ * disassemble.c (disassembler): Recognize the OpenRISC disassembly.
+
+ * configure.in (bfd_openrisc_arch): Add target.
+ * configure: Regenerated.
+
+ * openrisc-asm.c: New file.
+ * openrisc-desc.c: Likewise.
+ * openrisc-desc.h: Likewise.
+ * openrisc-dis.c: Likewise.
+ * openrisc-ibld.c: Likewise.
+ * openrisc-opc.c: Likewise.
+ * openrisc-opc.h: Likewise.
+
+2001-04-24 Christian Groessler <cpg@aladdin.de>
+
+ * z8k-dis.c: add names of control registers (ctrl_names);
+ (seg_length): provides instruction length fixup for segmented
+ mode; (unpack_instr): correctly handle ARG_DISP16, ARG_DISP12,
+ CLASS_0DISP7, CLASS_1DISP7, CLASS_DISP8 and CLASS_PR cases;
+ (unparse_intr): handle CLASS_PR, print addresses without '#'
+ * z8k-opc.h: re-created with new z8kgen
+ * z8kgen.c: merged in fixes which were in existing z8k-opc.h; new
+ entries for ldctl/ldctlb instruction
+
+2001-04-06 Andreas Jaeger <aj@suse.de>
+
+ * i386-dis.c: Add ffreep instruction.
+
+2001-03-30 Alexandre Oliva <aoliva@redhat.com>
+
+ * ppc-opc.c (insert_mbe): Shift mask initializer as long.
+
+2001-03-24 Alan Modra <alan@linuxcare.com.au>
+
+ * i386-dis.c (PREGRP25): Define.
+ (dis386_twobyte_att): Use here in place of "movntq" entry.
+ (dis386_twobyte_intel): Likewise.
+ (prefix_user_table): Add PREGRP25 entry for "movntq" and "movntdq".
+ (PREGRP26): Define.
+ (dis386_twobyte_att): Use here.
+ (dis386_twobyte_intel): Likewise.
+ (prefix_user_table): Add PREGRP26 entry for "punpcklqdq".
+ (prefix_user_table <maskmovdqu>): XM operand, not MX.
+ (prefix_user_table): Cosmetic changes to "bad" entries.
+
+2001-03-23 Nick Clifton <nickc@redhat.com>
+
+ * mips-opc.c: Remove extraneous whitespace.
+ * mips-dis.c: Remove extraneous whitespace.
+
+2001-03-22 Ben Elliston <bje@redhat.com>
+
+ * cgen-asm.in (@arch@_cgen_assemble_insn): Move tmp_errmsg
+ declaration inside CGEN_VERBOSE_ASSEMBLER_ERRORS conditional.
+ * cgen-ibld.in (put_insn_int_value): Mark cd parameter as unused
+ to allay a compiler warning.
+
+2001-03-22 Alan Modra <alan@linuxcare.com.au>
+
+ * i386-dis.c (dis386_twobyte_att): Add entries for paddq, psubq.
+ (dis386_twobyte_intel): Likewise.
+ (twobyte_has_modrm): Set entry for paddq, psubq.
+
+2001-03-20 Patrick Macdonald <patrickm@redhat.com>
+
+ * cgen-dis.in (print_insn_@arch@): Add support for target machine
+ determination via CGEN_COMPUTE_MACH.
+ * fr30-desc.c: Regenerate.
+ * fr30-dis.c: Regenerate.
+ * fr30-opc.h: Regenerate.
+ * m32r-desc.c: Regenerate.
+ * m32r-dis.c: Regenerate.
+ * m32r-opc.h: Regenerate.
+ * m32r-opinst.c: Regenerate.
+
+2001-03-20 H.J. Lu <hjl@gnu.org>
+
+ * configure.in: Remove the redundent AC_ARG_PROGRAM.
+ * configure: Rebuild.
+
+2001-03-19 Jim Wilson <wilson@redhat.com>
+
+ * ia64-gen.c (fetch_insn_class): If xsect, then ignore comment and
+ notestr if larger than xsect.
+ (in_class): Handle format M5.
+ * ia64-asmtab.c: Regnerate.
+
+2001-03-19 John David Anglin <dave@hiauly1.hia.nrc.ca>
+
+ * vax-dis.c (print_insn_vax): Only fetch two bytes if the info buffer
+ has more than one byte left to read.
+
+2001-03-16 Martin Schwidefsky <schwidefsky@de.ibm.com>
+
+ * s390-opc.c: Add new opcodes. Smooth out formatting.
+ * s390-opc.txt: Add new opcodes.
+
+2001-03-06 Nick Clifton <nickc@redhat.com>
+
+ * arm-dis.c (print_insn_thumb): Compute destination address
+ of BLX(1) instruction by taking bit 1 from PC and not from bit
+ 0 of the offset.
+
+2001-03-06 Igor Shevlyakov <igor@windriver.com>
+
+ * m68k-dis.c (print_insn_m68k): Recognize Coldfire CPUs
+ so command line switches will work.
+
+2001-03-05 Dave Brolley <brolley@redhat.com>
+
+ * fr30-asm.c: Regenerate.
+ * fr30-desc.c: Regenerate.
+ * fr30-desc.h: Regenerate.
+ * fr30-dis.c: Regenerate.
+ * fr30-ibld.c: Regenerate.
+ * fr30-opc.c: Regenerate.
+ * fr30-opc.h: Regenerate.
+ * m32r-asm.c: Regenerate.
+ * m32r-desc.c: Regenerate.
+ * m32r-desc.h: Regenerate.
+ * m32r-dis.c: Regenerate.
+ * m32r-ibld.c: Regenerate.
+ * m32r-opc.c: Regenerate.
+ * m32r-opc.h: Regenerate.
+ * m32r-opinst.c: Regenerate.
+
+2001-02-28 Igor Shevlyakov <igor@windriver.com>
+
+ * m68k-opc.c: fix cpushl according to Motorola. Enable
+ bunch of instructions for Coldfire 5407 and add all new.
+
+2001-02-27 Alan Modra <alan@linuxcare.com.au>
+
+ * configure.in (BFD_VERSION): Do without grep.
+ * configure: Regenerate.
+ * Makefile.am: Run "make dep-am".
+ * Makefile.in: Regenerate.
+
+2001-02-23 David Mosberger <davidm@hpl.hp.com>
+
+ * ia64-opc-a.c: Add missing pseudo-ops for "cmp" and "cmp4".
+ * ia64-asmtab.c: Regenerate.
+
2001-02-21 David Mosberger <davidm@hpl.hp.com>
* ia64-opc-d.c (ia64_opcodes_d): Break the "add" pattern into two
separate variants: one for IMM22 and the other for IMM14.
* ia64-asmtab.c: Regenerate.
-
+
2001-02-21 Greg McGary <greg@mcgary.org>
* cgen-opc.c (cgen_get_insn_value): Add missing `return'.
2001-02-02 Patrick Macdonald <patrickm@redhat.com>
- * fr30-desc.h: Regenerate with CGEN_MAX_SYNTAX_ELEMENTS.
+ * fr30-desc.h: Regenerate with CGEN_MAX_SYNTAX_ELEMENTS.
* m32r-desc.h: Regenerate.
Thu Feb 1 16:29:06 MET 2001 Jan Hubicka <jh@suse.cz>
* ia64-dis.c (print_insn_ia64): Cast away const on ia64_free_opcode
argument.
- * ia64_gen.c (insert_deplist): Cast sizeof result to int.
+ * ia64-gen.c (insert_deplist): Cast sizeof result to int.
(print_dependency_table): Print NULL if semantics field not set.
(insert_opcode_dependencies): Mark cmp parameter as unused.
(print_main_table): Use fprintf_vma to print long long fields.
Delete "sel" code operands from mfc1 and mtc1.
Add MIPS64 opcode changes (dclo, dclz), and "sel" code variants
for dm[ft]c[023].
-
+
2000-12-03 Ed Satterthwaite ehs@sibyte.com and
Chris Demetriou cgd@sibyte.com
"mfc2," "mfc3," "mtc1," "mtc2," and "mtc3" for MIPS32. Update
MIPS32 "sdbbp" to use 'B' operand specifier. Add MIPS32
"wait" variant which uses 'J' operand specifier.
-
+
* mips-dis.c (set_mips_isa_type): Update to use
CPU_UNKNOWN and ISA_* constants. Add bfd_mach_mips32 case.
Replace bfd_mach_mips4K with bfd_mach_mips32_4k case.
* sparc-dis.c (v9a_asr_reg_names): Add v9b ASRs.
(compute_arch_mask): Add v8plusb and v9b machines.
(print_insn_sparc): siam mode decoding, accept ASRs up to 25.
- * opcodes/sparc-opc.c: Support for Cheetah instruction set.
+ * sparc-opc.c: Support for Cheetah instruction set.
(prefetch_table): Add #invalidate.
2000-10-16 Nick Clifton <nickc@redhat.com>
* ia64-ic.tbl: Update from Intel.
* ia64-asmtab.c: Regenerate.
-
+
2000-10-04 Kazu Hirata <kazu@hxi.com>
* ia64-gen.c: Convert C++-style comments to C-style comments.
* ia64-asmtab.c: Regnerate.
2000-09-13 Anders Norlander <anorland@acc.umu.se>
-
- * mips-opc.c (mips_builtin_opcodes): Support cache instruction on 4K cores.
- Add mfc0 and mtc0 with sub-selection values.
+
+ * mips-opc.c (mips_builtin_opcodes): Support cache instruction on 4K cores.
+ Add mfc0 and mtc0 with sub-selection values.
Add clo and clz opcodes.
- Add msub and msubu instructions for MIPS32.
- Add madd/maddu aliases for mad/madu for MIPS32.
- Support wait, deret, eret, movn, pref for MIPS32.
+ Add msub and msubu instructions for MIPS32.
+ Add madd/maddu aliases for mad/madu for MIPS32.
+ Support wait, deret, eret, movn, pref for MIPS32.
Support tlbp, tlbr, tlbwi, tlbwr.
- (P4): New define.
-
- * mips-dis.c (print_insn_arg): Print sdbbp 'm' args.
- (print_insn_arg): Handle 'H' args.
- (set_mips_isa_type): Recognize 4K.
+ (P4): New define.
+
+ * mips-dis.c (print_insn_arg): Print sdbbp 'm' args.
+ (print_insn_arg): Handle 'H' args.
+ (set_mips_isa_type): Recognize 4K.
Use CPU_* defines instead of hardcoded numbers.
2000-09-11 Catherine Moore <clm@redhat.com>
* d30v-opc.c (d30v_operand_t): New operand type Rb2.
(d30v_format_tab): Use Rb2 for modinc and moddec.
-
+
2000-09-07 Catherine Moore <clm@redhat.com>
-
+
* d30v-opc.c (d30v_format_tab): Use format Ra for
modinc and moddec.
* configure: Regenerate.
* po/opcodes.pot: Regenerate.
-
+
2000-08-31 Alexandre Oliva <aoliva@redhat.com>
* acinclude.m4: Include libtool and gettext macros from the
in the buffer.
* fr30-asm.c: Regenerated.
* fr30-desc.c: Regenerated.
- * fr30-desc.h Regenerated.
+ * fr30-desc.h: Regenerated.
* fr30-dis.c: Regenerated.
* fr30-ibld.c: Regenerated.
* fr30-opc.c: Regenerated.
- * fr30-opc.h Regenerated.
+ * fr30-opc.h: Regenerated.
* m32r-asm.c: Regenerated.
* m32r-desc.c: Regenerated.
- * m32r-desc.h Regenerated.
+ * m32r-desc.h: Regenerated.
* m32r-dis.c: Regenerated.
* m32r-ibld.c: Regenerated.
* m32r-opc.c: Regenerated.
* cgen.sh: Likewise.
2000-08-02 Jim Wilson <wilson@redhat.com>
-
+
* ia64-dis.c (print_insn_ia64): Call ia64_free_opcode at end.
2000-07-29 Marek Michalkiewicz <marekm@linux.org.pl>
2000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
* Makefile.in, configure: regenerate
- * disassemble.c (disassembler): Recognize ARCH_m68hc12,
+ * disassemble.c (disassembler): Recognize ARCH_m68hc12,
ARCH_m68hc11.
- * m68hc11-dis.c (read_memory, print_insn, print_insn_m68hc12):
+ * m68hc11-dis.c (read_memory, print_insn, print_insn_m68hc12):
New functions.
* configure.in: Recognize m68hc12 and m68hc11.
* m68hc11-dis.c, m68hc11-opc.c: New files for support of m68hc1x
- * Makefile.am (CFILES, ALL_MACHINES): New files for disassembly
+ * Makefile.am (CFILES, ALL_MACHINES): New files for disassembly
and opcode generation for m68hc11 and m68hc12.
2000-06-16 Nick Duffek <nsd@redhat.com>
2000-05-11 Thomas de Lellis <tdel@windriver.com>
- * arm-opc.c: Disassembly of thumb ldsb/ldsh
+ * arm-opc.h: Disassembly of thumb ldsb/ldsh
instructions changed to ldrsb/ldrsh.
2000-05-11 Ulf Carlsson <ulfc@engr.sgi.com>
* ia64-asmtab.c, ia64-asmtab.h, ia64-dis.c, ia64-gen.c ia64-ic.tbl,
ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c ia64-opc-f.c, ia64-opc-i.c,
ia64-opc-m.c, ia64-opc-x.c, ia64-opc.c, ia64-opc.h, ia64-raw.tbl,
- ia64-war.tbl, ia64-waw.tbl): New files.
+ ia64-war.tbl, ia64-waw.tbl: New files.
2000-04-20 Alexandre Oliva <aoliva@redhat.com>
2000-04-05 J"orn Rennecke <amylaar@redhat.com>
- * sh-opc.c (sh_table): Use A_DISP_PC / PCRELIMM_8BY2 for ldre & ldrs.
+ * sh-opc.h (sh_table): Use A_DISP_PC / PCRELIMM_8BY2 for ldre & ldrs.
stc GBR,@-<REG_N> is available for arch_sh1_up.
Group parallel processing insn with identical mnemonics together.
Make three-operand psha / pshl come first.
2000-02-23 Andrew Haley <aph@redhat.com>
* m32r-asm.c, m32r-desc.c, m32r-desc.h, m32r-dis.c,
- m32r-ibld.c,m32r-opc.h: Rebuild.
+ m32r-ibld.c, m32r-opc.h: Rebuild.
2000-02-23 Linas Vepstas <linas@linas.org>
projects / deliverable / binutils-gdb.git / blobdiff