Add startswith function and use it instead of CONST_STRNEQ.
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
index 54c69d856246ff002d3f99223a542b712862793d..bd8cfef1b9490e707e646592b970340d0029f536 100644 (file)
@@ -1,3 +1,45 @@
+2021-03-22  Martin Liska  <mliska@suse.cz>
+
+       * aarch64-dis.c (parse_aarch64_dis_option): Replace usage of CONST_STRNEQ with startswith.
+       * arc-dis.c (parse_option): Likewise.
+       * arm-dis.c (parse_arm_disassembler_options): Likewise.
+       * cris-dis.c (print_with_operands): Likewise.
+       * h8300-dis.c (bfd_h8_disassemble): Likewise.
+       * i386-dis.c (print_insn): Likewise.
+       * ia64-gen.c (fetch_insn_class): Likewise.
+       (parse_resource_users): Likewise.
+       (in_iclass): Likewise.
+       (lookup_specifier): Likewise.
+       (insert_opcode_dependencies): Likewise.
+       * mips-dis.c (parse_mips_ase_option): Likewise.
+       (parse_mips_dis_option): Likewise.
+       * s390-dis.c (disassemble_init_s390): Likewise.
+       * wasm32-dis.c (parse_wasm32_disassembler_options): Likewise.
+
+2021-03-16  Kuan-Lin Chen  <kuanlinchentw@gmail.com>
+
+       * riscv-opc.c (riscv_opcodes): Add zba, zbb and zbc instructions.
+
+2021-03-12  Przemyslaw Wirkus  <przemyslaw.wirkus@arm.com>
+
+       * aarch64-opc.c: Add lorc_el1, lorea_el1, lorn_el1, lorsa_el1,
+       icc_ctlr_el3, icc_sre_elx, ich_vtr_el2 system registers.
+
+2021-03-12  Alan Modra  <amodra@gmail.com>
+
+       * i386-dis.c (print_insn <PREFIX_IGNORED>): Correct typo.
+
+2021-03-11  Jan Beulich  <jbeulich@suse.com>
+
+       * i386-dis.c (OP_XMM): Re-order checks.
+
+2021-03-11  Jan Beulich  <jbeulich@suse.com>
+
+       * i386-dis.c (putop): Drop need_vex check when also checking
+       vex.evex.
+       (intel_operand_size, OP_E_memory): Drop vex.evex check when also
+       checking vex.b.
+
 2021-03-11  Jan Beulich  <jbeulich@suse.com>
 
        * i386-dis.c (OP_E_memory): Drop xmmq_mode from broadcast
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