MIPS16: Switch to 32-bit opcode table interpretation

[deliverable/binutils-gdb.git] / opcodes / ChangeLog

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 289035418973cc2f6f843afd868c77d201ef7ae4..bffa445cd16ea96b3c3f09405a63ac7fb8ebbc0b 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,14 @@
+2016-12-20  Maciej W. Rozycki  <macro@imgtec.com>
+
+       * mips-dis.c (print_mips16_insn_arg): Always handle `extend' and
+       `insn' together, with `extend' as the high-order 16 bits.
+       (match_kind): New enum.
+       (print_insn_mips16): Rework for 32-bit instruction matching.
+       Do not dump EXTEND prefixes here.
+       * mips16-opc.c (mips16_opcodes): Move "extend" entry to the end.
+       Recode `match' and `mask' fields as 32-bit in absolute "jal" and
+       "jalx" entries.
+
 2016-12-20  Maciej W. Rozycki  <macro@imgtec.com>
 
        * mips16-opc.c (mips16_opcodes): Set membership to I3 rather