[AArch64] Add ARMv8.3 combined pointer authentication load instructions

[deliverable/binutils-gdb.git] / opcodes / ChangeLog

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index d7c5327737f10490633508a2417fe07b25633ccc..d096de4c1d3495571cd6bdfe3606407aed2eab30 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,85 @@
+2016-11-18  Szabolcs Nagy  <szabolcs.nagy@arm.com>
+
+       * aarch64-tbl.h (QL_X1NIL): New.
+       (arch64_opcode_table): Add ldraa, ldrab.
+       (AARCH64_OPERANDS): Add "ADDR_SIMM10".
+       * aarch64-asm.h (aarch64_ins_addr_simm10): Declare.
+       * aarch64-asm.c (aarch64_ins_addr_simm10): Define.
+       * aarch64-dis.h (aarch64_ext_addr_simm10): Declare.
+       * aarch64-dis.c (aarch64_ext_addr_simm10): Define.
+       * aarch64-opc.h (enum aarch64_field_kind): Add FLD_S_simm10.
+       * aarch64-opc.c (fields): Add data for FLD_S_simm10.
+       (operand_general_constraint_met_p): Handle AARCH64_OPND_ADDR_SIMM10.
+       (aarch64_print_operand): Likewise.
+       * aarch64-asm-2.c: Regenerate.
+       * aarch64-dis-2.c: Regenerate.
+       * aarch64-opc-2.c: Regenerate.
+
+2016-11-11  Szabolcs Nagy  <szabolcs.nagy@arm.com>
+
+       * aarch64-tbl.h (arch64_opcode_table): Add braa, brab, blraa, blrab, braaz,
+       brabz, blraaz, blrabz, retaa, retab, eretaa, eretab.
+       * aarch64-asm-2.c: Regenerate.
+       * aarch64-dis-2.c: Regenerate.
+       * aarch64-opc-2.c: Regenerate.
+
+2016-11-11  Szabolcs Nagy  <szabolcs.nagy@arm.com>
+
+       * aarch64-tbl.h (arch64_opcode_table): Add pacga.
+       (AARCH64_OPERANDS): Add Rm_SP.
+       * aarch64-opc.c (aarch64_print_operand): Handle AARCH64_OPND_Rm_SP.
+       * aarch64-asm-2.c: Regenerate.
+       * aarch64-dis-2.c: Regenerate.
+       * aarch64-opc-2.c: Regenerate.
+
+2016-11-11  Szabolcs Nagy  <szabolcs.nagy@arm.com>
+
+       * aarch64-tbl.h (arch64_opcode_table): Add pacia, pacib, pacda, pacdb, autia,
+       autib, autda, autdb, paciza, pacizb, pacdza, pacdzb, autiza, autizb, autdza,
+       autdzb, xpaci, xpacd.
+       * aarch64-asm-2.c: Regenerate.
+       * aarch64-dis-2.c: Regenerate.
+       * aarch64-opc-2.c: Regenerate.
+
+2016-11-11  Szabolcs Nagy  <szabolcs.nagy@arm.com>
+
+       * aarch64-opc.c (aarch64_sys_regs): Add apiakeylo_el1, apiakeyhi_el1,
+       apibkeylo_el1, apibkeyhi_el1, apdakeylo_el1, apdakeyhi_el1,
+       apdbkeylo_el1, apdbkeyhi_el1, apgakeylo_el1 and apgakeyhi_el1.
+       (aarch64_sys_reg_supported_p): Add feature test for new registers.
+
+2016-11-11  Szabolcs Nagy  <szabolcs.nagy@arm.com>
+
+       * aarch64-tbl.h (aarch64_feature_v8_3, ARMV8_3, V8_3_INSN): New.
+       (arch64_opcode_table): Add xpaclri, pacia1716, pacib1716, autia1716,
+       autib1716, paciaz, paciasp, pacibz, pacibsp, autiaz, autiasp, autibz,
+       autibsp.
+       * aarch64-asm-2.c: Regenerate.
+       * aarch64-dis-2.c: Regenerate.
+
+2016-11-11  Szabolcs Nagy  <szabolcs.nagy@arm.com>
+
+       * aarch64-gen.c (find_alias_opcode): Increase max_num_aliases to 32.
+
+2016-11-09  H.J. Lu  <hongjiu.lu@intel.com>
+
+       PR binutils/20799
+       * i386-dis-evex.h (evex_table): Replace EdqwS with Edqw.
+       * i386-dis.c (EdqwS): Removed.
+       (dqw_swap_mode): Likewise.
+       (intel_operand_size): Don't check dqw_swap_mode.
+       (OP_E_register): Likewise.
+       (OP_E_memory): Likewise.
+       (OP_G): Likewise.
+       (OP_EX): Likewise.
+       * i386-opc.tbl: Remove "S" from EVEX vpextrw.
+       * i386-tbl.h: Regerated.
+
+2016-11-09  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * i386-opc.tbl: Merge AVX512F vmovq.
+       * i386-tbl.h: Regerated.
+
 2016-11-08  H.J. Lu  <hongjiu.lu@intel.com>
 
        PR binutils/20701