* dwarf2loc.c (dwarf_expr_frame_base): Error out on missing

[deliverable/binutils-gdb.git] / opcodes / ChangeLog

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 77dbcfa2f35e5dba3ed2b7fa344bf7f0d4ccda23..d0ac1cd661f064c5c3f478c67c2c47ed9d1eb551 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,67 @@
+2008-05-02  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * i386-dis.c (MOVBE_Fixup): New.
+       (Mo): Likewise.
+       (PREFIX_0F3880): Likewise.
+       (PREFIX_0F3881): Likewise.
+       (PREFIX_0F38F0): Updated.
+       (prefix_table): Add PREFIX_0F3880 and PREFIX_0F3881.  Update
+       PREFIX_0F38F0 and PREFIX_0F38F1 for movbe.
+       (three_byte_table): Use PREFIX_0F3880 and PREFIX_0F3881.
+
+       * i386-gen.c (cpu_flag_init): Add CPU_MOVBE_FLAGS and
+       CPU_EPT_FLAGS.
+       (cpu_flags): Add CpuMovbe and CpuEPT.
+
+       * i386-opc.h (CpuMovbe): New.
+       (CpuEPT): Likewise.
+       (CpuLM): Updated.
+       (i386_cpu_flags): Add cpumovbe and cpuept.
+
+       * i386-opc.tbl: Add entries for movbe and EPT instructions.
+       * i386-init.h: Regenerated.
+       * i386-tbl.h: Likewise.
+
+2008-04-29  Adam Nemet  <anemet@caviumnetworks.com>
+
+       * mips-opc.c (mips_builtin_opcodes): Set field `match' to 0 for
+       the two drem and the two dremu macros.
+
+2008-04-28  Adam Nemet  <anemet@caviumnetworks.com>
+
+       * mips-opc.c (mips_builtin_opcodes): Mark prefx and c1
+       instructions FP_S.  Mark l.s, li.s, lwc1, swc1, s.s, trunc.w.s and
+       cop1 macros INSN2_M_FP_S.  Mark l.d, li.d, ldc1 and sdc1 macros
+       INSN2_M_FP_D.  Mark trunc.w.d macro INSN2_M_FP_S and INSN2_M_FP_D.
+
+2008-04-25  David S. Miller  <davem@davemloft.net>
+
+       * sparc-dis.c: Emit %stick instead of %sys_tick, and %stick_cmpr
+       instead of %sys_tick_cmpr, as suggested in architecture manuals.
+
+2008-04-23  Paolo Bonzini  <bonzini@gnu.org>
+
+       * aclocal.m4: Regenerate.
+       * configure: Regenerate.
+
+2008-04-23  David S. Miller  <davem@davemloft.net>
+
+       * sparc-opc.c (asi_table): Add UltraSPARC and Niagara
+       extended values.
+       (prefetch_table): Add missing values.
+
+2008-04-22  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * i386-gen.c (opcode_modifiers): Add NoAVX.
+
+       * i386-opc.h (NoAVX): New.
+       (OldGcc): Updated.
+       (i386_opcode_modifier): Add noavx.
+
+       * i386-opc.tbl: Add NoAVX to SSE, SSE2, SSE3 and SSSE3
+       instructions which don't have AVX equivalent.
+       * i386-tbl.h: Regenerated.
+
 2008-04-18  H.J. Lu  <hongjiu.lu@intel.com>
 
        * i386-dis.c (OP_VEX_FMA): New.