ubsan: nios2: undefined shift

[deliverable/binutils-gdb.git] / opcodes / ChangeLog

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 4d4c77dbd4a072ca35c59f9974f22450ecab1c17..d361ea7acd4eee0db224b0b47764caf0bf89183a 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,85 @@
+2020-05-28  Alan Modra  <amodra@gmail.com>
+
+       * nios2-dis.c (nios2_print_insn_arg): Avoid shift left of negative
+       values.
+
+2020-05-28  Alan Modra  <amodra@gmail.com>
+
+       * ns32k-dis.c (print_insn_arg): Handle d value of 'f' for
+       immediates.
+       (print_insn_ns32k): Revert last change.
+
+2020-05-28  Nick Clifton  <nickc@redhat.com>
+
+       * ns32k-dis.c (print_insn_ns32k): Change the arg_bufs array to
+       static.
+
+2020-05-26  Sandra Loosemore  <sandra@codesourcery.com>
+
+       Fix extraction of signed constants in nios2 disassembler (again).
+
+       * nios2-dis.c (nios2_print_insn_arg): Add explicit casts to
+       extractions of signed fields.
+
+2020-05-26  Stefan Schulze Frielinghaus  <stefansf@linux.ibm.com>
+
+       * s390-opc.txt: Relocate vector load/store instructions with
+       additional alignment parameter and change architecture level
+       constraint from z14 to z13.
+
+2020-05-21  Alan Modra  <amodra@gmail.com>
+
+       * arc-ext.c: Replace "if (x) free (x)" with "free (x)" throughout.
+       * sparc-dis.c: Likewise.
+       * tic4x-dis.c: Likewise.
+       * xtensa-dis.c: Likewise.
+       * bpf-desc.c: Regenerate.
+       * epiphany-desc.c: Regenerate.
+       * fr30-desc.c: Regenerate.
+       * frv-desc.c: Regenerate.
+       * ip2k-desc.c: Regenerate.
+       * iq2000-desc.c: Regenerate.
+       * lm32-desc.c: Regenerate.
+       * m32c-desc.c: Regenerate.
+       * m32r-desc.c: Regenerate.
+       * mep-asm.c: Regenerate.
+       * mep-desc.c: Regenerate.
+       * mt-desc.c: Regenerate.
+       * or1k-desc.c: Regenerate.
+       * xc16x-desc.c: Regenerate.
+       * xstormy16-desc.c: Regenerate.
+
+2020-05-20  Nelson Chu  <nelson.chu@sifive.com>
+
+       * riscv-opc.c (riscv_ext_version_table): The table used to store
+       all information about the supported spec and the corresponding ISA
+       versions.  Currently, only Zicsr is supported to verify the
+       correctness of Z sub extension settings.  Others will be supported
+       in the future patches.
+       (struct isa_spec_t, isa_specs): List for all supported ISA spec
+       classes and the corresponding strings.
+       (riscv_get_isa_spec_class): New function.  Get the corresponding ISA
+       spec class by giving a ISA spec string.
+       * riscv-opc.c (struct priv_spec_t): New structure.
+       (struct priv_spec_t priv_specs): List for all supported privilege spec
+       classes and the corresponding strings.
+       (riscv_get_priv_spec_class): New function.  Get the corresponding
+       privilege spec class by giving a spec string.
+       (riscv_get_priv_spec_name): New function.  Get the corresponding
+       privilege spec string by giving a CSR version class.
+       * riscv-dis.c: Updated since DECLARE_CSR is changed.
+       * riscv-dis.c: Add new disassembler option -Mpriv-spec to dump the CSR
+       according to the chosen version.  Build a hash table riscv_csr_hash to
+       store the valid CSR for the chosen pirv verison.  Dump the direct
+       CSR address rather than it's name if it is invalid.
+       (parse_riscv_dis_option_without_args): New function.  Parse the options
+       without arguments.
+       (parse_riscv_dis_option): Call parse_riscv_dis_option_without_args to
+       parse the options without arguments first, and then handle the options
+       with arguments.  Add the new option -Mpriv-spec, which has argument.
+       * riscv-dis.c (print_riscv_disassembler_options): Add description
+       about the new OBJDUMP option.
+
 2020-05-19  Peter Bergner  <bergner@linux.ibm.com>
 
        * ppc-opc.c (insert_ls, extract_ls): Handle 3-bit L fields and new