PR binutils/5524

[deliverable/binutils-gdb.git] / opcodes / ChangeLog

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 9e401030286dfc4df8bf26545820efd0efd07ce1..d750f8f49d6340c4ceb3d0c29625415e97714e96 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,79 @@
+2008-02-14  Nick Clifton  <nickc@redhat.com>
+
+       PR binutils/5524
+       * configure.in (SHARED_LIBADD): Select the correct host specific
+       file extension for shared libraries.
+       * configure: Regenerate.
+
+2008-02-13  Jan Beulich  <jbeulich@novell.com>
+
+       * i386-opc.h (RegFlat): New.
+       * i386-reg.tbl (flat): Add.
+       * i386-tbl.h: Re-generate.
+
+2008-02-13  Jan Beulich  <jbeulich@novell.com>
+
+       * i386-dis.c (a_mode): New.
+       (cond_jump_mode): Adjust.
+       (Ma): Change to a_mode.
+       (intel_operand_size): Handle a_mode.
+       * i386-opc.tbl: Allow Dword and Qword for bound.
+       * i386-tbl.h: Re-generate.
+
+2008-02-13  Jan Beulich  <jbeulich@novell.com>
+
+       * i386-gen.c (process_i386_registers): Process new fields.
+       * i386-opc.h (reg_entry): Shrink reg_flags and reg_num to
+       unsigned char. Add dw2_regnum and Dw2Inval.
+       * i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo
+       register names.
+       * i386-tbl.h: Re-generate.
+
+2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * i386-gen.c (cpu_flag_init): Add CPU_XSAVE_FLAGS.
+       * i386-init.h: Updated.
+
+2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * i386-gen.c (cpu_flags): Add CpuXsave.
+
+       * i386-opc.h (CpuXsave): New.
+       (CpuLM): Updated.
+       (i386_cpu_flags): Add cpuxsave.
+
+       * i386-dis.c (MOD_0FAE_REG_4): New.
+       (RM_0F01_REG_2): Likewise.
+       (MOD_0FAE_REG_5): Updated.
+       (RM_0F01_REG_3): Likewise.
+       (reg_table): Use MOD_0FAE_REG_4.
+       (mod_table): Use RM_0F01_REG_2.  Add MOD_0FAE_REG_4.  Updated
+       for xrstor.
+       (rm_table): Add RM_0F01_REG_2.
+
+       * i386-opc.tbl: Add xsave, xrstor, xgetbv and xsetbv.
+       * i386-init.h: Regenerated.
+       * i386-tbl.h: Likewise.
+
+2008-02-11  Jan Beulich  <jbeulich@novell.com>
+
+       * i386-opc.tbl: Remove Disp32S from CpuNo64 opcodes. Remove
+       Disp16 from Cpu64 non-jump opcodes (including loop and j?cxz).
+       * i386-tbl.h: Re-generate.
+
+2008-02-04  H.J. Lu  <hongjiu.lu@intel.com>
+
+       PR 5715
+       * configure: Regenerated.
+
+2008-02-04  Adam Nemet  <anemet@caviumnetworks.com>
+
+       * mips-dis.c: Update copyright.
+       (mips_arch_choices): Add Octeon.
+       * mips-opc.c: Update copyright.
+       (IOCT): New macro.
+       (mips_builtin_opcodes): Add Octeon instruction synciobdma.
+
 2008-01-29  Alan Modra  <amodra@bigpond.net.au>
 
        * ppc-opc.c: Support optional L form mtmsr.