Prevent more potential illegal memory accesses in the RX disassembler.

[deliverable/binutils-gdb.git] / opcodes / ChangeLog

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 67bc754be56dcb1bef48ba6593c2ff7339fcbfc6..e53e95c652448a01d67199f90713d49f342ca83b 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,72 @@
+2019-10-22  Nick Clifton  <nickc@redhat.com>
+
+       * rx-dis.c (get_size_name): New function.  Provides safe
+       access to name array.
+       (get_opsize_name): Likewise.
+       (print_insn_rx): Use the accessor functions.
+
+2019-10-16  Nick Clifton  <nickc@redhat.com>
+
+       * rx-dis.c (get_register_name): New function.  Provides safe
+       access to name array.
+       (get_condition_name, get_flag_name, get_double_register_name)
+       (get_double_register_high_name, get_double_register_low_name)
+       (get_double_control_register_name, get_double_condition_name):
+       Likewise.
+       (print_insn_rx): Use the accessor functions.
+
+2019-10-09  Nick Clifton  <nickc@redhat.com>
+
+       PR 25041
+       * avr-dis.c (avr_operand): Fix construction of address for lds/sts
+       instructions.
+
+2019-10-07  Jan Beulich  <jbeulich@suse.com>
+
+       * opcodes/i386-opc.tbl (movsd): Add Dword and IgnoreSize.
+       (cmpsd): Likewise. Move EsSeg to other operand.
+       * opcodes/i386-tbl.h: Re-generate.
+
+2019-09-23  Alan Modra  <amodra@gmail.com>
+
+       * m68k-dis.c: Include cpu-m68k.h
+
+2019-09-23  Alan Modra  <amodra@gmail.com>
+
+       * mips-dis.c: Include elfxx-mips.h.  Move "elf-bfd.h" and
+       "elf/mips.h" earlier.
+
+2018-09-20  Jan Beulich  <jbeulich@suse.com>
+
+       PR gas/25012
+       * i386-opc.tbl (push, pop): Re-instate distinct Cpu64 templates
+       with SReg operand.
+       * i386-tbl.h: Re-generate.
+
+2019-09-18  Alan Modra  <amodra@gmail.com>
+
+       * arc-ext.c: Update throughout for bfd section macro changes.
+
+2019-09-18  Simon Marchi  <simon.marchi@polymtl.ca>
+
+       * Makefile.in: Re-generate.
+       * configure: Re-generate.
+
+2019-09-17  Maxim Blinov  <maxim.blinov@embecosm.com>
+
+       * riscv-opc.c (riscv_opcodes): Change subset field
+       to insn_class field for all instructions.
+       (riscv_insn_types): Likewise.
+
+2019-09-16  Phil Blundell  <pb@pbcl.net>
+
+       * configure: Regenerated.
+
+2019-09-10  Miod Vallat  <miod@online.fr>
+
+       PR 24982
+       * m68k-opc.c: Correct aliases for tdivsl and tdivul.
+
 2019-09-09  Phil Blundell  <pb@pbcl.net>
 
        binutils 2.33 branch created.